TI1 BQ24140YFFR Fully integrated dual-input switch-mode one-cell li-ion charger with full usb compliance and usb-otg support Datasheet

bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
Fully Integrated Dual-Input Switch-Mode One-Cell Li-Ion Charger with Full USB
Compliance and USB-OTG Support
Check for Samples: bq24140
FEATURES
•
1
•
•
•
•
•
•
•
•
•
•
•
•
High-Efficiency Mini-USB/AC Battery Charger
for Single-Cell Li-Ion and Li-Polymer Battery
Packs
Charge Battery and Provide USB-OTG Support
at the Same Time
High-Accuracy Voltage and Current Regulation
– Input Current Regulation Accuracy: ±5%
(100mA, 500mA)
– Charge Voltage Regulation Accuracy:
±0.5% (25°C), ±1% (0-125°C)
– Charge Current Regulation Accuracy: ±5%
Boost Mode Operation for USB OTG:
– Input Voltage Range (from Battery): 2.3V to
4.5V
– Output for VBUS: 5.05V/500 mA
Input Voltage Based Dynamic Power
Management Provides Protection Against
Current Limited Adapters
Bad Adaptor Detection and Rejection
Safety Limit Register for Added Security by
Limiting Maximum Charge Voltage and
Maximum Charge Current
20-V Absolute Maximum Input Voltage Rating
9.0-V Maximum Operating Input Voltage
Charge Faster than Linear Chargers
Built-in Input Current Sensing and Limiting
Integrated Power FETs for up to 1.5-A Charge
Rate
4.7 mF
•
•
•
•
•
•
Programmable Charge Parameters Through
I2C Interface (up to 3.4 Mbps):
– Input Current
– Fast-Charge/Termination Current
– Charge Voltage (3.5-4.44V)
– Safety Timer with Reset Control
– Safety Timer with Reset Control
– Termination Enable
Synchronous Fixed-Frequency PWM
Controller Operating at 3 MHz With 0% to
99.5% Duty Cycle
Automatic High Impedance Mode for Low
Power Consumption
Robust Protection
– Reverse Leakage Protection Prevents
Battery Drainage
– Thermal Regulation and Protection
– Input/Output Over Voltage Protection
Status Output for Charging and Faults
USB Friendly Boot-Up Sequence
2.35 × 2.65 mm 30-pin WCSP Package
APPLICATIONS
•
•
•
Mobile Phones and Smart Phones
MP3 Players
Handheld Devices
4.7 mF
PMID2
PMID1
1 mH
AC Adapter or
Wireless Power
SW1
VIN
1 mF
BOOT1
10 µF 47 µF
1 mH
PACK+
+
SW2
VBUS
USB Adapter
68 mW
100 nF
4.7 mF
100 nF
PACK-
BOOT2
10 kW 10 kW 10 kW
10 kW
10 kW 10 kW
HOST
CSIN
SCL
SDA
STAT
OTG
SLRST
DIS
VREG
VBAT
VREF
LED
GND
1 mF
0.1 mF
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2011, Texas Instruments Incorporated
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
DESCRIPTION
The bq24140 is a compact, flexible, high-efficiency, USB-friendly switch-mode charge management device for
single-cell Li-ion and Li-polymer batteries used in a wide range of portable applications. The charge parameters
can be programmed through an I2C interface. The IC integrates two synchronous PWM chargers, power
MOSFETs, input current sensing, high-accuracy current and voltage regulation, and charge termination, into a
small WCSP package.
The IC charges the battery in three phases: conditioning, constant current and constant voltage. The input
current is automatically limited to the value set by the host. Charge is terminated based on user-selectable
minimum current level. A safety timer with reset control provides a safety backup for I2C interface. During normal
operation, the IC automatically restarts the charge cycle if the battery voltage falls below an internal threshold
and automatically enters sleep mode or high impedance mode when the input supply is removed. The charge
status can be reported to the host using the I2C interface. During the charging process, the IC monitors its
junction temperature (TJ) and reduces the charge current once TJ increases to 125°C typical. To support USB
OTG device, the IC can provide VBUS (5.05V typical) by boosting the battery voltage. The IC is available in
30-pin WCSP package.
DEVICE INFORMATION
PIN OUT (TOP VIEW)
1
2
3
4
5
A
BOOT
VREF
VREG
SDA
BOOT1
B
VIN
VIN
SCL
VBUS
VBUS
C
PMID2
PMID2
SLRST
PMID1
PMID1
D
SW2
SW2
DIS
SW1
SW1
E
GND
GND
GND
GND
GND
F
LED
OTG
CSIN
VBAT
STAT
PIN FUNCTIONS
PIN
I/O
DESCRIPTION
NAME
NO.
BOOT
A1
O
Boot-strapped capacitor for the high-side MOSFET gate driver. Connect a 100nF ceramic capacitor (voltage
rating above 10V) from BOOT pin to SW2 pin.
VREF
A2
O
Internal bias regulator voltage. Connect a 1µF ceramic capacitor from this output to PGND.
VREG
A3
O
Voltage regulator. 2.5V with 10mA current capability. Connect a 0.1μF ceramic capacitor to ground
SDA
A4
I/O I2C interface data. Connect a 10-kΩ pull-up resistor to 1.8V rail.
BOOT1
A5
O
Boot-strapped capacitor for the high-side MOSFET gate driver. Connect a 100nF ceramic capacitor (voltage
rating above 10V) from BOOT1 pin to SW1 pin.
VIN
B1 – B2
I
Charger input voltage. Bypass it with a 1μF ceramic capacitor from VIN to GND.
SCL
B3
I
I2C interface clock. Connect a 10-kΩ pull-up resistor to 1.8V rail.
VBUS
B4 – B5
I/O
Charger input voltage. Bypass it with a 4.7μF ceramic capacitor from VBUS to GND. This pin also provides the
output of the boost converter when in Boost Mode.
PMID2
C1 – C2
O
Connection point between reverse blocking FET and high-side switching FET. Bypass it with a minimum of
3.3μF capacitor from PMID2 to GND.
2
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
PIN FUNCTIONS (continued)
PIN
I/O
DESCRIPTION
C3
I
Safety limit register control. When SLRST = 0, all the safety limit values are reset to default values, regardless
of the write actions to the safety limits registers. When SLRST = 1, the host can program the safety limits
register until any write action to other registers locks the programmed safety limits.
PMID1
C4 – C5
O
Connection point between reverse blocking FET and high-side switching FET. Bypass it with a minimum of
3.3μF capacitor from PMID1 to GND.
SW2
D1 – D2
O
Internal switch to output inductor connection.
DIS
D3
I
Charge disable control pin. DIS=0, charge is enabled. DIS=1, charge is disabled. VIN and VBUS pins are high
impedance to PGND. In 15min mode, DIS=1 will reset the 15min timer; while in 32s mode, DIS=1 will NOT
reset the 32-second timer.
SW1
D4 – D5
O
Internal switch to output inductor connection.
GND
E1 – E5
LED
F1
NAME
NO.
SLRST
OTG
F2
Ground pins.
O
High side LED driver. Current, on and off times can be programmed through I2C to select different modes.
I
Boost mode enable control and VBUS input current limiting selection pin. When OTG is in active status per the
control register, VBUS converter will be forced to operate in boost mode. It has higher priority over I2C control
and can be disabled through control register. The polarity of OTG active status can also be controlled.
At POR, the OTG control register is ignored and the OTG pin is used as the input current limiting selection pin
for VBUS converter. When OTG=High, IIN_LIMIT=500mA and when OTG=Low, IIN_LIMIT=100mA.
CSIN
F3
I
Charge current-sense input. Battery current is sensed via the voltage drop across an external sense resistor. A
0.1μF ceramic capacitor to GND is required.
VBAT
F4
I
Battery voltage and current sense input. Bypass it with a ceramic capacitor (minimum 0.1µF) to GND if there
are long inductive leads to battery.
STAT
F5
O
Charge status pin. Pull low when charge in progress. Open drain for other conditions. During faults, a 128µS
pulse is sent out. STAT pin can be disabled by the EN_STAT bit in control register. STAT can be used to drive
a LED or communicate with a host processor.
ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range (unless otherwise noted)
VALUE
MAX
–2
20
V
SCL, SDA, OTG, CSIN, VREG, VBAT, SLRST, DIS, LED
–0.3
7
V
PMID1, PMID2, STAT
–0.3
20
Supply voltage range (with respect
VBUS, VIN
to GND)
Input voltage range (with respect
to and GND)
Output voltage range (with respect
to and GND)
UNIT
MIN
VREF
6.5
BOOT, BOOT1
–0.7
20
SW1, SW2
–0.7
12
V
Voltage difference between CSIN and VBAT inputs (VCSIN -VBAT)
±7
V
Output sink
STAT
10
mA
Output current (average)
SW1, SW2
1.5 (2)
A
TA
Operating free-air temperature range
–30
+85
°C
TJ
Junction temperature range
–40
+125
°C
–45
+150
°C
Tstg Storage temperature
ESD
Rating (3)
(1)
(2)
(3)
Human body model at all pins
±2000
Machine model
±100
Charge device model
±500
V
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Duty cycle for output current should be less than 50% for 10- year life time when output current is above 1.25A
The human body model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin.
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
3
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
THERMAL INFORMATION
bq24140
THERMAL METRIC (1)
WCSP PACKAGE
UNITS
30 PINS
θJA
Junction-to-ambient thermal resistance
θJCtop
Junction-to-case (top) thermal resistance
0.3
θJB
Junction-to-board thermal resistance
44.4
ψJT
Junction-to-top characterization parameter
0.3
ψJB
Junction-to-board characterization parameter
44.4
θJCbot
Junction-to-case (bottom) thermal resistance
n/a
(1)
79.5
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
RECOMMENDED OPERATING CONDITIONS
MIN NOM MAX UNIT
VBUS
Supply voltage
4.0
6 (1)
(1)
VIN
Supply voltage
4.0
9
TJ
Operating junction temperature range
–40
125
(1)
V
V
°C
The inherent switching noise voltage spikes should not exceed the absolute maximum rating on either the BOOT or SW pins. A tight
layout minimizes switching noise.
ELECTRICAL CHARACTERISTICS
Circuit of Figure 1, VBUS = 5V, HZ_MODE=0, OPA_MODE=0, CD=0, TJ = –40°C–125°C and TJ = 25°C for typical values
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
INPUT CURRENTS
VBUS > VMIN, PWM switching
IVBUS
VBUS supply current for control
IVIN
VIN supply current for control
IIN_LEAK
10
VBUS > VMIN, PWM NOT switching
5
0°C < TJ < 85°C, CD = 1 or HZ_MODE = 1
33
VIN > VMIN, PWM switching
10
VIN > VMIN, PWM NOT switching
80
5
mA
μA
mA
0°C < TJ < 85°C, CD = 1 or HZ_MODE = 1, No load on
VREG
150
μA
Leakage current from battery to VBUS pin
0°C < TJ < 85°C, VVBAT = 4.2 V, High Impedance mode
and / or VIN
5
μA
23
μA
3.5
4.44
V
–0.5%
0.5%
–0.75%
0.75
%
–0.6%
0.4%
VIN, VLOWV ≤ VVBAT < VOREG, VIN > VSLP,
RSNS = 68 mΩ, LOW_CHG=0, Programmable
550
1550
VBUS, VLOWV ≤ VVBAT < VOREG, VBUS > VSLP,
RSNS = 68 mΩ LOW_CHG = 0, Programmable
550
1250
Battery discharge current in high
impedance mode, (CSIN, VBAT, SW
pins)
0°C < TJ < 85°C, VVBAT = 4.2 V, High Impedance mode,
SCL,SDA,OTG=0V or 1.8V
VOLTAGE REGULATION
VOREG
Output charge voltage
Operating in voltage regulation, programmable
TA = 25°C
Voltage regulation accuracy
Over recommended operating temperature
4.1 V – 4.35 V range, over recommended operating
temperature
CURRENT REGULATION -FAST CHARGE
IOCHARGE
Output charge current
VLOWV ≤ VVBAT < VOREG, VBUS > VSLP,
RSNS=68 mΩ LOW_CHG=1
Regulation accuracy for charge current
across RSNS, VIREG = IOCHARGE × RSNS
37.4 mV ≤ VIREG
325
-3%
mA
350
3%
WEAK BATTERY DETECTION
VLOWV
Weak battery voltage threshold
Programmable
Weak battery voltage accuracy
4
Submit Documentation Feedback
3.4
3.7
–5%
5%
V
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
Circuit of Figure 1, VBUS = 5V, HZ_MODE=0, OPA_MODE=0, CD=0, TJ = –40°C–125°C and TJ = 25°C for typical values
PARAMETER
TEST CONDITIONS
MIN
Deglitch time for weak battery threshold
Rising voltage, 2-mV over drive, tRISE = 100 ns
Hysteresis for VLOWV
Battery voltage falling
TYP
MAX
UNIT
30
ms
100
mV
DIS, SLRST and OTG PIN LOGIC LEVEL
VIL
Input low threshold level
VIH
Input high threshold level
0.4
1.3
V
V
CHARGE TERMINATION DETECTION
ITERM
Termination charge current
VVBAT > VOREG-VRCH , VBUS > VSLP, RSNS = 68 mΩ,
Programmable
Deglitch time for charge termination
Both rising and falling, 2-mV overdrive, tRISE, tFALL = 100 ns
50
3.4 mV ≤ VIREG_TERM ≤ 6.8mV
Regulation accuracy for termination
current across RSNS VIREG_TERM = IOTERM
× RSNS
6.8 mV < VIREG_TERM ≤ 13.6 mV
13.6mV < VIREG_TERM ≤ 30 mV
400
30
mA
ms
-35%
35%
–12.5%
12.5
%
–6%
6%
BAD ADAPTOR DETECTION
VIN(MIN)
Input voltage lower limit
Bad adaptor detection
Deglitch time for VBUS rising above
VIN(MIN)
Rising voltage, 2-mV overdrive, tRISE = 100 ns
Hysteresis for VIN(MIN)
Input voltage rising
ISHORT
Current source to GND
During bad adaptor detection
TINT
Detection interval
Input power source detection
3.7
3.8
4.0
30
100
20
30
V
ms
200
mV
40
mA
2
S
INPUT BASED DYNAMIC POWER MANAGEMENT
VIN_LOW
The threshold when input based DPM
loop kicks in
Charge mode, programmable
DPM loop kick-in threshold tolerance
4.2
4.76
–2%
+2%
V
INPUT CURRENT LIMITING
IIN = 100mA
IIN_LIMIT
Input current limit
IIN = 500mA
TJ = 0°C–125ºC
88
93
98
TJ = –40ºC–125ºC
86
93
98
TJ = 0ºC–125ºC
450
475
500
TJ = –40ºC–125ºC
440
475
500
mA
mA
VREF BIAS REGULATOR
VREF
Internal bias regulator voltage
VIN > VREF, IVREF = 1 mA, CVREF = 1 μF
5.5
VREF output short current limit
6.5
30
V
mA
BATTERY RECHARGE THRESHOLD
VRCH
Recharge threshold voltage
Below VOREG
90
Deglitch time
VVBAT decreasing below threshold, tFALL = 100 ns, 10-mV
overdrive
120
160
130
mV
ms
STAT OUTPUT
VOL
Low-level output saturation voltage,
STAT pin
IO = 10 mA, sink current
High-level leakage current for STAT
Voltage on STAT pin is 5V
0.55
V
1
μA
LED OUTPUT
VLED_MIN
ILED
Minimum LED operating voltage
LED current, programmable
2.5
V
ILED1 = L, ILED0 = L
0
ILED1 = L, ILED0 = H
1.35
ILED1 = H, ILED0 = L
2.7
ILED1 = H, ILED0 = H
5.4
–20%
LED current accuracy
VBAT = 2.5 V
mA
+20%
VDO
Drop-out voltage of LED
100
TON
Turn on time for current source
(10%–90%)
200
mV
100
μs
TOFF
Turn off time for current source
(90%–10%)
100
μs
I2C BUS LOGIC LEVELS AND TIMING CHARTERISTICS
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
5
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
Circuit of Figure 1, VBUS = 5V, HZ_MODE=0, OPA_MODE=0, CD=0, TJ = –40°C–125°C and TJ = 25°C for typical values
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VOL
Output low threshold level
IO = 10 mA, sink current
0.4
V
VIL
Input low threshold level
V(pull-up) = 1.8 V, SDA and SCL
0.4
V
VIH
Input high threshold level
V(pull-up) = 1.8 V, SDA and SCL
I(bias)
Input bias current
V(pull-up) = 1.8 V, SDA and SCL
1
μA
fSCL
SCL clock frequency
1.2
V
3.4
MHz
BATTERY DETECTION
IDETECT
Battery detection current before charge
done (sink current) (1)
tDETECT
tDETECT2
Begins after termination detected
-0.5
mA
Battery detection time
262
ms
Battery detection time after linear charge
is complete and PWM starts
262
ms
SLEEP COMPARATOR
VSLP
Sleep-mode entry threshold, VBUS-VVBAT
or VIN – VVBAT
2.3 V ≤ VVBAT ≤ VOREG, VBUS or VIN falling
VSLP-EXIT
Sleep-mode exit hysteresis
2.3 V ≤ VVBAT ≤ VOREG
Deglitch time for VBUS or VIN rising above
VSLP+VSLP_EXIT
Rising voltage, 2-mV over drive, tRISE = 100 ns
0
40
100
mV
70
110
200
mV
30
ms
UNDER-VOLTAGE LOCKOUT (UVLO)
VUVLO
IC active threshold voltage
VBUS or VIN rising
VUV_HYS
IC active hysteresis
VBUS or VIN falling from above VUVLO
3.05
3.3
90
100
3.65
V
mV
PWM
VBOOT
Voltage from BOOT1 pin to SW1 pin, or
Voltage from BOOT2
pin to SW2 pin
RON_Q1
Internal top reverse blocking MOSFET
on-resistance
IIN_LIMIT = 500 mA, Measured from VIN to PMID2
RON_Q2
Internal top N-channel Switching
MOSFET on-resistance
RON_Q3
6.5
V
100
150
mΩ
Measured from PMID2 to SW2, VBOOT2 – VSW2 = 4 V
120
200
mΩ
Internal bottom N-channel MOSFET
on-resistance
Measured from SW2 to GND
110
200
mΩ
RON_Q4
Internal top reverse blocking MOSFET
on-resistance
IIN_LIMIT = 500 mA, Measured from VBUS to PMID1
100
150
mΩ
RON_Q5
Internal top N-channel Switching
MOSFET on-resistance
Measured from PMID1 to SW1, VBOOT1 – VSW1 = 4 V
120
200
mΩ
RON_Q6
Internal bottom N-channel MOSFET
on-resistance
Measured from SW1 to GND
110
200
mΩ
fOSC
Oscillator frequency
3.0
–10%
Frequency accuracy
DMAX
Maximum duty cycle
DMIN
Minimum duty cycle
Synchronous mode to non-synchronous
mode transition current threshold (2)
MHz
10%
99.5%
0
Low-side MOSFET cycle-by-cycle current sensing
100
mA
CHARGE MODE PROTECTION
VOVP-VIN
Input OVP for VIN
VOVP
VOVP-VBUS
VIN
Rising edge
9.6
hysteresis
Input OVP for VBUS
Rising edge
6.3
VOVP VBUS hysteresis
VOVP
9.8
10.0
140
6.5
6.7
170
110
VVBAT threshold over VOREG to turn off charger during charge
VOVP hysteresis
Lower limit for VVBAT falling from above VOVP
ILIMIT
Cycle-by-cycle current limit for charge
Charge mode operation
1.8
2.4
3.0
VSHORT
Trickle to fast charge threshold
VVBAT rising
2.0
2.1
2.2
(1)
(2)
6
Trickle charge charging current
121
11
VSHORT hysteresis
20
30
%VOREG
%VOREG
100
VVBAT ≤ VSHORT
V
mV
Output OVP threshold voltage
ISHORT
117
V
mV
A
V
mV
40
mA
Negative charge current means the charge current flows from the battery to charger (discharging battery).
Bottom N-channel MOSFET always turns on for ~60 ns and then turns off if current is too low.
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
Circuit of Figure 1, VBUS = 5V, HZ_MODE=0, OPA_MODE=0, CD=0, TJ = –40°C–125°C and TJ = 25°C for typical values
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
BOOST MODE OPERATION FOR VBUS (OPA_MODE=1, HZ_MODE=0, VBUS input only)
Boost output voltage (to VBUS pin)
2.5 V < VVBAT < 4.5 V
Boost output voltage accuracy
Including line and load regulation
-3%
IBOOST
Maximum output current for boost
VBUS = 5.05 V, 2.5 V < VVBAT < 4.5 V
650
IBLIMIT
Cycle by cycle current limit for boost
VBUS = 5.05 V, 2.5 V < VVBAT < 4.5 V
VBUSOVP
Over voltage protection threshold for
boost (VBUS pin)
Threshold over VBUS to turn off converter during boost
VBUSOVP hysteresis
VBUS falling from above VBUSOVP
VBUS_BOOST
VBATMAX
VBATMIN
ICC_BOOS
T
5.05
V
+3%
mA
1.0
5.8
6.0
A
6.2
162
Maximum battery voltage for boost (VBAT
VVBAT rising edge during boost
pin)
4.65
4.75
VBATMAX hysteresis
VVBAT falling from above VBATMAX
70
Minimum battery voltage for boost (VBAT
pin)
During boosting
2.3
Before boost starts
2.8
Boost output resistance at
high-impedance mode (From VBUS to
PGND)
CD = 1 or HZ_MODE = 1
Operation quiescent current in boost
mode
No load at VBUS, power save mode, VVBAT = 4 V, boosting
V
mV
4.85
V
mV
2.97
500
V
kΩ
650
µA
165
°C
10
°C
120
°C
PROTECTION
TSHTDWN
Thermal trip
Thermal hysteresis
TCF
Thermal regulation threshold
Charge current begins to taper down
T32S
Time constant for the 32-second timer
32 second mode
15
T15M
Time constant for the 15-minute timer
15 minute mode
12
VREG
VREG Regulator
ILOAD = 1mA, CREG = 0.1µF, VIN > VUVLO
ILIM VREG
Current limit VREG
VREG = 0V
32
S
15
Minute
VREG
2.34
2.6
2.86
10
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
V
mA
7
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
TYPICAL APPLICATION CIRCUITS
VIN=5V or VBUS=5V, ICHARGE = 1550mA, VBAT = 3.5--4.44V (Adjustable), Safety Timer = 15 minutes or 32 seconds
4.7 mF
4.7 mF
PMID2
PMID1
1 mH
AC Adapter or
Wireless Power
SW1
VIN
10 µF
47 µF
100 nF
1 mF
BOOT1
1 mH
PACK+
+
SW2
VBUS
USB Adapter
68 mW
4.7 mF
100 nF
PACK-
BOOT2
10 kW
10 kW
10 kW
10 kW
10 kW
10 kW
CSIN
SCL
SDA
STAT
OTG
SLRST
DIS
VBAT
VREF
1 mF
HOST
VREG
LED
GND
0.1 mF
Figure 1. I2C Controlled 1-Cell USB and AC or Wireless Power Charger Application Circuit
8
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
VIN=5V or VBUS=5V, ICHARGE = 1550mA, VBAT = 3.5--4.44V (Adjustable), Safety Timer = 15 minutes or 32 seconds
BLOCK DIAGRAM
PMID2
PMID2
Q1
VIN
Q2
SW2
SW2
VIN
+
VIN_DPM
CBC Current
Limit
OSC
Charge
Pump
VREF
PWM Controller
Q3
+
IIN_LIM
PMID1
CBC Current
Limit
-
PMID1
Q5
Q4
VBUS
SW1
SW1
VBUS
PMID2
Charge
Pump
VREF
2.5V, 10mA (back
to back switches)
+
VREG
Q6
VBUS_DPM
-
CSIN
+
-
+
TREG
IBUS_LIM
VBAT
-
ICHG
+
-
TJ
+
VBUS UVLO
-
VIN
+
PWM Charge
VBUS UVLO
-
VIN UVLO
-
VBUS
+
VBUS OVP
-
VIN
+
VIN OVP
-
TJ
+
TSHTDWN
+
VBUS
+
VBAT OVP
-
VBAT
+
VOREG - VRCH
-
VBUS
+
VBAT
-
ISHORT
VIN UVLO
Linear Chg
VBUS Poor
Source
VBUS OVP
VIN Poor
Source
VIN OVP
TSHUT
-
VBAT
VOREG
VREF
PWM Charge
Charge Control,
Timer and Display
Logic
+
VBUS
-
VBUS MIN
BOOT
+
VIN
-
VIN MIN
+
PMID1
VBAT
-
VSHORT
Ref & Bias
VREF
BOOT1
PMID2
VBAT
LED
LED
BAT OVP
STAT
Recharge
Sleep VBUS
DIS
SLRST
GND
GND
GND
GND
GND
VIN
+
VBAT
-
Sleep VIN
OTG
Recharge
VCSIN
VBAT
ITERM
+
I2C Control
Termination
SDA
SCL
-
Figure 2. bq24140 Block Diagram
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
9
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 3. VBUS to VIN Charging – Default Mode C1:VIN, CH2: IVBUS, CH3: IVIN, CH4: VBUS
Figure 4. VIN Charging and removed, switch to VBUS – Default Mode C1:VIN, CH2: IVBUS, CH3: IVIN,
CH4: VBUS
10
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
Figure 5. VBUS Dynamic Power Management (DPM) – C1:VIN, CH2: IVBUS, CH3: VBUS, CH4: STAT
Figure 6. VBUS Dynamic Power Management (DPM) – CH1:VIN, CH2: STAT, CH3: VBAT, CH4: IVIN
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
11
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
0.95
Efficiency 325
Efficiency 550
0.93
Efficiency 950
0.91
Efficience - %
0.89
0.87
Efficiency 1250
0.85
0.83
0.81
0.79
0.77
0.75
2
2.5
3
3.5
VBAT - Battery Voltage - V
4
4.5
Figure 7. VBUS Efficiency versus Battery Voltage
0.95
VBAT at 4.2 V
VBAT at 4 V
0.93
VBAT at 3.6 V
0.91
Efficience - %
0.89
0.87
VBAT at 3 V
0.85
VBAT at 2.5 V
0.83
0.81
0.79
0.77
0.75
0
0.2
0.4
0.6
0.8
1
ICHG - Charge Current - A
1.2
1.4
Figure 8. VBUS Efficiency versus Charge Current
12
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
0.95
Efficiency 550
0.93
Efficiency 325
Efficiency 950
0.91
Efficience - %
0.89
0.87
0.85
Efficiency 1.55
0.83
0.81
0.79
0.77
0.75
2
2.5
3
3.5
4
4.5
5
VBAT - Battery Voltage - V
Figure 9. VIN Efficiency versus Battery Voltage
0.95
VBAT at 4.2 V
0.93
VBAT at 4 V
VBAT at 3.6 V
0.91
Efficience - %
0.89
0.87
VBAT at 3 V
0.85
VBAT at 2.5 V
0.83
0.81
0.79
0.77
0.75
0
0.2
0.4
0.6
0.8
1
ICHG - Charge Current - A
1.2
1.4
1.6
Figure 10. VIN Efficiency versus Charge Current
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
13
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
Figure 11. Charge Current Response – 550mA to 1.55A
CH1: VIN, CH2: VBAT, CH3: IBAT, CH4: IVIN
Figure 12. Input Current Regulation Response – 100mA to No Limit
CH1: VIN, CH2: VBAT, CH3: IBAT, CH4: IVIN
14
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
2%
VIN = 5 V, VBAT = 3.6 V
1%
VIN = 5 V, VBAT = 3 V
0%
VIN = 5 V, VBAT = 4 V
-1 %
-2 %
VBUS = 5 V, VBAT = 3.6 V
-3 %
VBUS = 5 V, VBAT = 4 V
-4 %
VBUS = 5 V, VBAT = 3 V
-5 %
-6 %
0
20
40
60
80
100
120
Figure 13. Typical Charge Current Accuracy
Figure 14. VBUS OTG in PFM Mode
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
15
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
92
Efficiency (%)
91
90
89
88
87
86
0.1
0.15
0.2
0.25
0.3
0.35
0.4
0.45
0.5
0.55
Boost Output current (A)
Figure 15. VBUS OTG Efficiency
DETAILED FUNCTIONAL DESCRIPTION
The bq24140 is a highly integrated dual input switch-mode battery charger with USB-OTG support. Due to the
switch-mode architecture, it provides the capability of charging the battery faster than traditional linear chargers
in the event that the power source is current limited, such as USB ports. In addition to the reduced charge time,
higher efficiencies reduce the power losses through the charger and allows for better thermal management of the
end product.
The bq24140 integrates a dual input 3MHz synchronous switching charger that targets space limited portable
applications powered by a single cell Li based battery pack. In addition to charge the battery, the bq24140
provides support for simultaneously boosting the battery voltage back to the USB input for USB-OTG support.
The bq24140 has two operation modes: default mode and host-control mode. In default mode, the charger will
start a charge cycle with the default parameters and wait for an I2C write to the IC before entering host-mode. In
host-control mode, the charger will switch to a 32s watchdog timer and the charge paramters will follow the
information set on the registers.
The bq24140 provides three ways of configuring the charger, charge mode, boost mode and high impedance
mode. These 3 configuration allows for multiple possible settings of the charge systems, including charging the
battery and providing power to an accessory. The high impedance mode reduces the quiescent current from the
device, effectively reducing the power consumption when the portable device is in standby mode. Integrated
control loops ensure smooth transitions between the different operating modes.
PWM Buck Charger
The IC provides an integrated, fixed 3 MHz frequency voltage-mode controller to regulate charge current or
voltage. This type of controller is used to improve line transient response, thereby, simplifying the compensation
network used for both continuous and discontinuous current conduction operation. The voltage and current loops
are internally compensated using a Type-III compensation scheme that provides enough phase margin for stable
operation, allowing the use of small ceramic capacitors with very low ESR. The device operates between 0% to
99.5% duty cycles.
The IC has back to back common-drain N-channel FETs at the high side and one N-channel FET at low side for
both VIN and VBUS inputs. The input N-FETs (Q1, Q4) prevents battery discharge when VIN and/or VBUS is
lower than VBAT. The second high-side N-FET (Q2, Q5) are the switching FETs. A charge pump circuit is used
to provide gate drive for Q1 and Q4, while a bootstrap circuit with an external bootstrap capacitor is used to
supply the gate drive voltage for Q2 and Q5.
16
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
Cycle-by-cycle current limit is sensed through FETs Q4 and Q5 for the high side current limit and through Q3 and
Q6 for the low side current limit. The high side current limit threshold is set to a nominal 2.4-A peak current. The
low-side current limit decides if the PWM Controller will operate in synchronous or non-synchronous mode. This
threshold is set to 100mA and it turns off the low-side N-channel FETs (Q3 and/or Q6) before the current
reverses, preventing the battery from discharging. Synchronous operation is used when the current of the
low-side FET is greater than 100mA to minimize power losses.
If the battery voltage is below the V(SHORT) threshold, the bq24140 applies the short circuit current, I(SHORT), to
the battery. The purpose of this current is to close an open protector on the battery pack. Once the battery
voltage rises above VSHORT, the bq24140 ramps us the charge current to the programmed ICHARGE value. If the
programmed charge current requires an input current that is higher than the programmed IIN_LIMIT value, then the
bq24140 will regulate the input current and the charge current will be limited by the input current loop. The slew
rate for fast charge current is controlled to minimize the current and voltage over-shoot during transient. Both the
input current limit, IIN_LIMIT, and fast charge current, ICHARGE, can be set by the host. Once the battery voltage
reaches the programmed regulation voltage, VOREG, the charge current is tapered down. (See Figure 16 and
Figure 17.
VOREG
Precharge Phase
(Linear Charge)
Fastcharge Phase
(PWM Charge)
Voltage Regulation Phase
(PWM Charge)
ICHARGE
Charge Voltage
VSHORT
Charge Current
Termination
ISHORT
Figure 16. Typical Charging Profile for No Input Current Limit
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
17
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
VOREG
Precharge Phase
(Linear Charge)
Fastcharge Phase
(PWM Charge)
Voltage Regulation Phase
(PWM Charge)
Charge Voltage
VSHORT
Charge Current
Termination
ISHORT
Figure 17. Typical Charging Profile With Input Current Limit
The voltage regulation feedback occurs by monitoring the battery-pack voltage between the VBAT and GND
pins. The regulation voltage is adjustable (3.5V to 4.44V) and is programmed through I2C interface. The IC
monitors the charging current during the voltage regulation phase. When the termination is enabled, once the
termination threshold, ITERM, is detected and the battery voltage is above the recharge threshold, the IC
terminates charge. The termination current level is programmable. To disable the charge current termination, the
host can set the charge termination bit (TE) of charge control register to 0, refer to I2C section for detail.
A
•
•
•
new charge cycle is initiated when one of the following conditions is detected:
The battery voltage falls below the V(OREG) – V(RCH) threshold.
VBUS or VIN Power-on reset (POR), if battery voltage is below the V(LOWV) threshold.
CE bit toggle or RESET bit is set (Host controlled)
Figure 18 shows an operational flow chart of the bq24140 in charge mode.
18
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
IC unpowered
Attach VIN
and/or VBUS
DEFAULT mode
CD Pin Low?
No
Hi-Z mode
Yes
Good input
power?
No
Hi-Z mode
Attach
battery
Yes
Battery
Inserted?
No
Hi-Z mode
Yes
Yes
Battery need
charge?
No
Charge Disable
DEFAULT mode
Charge at
ICHRG=325mA up
to VBAT =3.54V
HOST mode
controlled
charging at ICHRG
up to VOREG
I2C
communication
?
No
No
Watchdog
timer expired?
15-min timer
expired?
Yes
No
VBAT >VRCHG ,Term
Enabled and ITERM
reached?
Hi-Z mode
Yes
Yes
No
Input Power
POR?
Hi-Z mode
Figure 18. Operational Flowchart
POWER UP
When a power source is first connected to the bq24140, the IC will go to default mode for 15 minutes. In default
mode, the bq24140 is configured with safe charging parameters for charge current, charge voltage and input
current. Once a write event is done to the bq24140 through I2C, the device enters host mode and the device will
then follow the parameters as they are written by the host.
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
19
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
During initial power up in default mode, the device will look at the battery voltage. If the battery voltage is less
than the VLOWV, the device will charge the battery with a default charge current of 325mA and a default battery
charge voltage of 3.54V. The input current limit value depends on which power source was used. In the case the
bq24140 is powered up from the VIN source, the input current limit is set to 500mA. If the device is powered up
from the VBUS source, the input current limit depends on the status of the OTG pin. If the OTG pin is low, the
input current limit is set to 100mA. If the OTG pin is high, the input current limit is set to 500mA.
INPUT POWER SOURCE PRIORITY
When two power supplies are detected in default mode, the bq24140 will default to VIN operation and the VBUS
input will go to high impedance. There is a blanking time between switching from one power source to the other
power source of 10ms (tHANDOFF). The state diagram below describes the operation (Figure 19).
Input Power Source Switch Over State Diagram
VBUS Charging Active
No
VIN > VUVLO?
Yes
Bad Adaptor Detection
for VIN
No
VIN Adaptor
Good?
Yes
Set /CE bit (B2, Register 1,
0x6b) high
Delay THANDOFF
10 ms
Start VIN Charging
Figure 19. Input power source selection in default mode
In the case where the bq24140 is in host mode, power priority will be dictated by the Host by setting one input to
high impedance and activating the other input using the HZ_MODE bit of the control register.
20
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
BAD ADAPTOR DETECTION
At POR of VBUS or VIN, the IC performs the bad adaptor detection by applying a current sink of 30mA to the
valid power pin. If the power pin is higher than VIN(MIN) for 30ms, the adaptor is good and the charge process
begins. Otherwise, if the power pin drops below VIN(MIN), a bad adaptor is detected. Once a bad adaptor is
detected, the IC disables the current sink, sends a send fault pulse in FAULT pin and sets the bad adaptor flag
(B2-B0=011 for Register 0x00). After a delay of TINT, the IC repeats the adaptor detection process, as shown in
the flowchart below:
VIN or VBUS POR
Delay 1ms
Enable Adaptor Detection
Start 30ms timer
Enable 30mA current source
VIN or VBUS
>
VIN MIN?
No
Yes
30ms Timer
expired?
No
Bad Adaptor Detected
Pulse STAT pin
Set Bad Adaptor Flag
Good Adaptor Detected
Disable Adaptor Detection
Start Charge
Enable VIN DPM
Delay TINT
2s
Figure 20. Bad Adaptor Detection
BATTERY DETECTION
Battery detection during charging
During normal charging process with host control, once the voltage at the VBAT pin is above the battery
recharge threshold, VOREG–VRCH, and the termination charge current is detected, the IC turns off the PWM
charge and enables a discharge current, IDETECT, for a period of tDETECT, then checks the battery voltage. If the
battery voltage is still above recharge threshold, the IC concludes that the battery is present and charge is
completed. On the other hand, if the battery voltage is below battery recharge threshold, the IC concludes that
the battery was removed. Under this condition, the charge parameters (such as input current limit) are reset to
the default values and charge resumes after a delay of tINT. This function ensures that the charge parameters are
reset whenever the battery is replaced.
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
21
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
Battery detection during power-up
The bq24140 also has a unique battery detection scheme during the start up of the charger. At power up, if the
timer is in 15-minute mode, bq24140 will start a 262ms timer when exiting from short circuit mode to PWM
charge mode. If the battery voltage is charged to recharge threshold (VOREG–VRCH) and the 262ms timer has not
expired yet, or battery voltage is above output OVP threshold during short-circuit mode, bq24140 will consider
the battery is not present; then stop charging and go to high impedance mode immediately. However, if the
262ms timer has expired before the recharge threshold is reached, the charging process will continue as normal.
HIGH-SIDE LED DRIVER
The LED pin is a high-side LED driver. This LED function needs to run from the battery and the expected output
current can be programmed through I2C. There are 2 bits for programming the output current from the LED pin.
In addition, there is extra programmability for the LED function. Since there is only one LED driver used by both
the VIN and VBUS charger cores, there is only one LED register that can be accessed through the addresses
6AH and 6BH. When one of the two addresses is written, the settings for both cores will be set. Refer to the
Register Description Section for details on the LED programmable timings and current options.
BOOST CONVERTER OPERATION
The bq24140 support USB-OTG for the VBUS pin when OTG mode is enabled. In this configuration, the battery
voltage is boosted to 5.05V (±3%). The maximum output current for the boost converted is increased to 650mA
minimum current.
Boost Start Up
To prevent the inductor saturation and limit the inrush current, a soft-start control is applied during the boost start
up.
PFM Mode at Light Load
In boost mode, the IC operates in pulse skipping mode (PFM mode) to reduce the power loss and improve the
converter efficiency at light load condition. During boosting, the PWM converter is turned off if the inductor
current falls below than 200mA. The PWM is turned back on only when the voltage at PMID pin drops to 99.5%
of the typical rated output voltage. A unique pre-set circuit is used to make the smooth transition between PWM
and PFM mode.
Safety Timer in Boost Mode
At the beginning of boost operation, the IC starts a 32-second timer that is reset by the host using the I2C
interface. Writing “1” to reset bit of TMR_RST in control register will reset the 32-second timer and TMR_RST is
automatically set to “0” after the 32-second timer is reset. Once the 32-second timer expires, the IC turns off the
boost converter, enunciates the fault pulse from the STAT pin and sets fault status bits in the status register. The
fault condition is cleared by POR or host control.
Charge Status Output, STAT Pin
The STAT pin is used to indicate operation conditions for bq24140. STAT is pulled low during charging when
EN_STAT bit in control register (00H) is set to “1”. Under other conditions, STAT pin behaves as a high
impedance (open-drain) output. Under fault conditions, a 128-μs pulse will be sent out to notify the host. The
status of STAT pin at different operation conditions is summarized in Table 1. The STAT pin can be used to drive
an LED or communicate to the host processor.
Table 1. STAT Pin Summary
22
CHARGE STATE
STAT
Charge in progress and EN_STAT = 1
Low
Other normal conditions
Open-Drain
Charge mode faults and input not in HiZ
128 µs pulse, then open-drain
Boost mode faults and input not in HiZ
128 µs pulse, then open-drain
VIN Present bit change (H→L or L→H) regardless of HiZ status
128 µs pulse, then normal per above cases
VBUS Present bit change (H→L or L→H) regardless of HiZ status
128 µs pulse, then normal per above cases
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
Safety Limit Registers
The bq24140 includes safety limit registers which are used as an extra level of security for devices that allow
applications to be developed by third party vendors (i.e. Android OS). The purpose of the safety limit registers is
to program the maximum allowable battery regulation voltage and charge current. These two registers need to be
written before any other write actions are sent to the bq24140. Once a write action to a register other than the
safety limit registers, the values on the safety limit registers will be locked.
SLRST Pin
When SLRST=0, the bq24140 will reset all the safety limits to default values, regardless of the write actions to
safety limits registers (06H). When SLRST=1, the bq24140 can program the safety limit register until any write
action to other registers locks the programmed safety limits.
VREG LDO
The bq24140 includes a 2.6V LDO that can be used as an indication of the VIN input being connected. This LDO
is active all the time when there is a power source connected to the VIN input. The current limit on the LDO
guarantees up to 10mA.
SERIAL INTERFACE DESCRIPTION
I2C is a 2-wire serial interface developed by Philips Semiconductor (see I2C-Bus Specification, Version 2.1,
January 2000). The bus consists of a data line (SDA) and a clock line (SCL) with pull-up structures. When the
bus is idle, both SDA and SCL lines are pulled high. All the I2C compatible devices connect to the I2C bus
through open drain I/O pins, SDA and SCL. A master device, usually a microcontroller or a digital signal
processor, controls the bus. The master is responsible for generating the SCL signal and device addresses. The
master also generates specific conditions that indicate the START and STOP of data transfer. A slave device
receives and/or transmits data on the bus under control of the master device.
The IC works as a slave and is compatible with the following data transfer modes, as defined in the I2C-Bus
Specification: standard mode (100 kbps), fast mode (400 kbps), and high-speed mode (up to 3.4 Mbps in write
mode). The interface adds flexibility to the battery charge solution, enabling most functions to be programmed to
new values depending on the instantaneous application requirements. Register contents remain intact as long as
supply voltage remains above 2.2 V (typical). I2C is asynchronous, which means that it runs off of SCL. The
device has no noise or glitch filtering on SCL, so SCL input needs to be clean. Therefore, it is recommended that
SDA changes while SCL is LOW.
The data transfer protocol for standard and fast modes is exactly the same, therefore, they are referred to as
F/S-mode in this document. The protocol for high-speed mode is different from the F/S-mode, and it is referred to
as HS-mode. The IC supports 7-bit addressing only. The device has two 7-bit addresses, defined as
‘1101011’ (6BH) for USB portion and, and ‘1101010’ (6AH) for AC portion.
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
23
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
REGISTER DESCRIPTION
For I2C address 6BH (USB Charger)
Status/Control Register (READ/WRITE)
Memory location: 00, Reset state: x1xx 0xxx
BIT
NAME
Read/Write
FUNCTION
TMR_RST/OTG
Read/Write
Write: TMR_RST function, write “1” to reset the safety timer (auto clear)
Read: OTG pin status, 0-OTG pin at Low level, 1-OTG pin at High level;
B6
EN_STAT
Read/Write
0-Disable STAT pin function, 1-Enable STAT pin function (default 1)
B5
STAT2
Read only
00-Ready, 01-Charge in progress, 10-Charge done, 11-Fault
B4
STAT1
Read only
B3
BOOST
Read only
Boost mode, 0—Not in boost mode.
B2
FAULT_3
Read only
B1
FAULT_2
Read only
Charge mode: 000-Normal, 001-VBUS OVP, 010-Sleep mode, 011-Bad Adaptor or
VBUS<VUVLO, 100-Output OVP, 101-Thermal shutdown, 110-Timer fault, 111-No battery
B0(LSB)
FAULT_1
Read only
B7(MSB)
Boost mode: 000-Normal, 001-VBUS OVP, 010-Over load, 011-Battery voltage is too low,
100-Battery OVP, 101-Thermal shutdown, 110-Timer fault, 111-NA
Control Register (READ/WRITE)
Memory location: 01, Reset state: 0011 0000
BIT
NAME
Read/Write
FUNCTION
B7(MSB)
Iin_Limit_2
Read/Write
B6
Iin_Limit_1
Read/Write
00-USB host with 100-mA current limit, 01-USB host with 500-mA current limit, 10-USB
host/charger with 800-mA current limit, 11-No input current limit (default 00)
B5
VLOWV_2 (1)
Read/Write
200 mV weak battery voltage threshold (default 1)
B4
VLOWV_1
(1)
Read/Write
100 mV weak battery voltage threshold (default 1)
B3
TE
Read/Write
1-Enable charge current termination, 0-Disable charge current termination (default 0)
B2
CE
Read/Write
1-Charger is disabled, 0-Charger enabled (default 0)
B1
HZ_MODE
Read/Write
1-High impedance mode, 0-Not high impedance mode (default 0)
OPA_MODE
Read/Write
1-Boost mode, 0-Charger mode (default 0)
B0(LSB)
(1)
The range of weak battery voltage threshold (VLOWV) is 3.4V–3.7V with the offset of 3.4V and step of 100mV (default 3.7V).
Control/Battery Voltage Register (READ/WRITE)
Memory location: 02, Reset state: 0000 1010
•
24
BIT
NAME
Read/Write
FUNCTION
B7(MSB)
VOREG5
Read/Write
Battery Regulation Voltage: 640 mV (default 0)
B6
VOREG4
Read/Write
Battery Regulation Voltage: 320 mV (default 0)
B5
VOREG3
Read/Write
Battery Regulation Voltage: 160 mV (default 0)
B4
VOREG2
Read/Write
Battery Regulation Voltage: 80 mV (default 0)
B3
VOREG1
Read/Write
Battery Regulation Voltage: 40 mV (default 1)
B2
VOREG0
Read/Write
Battery Regulation Voltage: 20 mV (default 0)
B1
OTG_PL
Read/Write
Active at High level, 0-Active at Low level (default 1)
B0(LSB)
OTG_EN
Read/Write
Enable OTG Pin, 0-Disable OTG pin (default 0)
Charge voltage range is 3.5V–4.44V with the offset of 3.5V and step of 20mV (default 3.54V).
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
Vender/Part/Revision Register (READ only)
Memory location: 03, Reset state: 0101 0000
BIT
NAME
Read/Write
FUNCTION
B7(MSB)
Vender2
Read only
Vender Code: bit 2 (default 0)
B6
Vender1
Read only
Vender Code: bit 1 (default 1)
B5
Vender0
Read only
Vender Code: bit 0 (default 0)
B4
PN1
Read only
10
B3
PN0
Read only
B2
Revision2
Read only
B1
Revision1
Read only
B0(LSB)
Revision0
Read only
000: Revision 1.0
Battery Termination/Fast Charge Current Register (READ/WRITE)
Memory location: 04, Reset state: 0000 0001
•
•
BIT
NAME
Read/Write
FUNCTION
B7(MSB)
Reset
Write only
Write: 1-Charger in reset mode, 0-No effect
Read: always get “0”
B6
VICHRG3
Read/Write
Charge current sense voltage: 27.2mV
B5
VICHRG2
Read/Write
Charge current sense voltage: 13.6mV
B4
VICHRG1
Read/Write
Charge current sense voltage: 6.8mV
B3
VICHRG0
Read/Write
Charge current sense voltage: NA
B2
VITERM2
Read/Write
Termination current sense voltage: 13.6mV (default 0)
B1
VITERM1
Read/Write
Termination current sense voltage: 6.8mV (default 0)
B0(LSB)
VITERM0
Read/Write
Termination current sense voltage: 3.4mV (default 1)
Charge current sense voltage offset is 37.4mV and default charge current is 550mA, if 68-mΩ sensing
resistor is used and LOW_CHG=0.
The maximum charge current is 1.25A (Rsns=68mΩ) when charging from VBUS. If a higher value is
programmed, the 1.25A or maximum safety limit charge current is selected
Special Charger Voltage/Enable Pin Status Register
Memory location: 05, Reset state: 001X X100
BIT
NAME
Read/Write
FUNCTION
NA
Read/Write
NA
B6
VBUS_PRESENT
Read Only
0—VBUS not connected, 1—VBUS present
B5
LOW_CHG
Read/Write
0—Normal charge current sense voltage at 04H,
1—Low charge current sense voltage of 22.1mV (default 1)
B4
DPM_STATUS
Read Only
0—DPM mode is not active, 1—DPM mode is active
B3
VIN_PRESENT
Read Only
0—VIN not connected, 1—Vin present
B2
VSREG2
Read/Write
Special charger voltage: 320 mV (default 1)
B1
VSREG1
Read/Write
Special charger voltage: 160 mV (default 0)
B0(LSB)
VSREG0
Read/Write
Special charger voltage: 80 mV (default 0)
B7(MSB)
•
•
Special charger voltage offset is 4.2V and default special charger voltage is 4.52V.
Default charge current will be 325mA, if 68-mΩ sensing resistor is used, since default LOW_CHG=1.
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
25
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
Safety Limit Register (READ/WRITE, Write only once after reset!)
Memory location: 06, Reset state: 01000000
BIT
•
•
NAME
Read/Write
FUNCTION
B7(MSB)
VMCHRG3
Read/Write
Maximum charge current sense voltage: 54.4 mV (default 0)
B6
VMCHRG2
Read/Write
Maximum charge current sense voltage: 27.2 mV (default 1)
B5
VMCHRG1
Read/Write
Maximum charge current sense voltage: 13.6 mV (default 0)
B4
VMCHRG0
Read/Write
Maximum charge current sense voltage: 6.8 mV (default 0)
B3
VMREG3
Read/Write
Maximum battery regulation voltage: 160 mV (default 0)
B2
VMREG2
Read/Write
Maximum battery regulation voltage: 80 mV (default 0)
B1
VMREG1
Read/Write
Maximum battery regulation voltage: 40 mV (default 0)
B0(LSB)
VMREG0
Read/Write
Maximum battery regulation voltage: 20 mV (default 0)
Maximum charge current sense voltage offset is 550mA (default at 950mA) and the maximum charge current
option is 1.55A, if 68-mΩ sensing resistor is used.
Maximum battery regulation voltage offset is 4.2V (default at 4.2V) and maximum battery regulation voltage
option is 4.44V.
LED Configuration Register
Memory location: 07, Reset state: 10000010
26
BIT
NAME
Read/Write
FUNCTION
B7(MSB)
ILED1
Read/Write
B6
ILED0
Read/Write
00 –
01 –
10 –
11 –
B5
NA
Read Only
Returns 0
B4
LED_CTRL
Read/Write
0 – LED On when charging is Active (default)
1 – LED On regardless of charging status
B3
t_LEDON1
Read/Write
B2
t_LEDON0
Read/Write
00 –
01 –
10 –
11 –
LED
LED
LED
LED
On time 130ms (default)
On time 260ms
On time 520ms
Constant On
B1
t_LEDOFF1
Read/Write
00 –
01 –
10 –
11 –
LED
LED
LED
LED
Off time 390ms
Off time 780ms
Off time 1560ms (default)
Off time 3120ms
B0(LSB)
t_LEDOFF0
Read/Write
LED
LED
LED
LED
Off
current 1.25mA
current 2.5mA (default)
current 5mA
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
For I2C address 6AH (AC Charger)
Status/Control Register (READ/WRITE)
Memory location: 00, Reset state: x1xx 0xxx
BIT
NAME
Read/Write
FUNCTION
TMR_RST/OTG
Read/Write
Write: TMR_RST function, write “1” to reset the safety timer (auto clear)
Read: SLRST pin status, 0-SLRST pin at LOW level, 1-SLRST pin at HIGH level.
B6
EN_STAT
Read/Write
0-Disable STAT pin function, 1-Enable STAT pin function (default 1)
B5
STAT2
Read only
00-Ready, 01-Charge in progress, 10-Charge done, 11-Fault
B4
STAT1
Read only
B3
NA
Read only
NA
B2
FAULT_3
Read only
B1
FAULT_2
Read only
Charge mode: 000-Normal, 001-VBUS OVP, 010-Sleep mode, 011-Bad Adaptor or
VBUS<VUVLO, 100-Output OVP, 101-Thermal shutdown, 110-Timer fault, 111-No
battery
B0(LSB)
FAULT_1
Read only
B7(MSB)
Control Register (READ/WRITE)
Memory location: 01, Reset state: 0111 0000
BIT
NAME
Read/Write
FUNCTION
B7(MSB)
Iin_Limit_2
Read/Write
00-USB host with 100-mA current limit, 01-USB host with 500-mA current limit, 10-USB
host/charger with 800-mA current limit, 11-No input current limit (default 01)
B6
Iin_Limit_1
Read/Write
B5
VLOWV_2
(1)
Read/Write
200mV weak battery voltage threshold (default 1)
B4
VLOWV_1 (1)
Read/Write
100mV weak battery voltage threshold (default 1)
B3
TE
Read/Write
1-Enable charge current termination, 0-Disable charge current termination (default 0)
B2
/CE
Read/Write
1-Charger is disabled, 0-Charger enabled (default 0)
B1
HZ_MODE
Read/Write
1-High impedance mode, 0-Not high impedance mode (default 0)
B0(LSB)
NA
Read/Write
NA
(1)
The range of weak battery voltage threshold (VLOWV) is 3.4V–3.7V with the offset of 3.4V and step of 100mV (default 3.7V).
Control/Battery Voltage Register (READ/WRITE)
Memory location: 02, Reset state: 0000 1010
•
BIT
NAME
Read/Write
FUNCTION
B7(MSB)
VOREG5
Read/Write
Battery Regulation Voltage: 640 mV (default 0)
B6
VOREG4
Read/Write
Battery Regulation Voltage: 320 mV (default 0)
B5
VOREG3
Read/Write
Battery Regulation Voltage: 160 mV (default 0)
B4
VOREG2
Read/Write
Battery Regulation Voltage: 80 mV (default 0)
B3
VOREG1
Read/Write
Battery Regulation Voltage: 40 mV (default 1)
B2
VOREG0
Read/Write
Battery Regulation Voltage: 20 mV (default 0)
B1
NA
Read/Write
NA
B0(LSB)
NA
Read/Write
NA
Charge voltage range is 3.5V–4.44V with the offset of 3.5V and step of 20mV (default 3.54V).
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
27
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
Vender/Part/Revision Register (READ only)
Memory location: 03, Reset state: 0100 0000
BIT
NAME
Read/Write
FUNCTION
B7(MSB)
Vender2
Read only
Vender Code: bit 2 (default 0)
B6
Vender1
Read only
Vender Code: bit 1 (default 1)
B5
Vender0
Read only
Vender Code: bit 0 (default 0)
B4
PN1
Read only
00
B3
PN0
Read only
B2
Revision2
Read only
B1
Revision1
Read only
B0(LSB)
Revision0
Read only
000: Revision 1.0
Battery Termination/Fast Charge Current Register (READ/WRITE)
Memory location: 04, Reset state: 0000 0001
BIT
NAME
Read/Write
FUNCTION
B7(MSB)
Reset
Write only
Write: 1-Charger in reset mode, 0-No effect
Read: always get “0”
B6
VICHRG3
Read/Write
Charge current sense voltage: 54.4 mV (default 0)
B5
VICHRG2
Read/Write
Charge current sense voltage: 27.2 mV (default 0)
B4
VICHRG1
Read/Write
Charge current sense voltage: 13.6 mV (default 0)
B3
VICHRG0
Read/Write
Charge current sense voltage: 6.8 mV (default 0)
B2
VITERM2
Read/Write
Termination current sense voltage: 13.6 mV (default 0)
B1
VITERM1
Read/Write
Termination current sense voltage: 6.8 mV (default 0)
B0(LSB)
VITERM0
Read/Write
Termination current sense voltage: 3.4 mV (default 1)
•
•
Charge current sense voltage offset is 37.4mV and default charge current is 550mA, if 68-mΩ sensing
resistor is used and LOW_CHG=0.
The maximum charge current is 1.55A when charging from VIN. If a higher value is programmed, the 1.55A
or maximum safety limit charge current is selected.
Special Charger Voltage/Enable Pin Status Register
Memory location: 05, Reset state: 001X X100
BIT
NAME
Read/Write
FUNCTION
NA
Read/Write
NA
B6
VIN_PRESEN
T
Read Only
0—VIN not connected, 1—Vin present
B5
LOW_CHG
Read/Write
0—Normal charge current sense voltage at 04H, 1—Low charge current sense voltage
of 22.1mV (default 1)
B4
DPM_STATUS Read Only
0—DPM mode is not active, 1—DPM mode is active
B3
CD_STATUS
Read Only
0—CD pin at LOW level, 1—CD pin at HIGH level
B2
VSREG2
Read/Write
Special charger voltage: 320mV (default 1)
B1
VSREG1
Read/Write
Special charger voltage: 160mV (default 0)
B0(LSB)
VSREG0
Read/Write
Special charger voltage: 80mV (default 0)
B7(MSB)
•
•
28
Special charger voltage offset is 4.2V and default special charger voltage is 4.52V.
Default charge current will be 325mA, if 68-mΩ sensing resistor is used, since default LOW_CHG=1.
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
Safety Limit Register (READ/WRITE, Write only once after reset!)
Memory location: 06, Reset state: 01000000
BIT
•
•
•
NAME
Read/Write
FUNCTION
B7(MSB)
VMCHRG3
Read/Write
Maximum charge current sense voltage: 54.4 mV (default 0)
B6
VMCHRG2
Read/Write
Maximum charge current sense voltage: 27.2 mV (default 1)
B5
VMCHRG1
Read/Write
Maximum charge current sense voltage: 13.6 mV (default 0)
B4
VMCHRG0
Read/Write
Maximum charge current sense voltage: 6.8 mV (default 0)
B3
VMREG3
Read/Write
Maximum battery regulation voltage: 160 mV (default 0)
B2
VMREG2
Read/Write
Maximum battery regulation voltage: 80 mV (default 0)
B1
VMREG1
Read/Write
Maximum battery regulation voltage: 40 mV (default 0)
B0(LSB)
VMREG0
Read/Write
Maximum battery regulation voltage: 20 mV (default 0)
Maximum charge current sense voltage offset is 550mA (default at 950mA) and the maximum charge current
option is 1.55A, if 68-mΩ sensing resistor is used.
Maximum battery regulation voltage offset is 4.2V (default at 4.2V) and maximum battery regulation voltage
option is 4.44V.
Memory location 06 resets only when VBAT voltage drops below VSHORT threshold (typ.2.05V) or SLRST (pin
C3) goes to logic ‘0’. After reset, the maximum values for battery regulation voltage and charge current can
be programmed many times until any writing to other register locks the safety limits. Programmed values
exclude higher values from memory locations 02 (battery regulation voltage), and from memory location 04
(Fast charge current).
If host accesses (write command) to some other register before safety limit register, the default values hold!
LED Configuration Register
Memory location: 07, Reset state: 10000010
BIT
NAME
Read/Write
FUNCTION
B7(MSB)
ILED1
Read/Write
B6
ILED0
Read/Write
00 –
01 –
10 –
11 –
B5
NA
Read Only
Returns 0
B4
LED_CTRL
Read/Write
0 – LED On when charging is Active (default)
1 – LED On regardless of charging status
B3
t_LEDON1
Read/Write
B2
t_LEDON0
Read/Write
00 –
01 –
10 –
11 –
LED
LED
LED
LED
On time 13 ms (default)
On time 260 ms
On time 520 ms
Constant On
B1
t_LEDOFF1
Read/Write
B0(LSB)
t_LEDOFF0
Read/Write
00 –
01 –
10 –
11 –
LED
LED
LED
LED
Off time 390 ms
Off time 780 ms
Off time 1560 ms (default)
Off time 3120 ms
LED
LED
LED
LED
Off
current 1.25 mA
current 2.5 mA (default)
current mA
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
29
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
APPLICATION SECTION
Charge Current Sensing Resistor Selection Guidelines
Both the termination current range and charge current range depend on the sensing resistor (RSNS). The
termination current step (IOTERM_STEP) can be calculated using Equation 1:
IO(TERM_STEP) =
VI(TERM0)
R(SNS)
(1)
Table 2 shows the termination current settings for three sensing resistors.
Table 2. Termination Current Settings for 55-mΩ, 68-mΩ, 100-mΩ Sense Resistors
BIT
VI(TERM) (mV)
I(TERM) (mA)
R(SNS) = 55mΩ
I(TERM) (mA)
R(SNS) = 68mΩ
I(TERM) (mA)
R(SNS) = 100mΩ
VI(TERM2)
13.6
247
200
136
VI(TERM1)
6.8
124
100
68
VI(TERM0)
3.4
62
50
34
Offset
3.4
62
50
34
The charge current step (IO(CHARGE_STEP)) is calculated using Equation 2:
IO(CHARGE_STEP) =
VI(CHRG0)
R(SNS)
(2)
Table 3 shows the charge current settings for three sensing resistors.
Table 3. Charge Current Settings for 55-mΩ, 68-mΩ and 100-mΩ Sense Resistors
BIT
VI(REG) (mV)
IO(CHARGE) (mA)
R(SNS) = 55mΩ
IO(CHARGE) (mA)
R(SNS) = 68mΩ
IO(CHARGE) (mA)
R(SNS) = 100mΩ
VI(CHRG3)
54.4
989
800
544
VI(CHRG2)
27.2
495
400
272
VI(CHRG1)
13.6
247
200
136
VI(CHRG0)
6.8
124
100
68
Offset
37.4
680
550
374
Output Inductor and Capacitance Selection Guidelines
The IC provides internal loop compensation. With the internal loop compensation, the highest stability occurs
when the LC resonant frequency, fo, is approximately 40 kHz (20 kHz to 80 kHz). Equation 3 can be used to
calculate the value of the output inductor, LOUT, and output capacitor, COUT.
fo =
1
2p ´
LOUT ´ COUT
(3)
To reduce the output voltage ripple, a ceramic capacitor with the capacitance between 4.7 μF and 47 μF is
recommended for COUT, see the application section for components selection.
30
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
POWER TOPOLOGIES
System Load After Sensing Resistor
One of the simpler high-efficiency topologies connects the system load directly across the battery pack, as
shown in Figure 21. The input voltage has been converted to a usable system voltage with good efficiency from
the input. When the input power is on, it supplies the system load and charges the battery pack at the same time.
When the input power is off, the battery pack powers the system directly.
SW
VBUS
L1
VIN
+
-
Isys
Isns
Rsns
Ichg
bq2414x
C1
PMID
+
PGND
C4
C3
System
Load
BAT
C2
Figure 21. System Load After Sensing Resistor
The advantages:
1. When the AC adapter is disconnected, the battery pack powers the system load with minimum power
dissipation. Consequently, the time that the system runs on the battery pack can be maximized.
2. It reduces the number of external path selection components and offers a low-cost solution.
3. Dynamic power management (DPM) can be achieved. The total of the charge current and the system current
can be limited to a desired value by setting the charge current value. When the system current increases, the
charge current drops by the same amount. As a result, no potential over-current or over-heating issues are
caused by excessive system load demand.
4. The total input current can be limited to a desired value by setting the input current limit value. USB
specifications can be met easily.
5. The supply voltage variation range for the system can be minimized.
6. The input current soft-start can be achieved by the generic soft-start feature of the IC.
Design considerations and potential issues:
1. If the system always demands a high current (but lower than the regulation current), the battery charging
never terminates. Thus, the battery is always charged, and its lifetime may be reduced.
2. Because the total current regulation threshold is fixed and the system always demands some current, the
battery may not be charged with a full-charge rate and thus may lead to a longer charge time.
3. If the system load current is large after the charger has been terminated, the IR drop across the battery
impedance may cause the battery voltage to drop below the refresh threshold and start a new charge cycle.
The charger would then terminate due to low charge current. Therefore, the charger would cycle between
charging and terminating. If the load is smaller, the battery has to discharge down to the refresh threshold,
resulting in a much slower cycling.
4. In a charger system, the charge current is typically limited to about 30mA, if the sensed battery voltage is
below 2V short circuit protection threshold. This results in low power availability at the system bus. If an
external supply is connected and the battery is deeply discharged, below the short circuit protection
threshold, the charge current is clamped to the short circuit current limit. This then is the current available to
the system during the power-up phase. Most systems cannot function with such limited supply current, and
the battery supplements the additional power required by the system. Note that the battery pack is already at
the depleted condition, and it discharges further until the battery protector opens, resulting in a system
shutdown.
5. If the battery is below the short circuit threshold and the system requires a bias current budget lower than the
short circuit current limit, the end-equipment will be operational, but the charging process can be affected
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
31
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
depending on the current left to charge the battery pack. Under extreme conditions, the system current is
close to the short circuit current levels and the battery may not reach the fast-charge region in a timely
manner. As a result, the safety timers flag the battery pack as defective, terminating the charging process.
Because the safety timer cannot be disabled, the inserted battery pack must not be depleted to make the
application possible.
6. If the battery pack voltage is too low, highly depleted, totally dead or even shorted, the system voltage is
clamped by the battery and it cannot operate even if the input power is on.
System Load Before Sensing Resistor
The second circuit is similar to first one; the difference is that the system load is connected before the sense
resistor, as shown in Figure 22.
Isys
SW
VBUS
Isns
L1
VIN
+
-
Rsns
Ichg
bq2414x
C1
PMID
+
PGND
C4
C3
System
Load
BAT
C2
Figure 22. System Load Before Sensing Resistor
The advantages of system load before sensing resistor to system load after sensing resistor:
1. The charger controller is based only on the current going through the current-sense resistor. So, the constant
current fast charge and termination functions operate without being affected by the system load. This is the
major advantage of having the system load connected before the sense resistor.
2. A depleted battery pack can be connected to the charger without the risk of the safety timer expiration
caused by high system load.
3. The charger can disable termination and keep the converter running to keep battery fully charged; or let the
switcher terminate when the battery is full and then allow the system to run off of the battery through the
sense resistor.
Design considerations and potential issues:
1. The total current is limited by the IC input current limit, or peak current protection, but not the charge current
setting. The charge current does not drop when the system current load increases until the input current limit
is reached. This solution is not recommended if the system requires a high current.
2. Efficiency declines when discharging through the sense resistor to the system.
3. No thermal regulation. Therefore, the system design should ensure the maximum junction temperature of the
IC is below 125°C during normal operation.
32
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
DESIGN EXAMPLE FOR TYPICAL APPLICATION CIRCUIT
Systems Design Specifications:
•
•
•
•
1.
VBUS = 5 V
VBAT = 4.2 V (1-Cell)
I(charge) = 1.25 A
Inductor ripple current = 30% of fast charge current
Determine the inductor value (LOUT) for the specified charge current ripple:
VBAT ´ (VBUS - VBAT)
VBUS ´ f ´ D IL
L OUT =
, the worst case is when battery voltage is as close as to half of the input
voltage.
LOUT =
2.5 ´ (5 - 2.5)
5 ´ (3 ´ 106 ) ´ 1.25 ´ 0.3
(4)
LOUT = 1.11 μH
Select the output inductor to standard 1 μH. Calculate the total ripple current with using the 1-μH inductor:
DIL =
VBAT ´ (VBUS - VBAT)
VBUS ´ f ´ LOUT
(5)
2.5 ´ (5 - 2.5)
DIL =
5 ´ (3 ´ 106 ) ´ (1 ´ 10-6 )
(6)
ΔIL = 0.42 A
Calculate the maximum output current:
DIL
ILPK = IOUT +
2
(7)
0.42
ILPK = 1.25 +
2
(8)
ILPK = 1.46 A
Select 2.5mm by 2mm 1-μH 1.5-A surface mount multi-layer inductor. The suggested inductor part numbers
are shown as following.
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
33
bq24140
SLUSAO5 – OCTOBER 2011
www.ti.com
Table 4. Inductor Part Numbers
PART NUMBER
INDUCTANCE
SIZE
MANUFACTURER
LQM2HPN1R0MJ0
1 μH
2.5 x 2.0 mm
Murata
MIPS2520D1R0
1 μH
2.5 x 2.0 mm
FDK
MDT2520-CN1R0M
1 μH
2.5 x 2.0 mm
TOKO
CP1008
1 μH
2.5 x 2.0 mm
Inter-Technical
2. Determine the output capacitor value (COUT) using 40 kHz as the resonant frequency:
fo =
1
2p ´
COUT =
COUT =
LOUT ´ COUT
(9)
1
4p2 ´ f02 ´ LOUT
1
(10)
4p2 ´ (40 ´ 103 )2 ´ (1 ´ 10-6 )
(11)
COUT = 15.8 μF
Select two 0603 X5R 6.3V 10-μF ceramic capacitors in parallel i.e., Murata GRM188R60J106M.
3. Determine the sense resistor using the following equation:
V(RSNS)
R(SNS) =
I(CHARGE)
(12)
The maximum sense voltage across the sense resistor is 85 mV. In order to get a better current regulation
accuracy, V(RSNS) should equal 85mV, and calculate the value for the sense resistor.
85mV
R(SNS) =
1.25A
(13)
R(SNS) = 68 mΩ
This is a standard value. If it is not a standard value, then choose the next close value and calculate the real
charge current. Calculate the power dissipation on the sense resistor:
P(RSNS) = I(CHARGE) 2 × R(SNS)
P(RSNS) = 1.252 × 0.068
P(RSNS) = 0.106 W
Select 0402 0.125-W 68-mΩ 2% sense resistor, i.e. Panasonic ERJ2BWGR068.
34
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq24140
PACKAGE OPTION ADDENDUM
www.ti.com
27-Oct-2011
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package
Drawing
Pins
Package Qty
Eco Plan
(2)
Lead/
Ball Finish
MSL Peak Temp
(3)
Samples
(Requires Login)
BQ24140YFFR
ACTIVE
DSBGA
YFF
30
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
BQ24140YFFT
ACTIVE
DSBGA
YFF
30
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Apr-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
BQ24140YFFR
DSBGA
YFF
30
3000
180.0
8.4
BQ24140YFFT
DSBGA
YFF
30
250
180.0
8.4
Pack Materials-Page 1
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
2.4
2.7
0.69
4.0
8.0
Q1
2.4
2.7
0.69
4.0
8.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Apr-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
BQ24140YFFR
DSBGA
YFF
30
3000
210.0
185.0
35.0
BQ24140YFFT
DSBGA
YFF
30
250
210.0
185.0
35.0
Pack Materials-Page 2
X: Max = 2.645 mm, Min =2.545 mm
Y: Max = 2.345 mm, Min =2.245 mm
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are
sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard
warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where
mandated by government requirements, testing of all parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
applications using TI components. To minimize the risks associated with customer products and applications, customers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,
or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a
warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual
property of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied
by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive
business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional
restrictions.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all
express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not
responsible or liable for any such statements.
TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably
be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing
such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products
and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be
provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in
such safety-critical applications.
TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are
specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military
specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at
the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.
TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are
designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated
products in automotive applications, TI will not be responsible for any failure to meet such requirements.
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Applications
Audio
www.ti.com/audio
Automotive and Transportation www.ti.com/automotive
Amplifiers
amplifier.ti.com
Communications and Telecom www.ti.com/communications
Data Converters
dataconverter.ti.com
Computers and Peripherals
www.ti.com/computers
DLP® Products
www.dlp.com
Consumer Electronics
www.ti.com/consumer-apps
DSP
dsp.ti.com
Energy and Lighting
www.ti.com/energy
Clocks and Timers
www.ti.com/clocks
Industrial
www.ti.com/industrial
Interface
interface.ti.com
Medical
www.ti.com/medical
Logic
logic.ti.com
Security
www.ti.com/security
Power Mgmt
power.ti.com
Space, Avionics and Defense
www.ti.com/space-avionics-defense
Microcontrollers
microcontroller.ti.com
Video and Imaging
www.ti.com/video
RFID
www.ti-rfid.com
OMAP Mobile Processors
www.ti.com/omap
Wireless Connectivity
www.ti.com/wirelessconnectivity
TI E2E Community Home Page
e2e.ti.com
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2012, Texas Instruments Incorporated