APT32M80J 800V, 33A, 0.19Ω Max N-Channel MOSFET S S Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET. A proprietary planar strip design yields excellent reliability and manufacturability. Low switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. Reliability in flyback, boost, forward, and other circuits is enhanced by the high avalanche energy capability. D G SO 2 T- 27 "UL Recognized" ISOTOP ® file # E145592 D APT32M80J G Single die MOSFET S TYPICAL APPLICATIONS FEATURES • Fast switching with low EMI/RFI • PFC and other boost converter • Low RDS(on) • Buck converter • Ultra low Crss for improved noise immunity • Two switch forward (asymmetrical bridge) • Low gate charge • Single switch forward • Avalanche energy rated • Flyback • RoHS compliant • Inverters Absolute Maximum Ratings Symbol ID Parameter Unit Ratings Continuous Drain Current @ TC = 25°C 33 Continuous Drain Current @ TC = 100°C 20 A IDM Pulsed Drain Current VGS Gate-Source Voltage ±30 V EAS Single Pulse Avalanche Energy 2 1979 mJ IAR Avalanche Current, Repetitive or Non-Repetitive 24 A 1 173 Thermal and Mechanical Characteristics Typ Max Unit W PD Total Power Dissipation @ TC = 25°C 543 RθJC Junction to Case Thermal Resistance 0.23 RθCS Case to Sink Thermal Resistance, Flat, Greased Surface Operating and Storage Junction Temperature Range VIsolation RMS Voltage (50-60hHz Sinusoidal Wavefomr from Terminals to Mounting Base for 1 Min.) WT Torque Package Weight Terminals and Mounting Screws. Microsemi Website - http://www.microsemi.com -55 150 °C/W °C V 2500 1.03 oz 29.2 g 10 in·lbf 1.1 N·m 5-2009 TJ,TSTG 0.15 Rev B Min Characteristic 050-8168 Symbol Static Characteristics TJ = 25°C unless otherwise specified Symbol Parameter Test Conditions Min VBR(DSS) Drain-Source Breakdown Voltage VGS = 0V, ID = 250μA 800 ∆VBR(DSS)/∆TJ Drain-Source On Resistance VGS(th) Gate-Source Threshold Voltage ∆VGS(th)/∆TJ VGS = 10V, ID =24A 3 Zero Gate Voltage Drain Current IGSS Gate-Source Leakage Current Dynamic Characteristics VDS = 1200V VGS = 0V Forward Transconductance Ciss Input Capacitance Crss Reverse Transfer Capacitance Coss Output Capacitance Typ Max 1.41 0.16 4 -10 0.19 5 TJ = 25°C 100 500 ±100 TJ = 125°C VGS = ±30V Unit V V/°C Ω V mV/°C μA nA TJ = 25°C unless otherwise specified Parameter gfs 3 VGS = VDS, ID = 2.5mA Threshold Voltage Temperature Coefficient IDSS Symbol Reference to 25°C, ID = 250μA Breakdown Voltage Temperature Coefficient RDS(on) APT32M80J Min Test Conditions VDS = 50V, ID = 24A VGS = 0V, VDS = 25V f = 1MHz Co(cr) 4 Effective Output Capacitance, Charge Related Co(er) 5 Effective Output Capacitance, Energy Related Typ 43 9326 159 927 Max Unit S pF 438 VGS = 0V, VDS = 0V to 533V 217 Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge td(on) Turn-On Delay Time Resistive Switching Current Rise Time VDD = 533V, ID = 24A tr td(off) tf Turn-Off Delay Time 303 51 155 53 76 231 67 VGS = 0 to 10V, ID = 24A, VDS = 400V RG = 2.2Ω 6 , VGG = 15V Current Fall Time nC ns Source-Drain Diode Characteristics Symbol IS ISM Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Test Conditions MOSFET symbol showing the integral reverse p-n junction diode (body diode) Diode Forward Voltage ISD = 24A, TJ = 25°C, VGS = 0V Reverse Recovery Time ISD = 24A, VDD = 100V 3 Qrr Reverse Recovery Charge dv/dt Peak Recovery dv/dt Typ Max Unit 32 A G trr VSD Min D 173 S diSD/dt = 100A/μs, TJ = 25°C ISD ≤ 24A, di/dt ≤1000A/μs, VDD = 100V, TJ = 125°C 1.0 1000 20 V ns μC 10 V/ns 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25°C, L = 6.9mH, RG = 25Ω, IAS = 24A. 3 Pulse test: Pulse Width < 380μs, duty cycle < 2%. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -8.27E-7/VDS^2 + 1.01E-7/VDS + 1.43E-10. 050-8168 Rev B 5-2009 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) Microsemi reserves the right to change, without notice, the specifications and information contained herein. Typical Performance Curves 100 V GE APT32M80J 60 = 10V TJ= 55°C 50 70 ID, DRAIN CURRENT (A) TJ= 25°C 60 50 TJ= 125°C 30 TJ= 150°C 20 10 & 15V 40 5.5V 30 5V 20 10 4.5V 4V 10 3.5 0 0 5 10 15 20 25 30 35 VDS, DRAIN-TO-SOURCE VOLTAGE (V) FIGURE 2, Output Characteristics 5 10 15 20 25 30 VDS, DRAIN-TO-SOURCE VOLTAGE (V) FIGURE 1, Output Characteristics 160 NORMALIZED TO VDS> ID(ON) x RDS(ON) MAX. 250μSEC. PULSE TEST @ <0.5 % DUTY CYCLE 140 VGS = 10V @ 24A 3.0 ID, DRAIN CURRENT (A) 2.5 2.0 1.5 1.0 0.5 120 TJ= 55°C 100 80 TJ= 25°C 60 40 TJ= 125°C 20 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (°C) FIGURE 3, RDS(ON) vs Junction Temperature 60 0 0 0 10,000 2 4 6 8 VGS , GATE-TO-SOURCE VOLTAGE (V) FIGURE 4, Transfer Characteristics Ciss TJ = -55°C 50 TJ = 25°C 40 TJ = 125°C 30 20 1,000 Coss 100 Crss 10 0 5 10 15 20 25 30 10 35 ID, DRAIN CURRENT (A) FIGURE 5, Gain vs Drain Current VDS = 300V VDS = 480V 4 2 0 0 100 200 300 Qg, TOTAL GATE CHARGE (nC) FIGURE 7, Gate Charge vs Gate-to-Source Voltage ISD, REVERSE DRAIN CURRENT (A) VDS = 120V 6 400 600 80 200 ID = 33A 8 200 VDS, DRAIN-TO-SOURCE VOLTAGE (V) FIGURE 6, CAPACITANCE VS DRAIN-TO-SOURCE VOLTAGE 12 10 0 160 120 80 TJ = 25°C TJ = 150°C 40 0 Rev B 0 VGS, GATE-TOSOURCE VOLTAGE (V) 10 5-2009 g fs, TRANSCONDUCTANCE 0 C, CAPACITANCE (pF) RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE 0 6 & 6.5V 0 0.4 0.8 1.2 1.6 VSD, SOURCE-TO-DRAIN VOLTAGE (V) FIGURE 8, Reverse Drain Current vs Source-to-Drain Voltage 050-8168 ID, DRAIN CURRENT (A) 80 40 T = 125°C J 90 APT32M80J 1000 100 100 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 1000 IDM 13μs 100μs 1ms 10ms Rds(on) 10 1 100ms 1 13μs 10 1 100μs 1ms Rds(on) 10ms TJ = 150°C 100ms TC = 25°C DC line Scaling for Different Case & Junction Temperatures: ID = ID(T = 25°C)*(TJ - TC)/125 DC line TJ = 125°C TC = 75°C 0.1 IDM C 0.1 10 100 1000 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 9, Forward Safe Operating Area 1 10 100 1000 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 10, Maximum Forward Safe Operating Area D = 0.9 0.20 0.7 0.15 0.5 Note: 0.10 PDM ZθJC, THERMAL IMPEDANCE (°C/W) 0.25 0.3 t1 t2 0.05 t1 = Pulse Duration 0.1 t 0.05 SINGLE PULSE 0 10 10-5 Duty Factor D = 1/t2 Peak TJ = PDM x ZθJC + TC 10 -3 -4 10 -2 10 -1 1.0 RECTANGULAR PULSE DURATION (seconds) Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration SOT-227 (ISOTOP®) Package Outline 11.8 (.463) 12.2 (.480) 31.5 (1.240) 31.7 (1.248) 7.8 (.307) 8.2 (.322) r = 4.0 (.157) (2 places) W=4.1 (.161) W=4.3 (.169) H=4.8 (.187) H=4.9 (.193) (4 places) 14.9 (.587) 15.1 (.594) 5-2009 25.2 (0.992) 0.75 (.030) 12.6 (.496) 25.4 (1.000) 0.85 (.033) 12.8 (.504) 4.0 (.157) 4.2 (.165) (2 places) 3.3 (.129) 3.6 (.143) Rev B 8.9 (.350) 9.6 (.378) Hex Nut M4 (4 places) 1.95 (.077) 2.14 (.084) * Source 30.1 (1.185) 30.3 (1.193) Drain * Emitter terminals are shorted internally. Current handling capability is equal for either Source terminal. 38.0 (1.496) 38.2 (1.504) * Source Gate 050-8168 Dimensions in Millimeters and (Inches) Microsemi’s products are covered by one or more of U.S. patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 6,939,743, 7,352,045 5,283,201 5,801,417 5,648,283 7,196,634 6,664,594 7,157,886 6,939,743 7,342,262 and foreign patents. US and Foreign patents pending. All Rights Reserved.