a High-Speed, 5 V, 0.1 F CMOS RS-232 Driver/Receivers ADM202/ADM203 FEATURES 120 kB Transmission Rate ADM202: Small (0.1 F) Charge Pump Capacitors ADM203: No External Capacitors Required Single 5 V Power Supply Meets EIA-232-E and V.28 Specifications Two Drivers and Two Receivers On-Board DC-DC Converters ⴞ9 V Output Swing with 5 V Supply Low Power BiCMOS: 2.0 mA ICC ⴞ30 V Receiver Input Levels APPLICATIONS Computers Peripherals Modems Printers Instruments FUNCTIONAL BLOCK DIAGRAMS 5V INPUT 0.1F 6.3V 0.1F 16V C1+ C1– C2+ C2– +5V TO +10V VOLTAGE DOUBLER +10V TO –10V VOLTAGE INVERTER T1IN The ADM202/ADM203 is a two-channel RS-232 line driver/ receiver pair designed to operate from a single 5 V power supply. A highly efficient on-chip charge pump design permits RS-232 levels to be developed using charge pump capacitors as small as 0.1 µF. The capacitors are internal to the package on the ADM203 so no external capacitors are required. These converters generate ± 10 V RS-232 output levels. The ADM202/ADM203 meets or exceeds the EIA-232-E and V.28 specifications. Fast driver slew rates permit operation up to 120 kB while high-drive currents allow for extended cable lengths. An epitaxial BiCMOS construction minimizes power consumption to 10 mW and also guards against latch-up. Overvoltage protection is provided allowing the receiver inputs to withstand continuous voltages in excess of ± 30 V. In addition, all pins contain ESD protection to levels greater than 2 kV. The ADM202 is available in 16-lead DIP and both narrow and wide SOIC packages. The ADM203 is available in a 20-lead DIP package. V+ 0.1F 6.3V 0.1F 6.3V V– 0.1F 16V T1OUT T1 RS-232 OUTPUTS TTL/CMOS INPUTS* T2IN T2OUT T2 R1OUT R1 R1IN R2 R2IN RS-232 INPUTS** TTL/CMOS OUTPUTS R2OUT ADM202 GND GENERAL DESCRIPTION VCC *INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT. **INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT. 5V INPUT VCC T1IN T1OUT T1 RS-232 OUTPUTS TTL/CMOS INPUTS* T2IN T2OUT T2 R1OUT R1 R1IN R2OUT R2 R2IN RS-232 INPUTS** TTL/CMOS OUTPUTS DO NOT MAKE CONNECTIONS TO THESE PINS C1+ C2+ C1– C2+ INTERNAL –10V POWER SUPPLY INTERNAL +10V POWER SUPPLY V– C2– V– ADM203 C2– V+ GND GND *INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT. **INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT. REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2001 (VCC = 5 V ⴞ 10%, (ADM202 C1–C4 = 0.1 F). All Specifications MIN to TMAX, unless otherwise noted) ADM202/ADM203–SPECIFICATIONS T Parameter Min Typ Output Voltage Swing ±5 Output Voltage Swing ±5 VCC Power Supply Current Input Logic Threshold Low, VINL Input Logic Threshold High, VINH Logic Pull-Up Current RS-232 Input Voltage Range RS-232 Input Threshold Low RS-232 Input Threshold High RS-232 Input Hysteresis RS-232 Input Resistance TTL/CMOS Output Voltage Low, VOL TTL/CMOS Output Voltage High, VOH Propagation Delay Transition Region Slew Rate Baud Rate Output Resistance RS-232 Output Short Circuit Current Unit Conditions/Comments ±9 V ±9 V VCC = 5 V ± 5%, T1OUT, T2OUT Loaded with 3 kΩ to GND VCC = 5 V ± 10%, TA = 25°C, T1OUT, T2OUT Loaded with 3 kΩ to GND No Load, T1IN, T2IN = VCC or T1IN, T2IN = GND TIN TIN TIN = 0 V 2.5 Max 6.0 mA 0.8 V V µA V V V V kΩ V V µs V/µs 2.4 12 –30 0.8 0.2 3 1.2 1.6 0.4 5 25 +30 2.4 1.0 7 0.4 3.5 0.3 8 5 120 300 ± 10 kB Ω mA ± 60 TA = 0°C to 85°C IOUT = 1.6 mA IOUT = –1.0 mA RS-232 to TTL RL = 3 kΩ, CL= 1000 pF Measured from +3 V to –3 V or –3 V to +3 V RL = 3 kΩ, CL = 1 nF VCC = V+ = V– = 0 V, VOUT = ± 2 V Specifications subject to change without notice. R-16W SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105°C/W N-20 DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125°C/W Operating Temperature Range Commercial (J Version) . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C Lead Temperature Soldering Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 215°C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >2000 V ABSOLUTE MAXIMUM RATINGS* (TA = 25°C unless otherwise noted) VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . (VCC – 0.3 V) to +14 V V– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –14 V Input Voltages TIN . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (VCC + 0.3 V) RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 30 V Output Voltages TOUT . . . . . . . . . . . . . . . . . . . (V+, +0.3 V) to (V–, – 0.3 V) ROUT . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (VCC + 0.3 V) Short Circuit Duration TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous Power Dissipation N-16 DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 470 mW R-16N SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 600 mW R-16W SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 mW N-20 DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 890 mW Thermal Impedance N-16 DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135°C/W R-16N SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105°C/W *This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. ORDERING GUIDE –2– Model Temperature Range Package Option ADM202JN ADM202JRN ADM202JRW ADM203JN 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C N-16 R-16N R-16W N-20 REV. A ADM202/ADM203 PIN CONFIGURATIONS DIP/SOIC C1+ 1 V+ 2 DIP 16 VCC T2IN 15 GND T1IN 2 14 T1OUT C1– 3 ADM202 C2+ 4 9 18 T2OUT R1IN 4 T1OUT 5 17 V– ADM203 16 C2– TOP VIEW 15 C2+ (Not to Scale) VCC 7 14 V+ GND 6 10 T2IN R2IN 8 19 R2IN R1OUT 3 13 R1IN TOP VIEW C2– 5 (Not to Scale) 12 R1OUT 11 T1IN V– 6 T2OUT 7 20 R2OUT 1 R2OUT 13 C1– C1+ 8 12 V– GND 9 11 C2+ C2– 10 PIN FUNCTION DESCRIPTION Mnemonic Function Power Supply Input 5 V ± 10%. Internally Generated Positive Supply (+10 V nominal). Internally Generated Negative Supply (–10 V nominal). Ground Pin. Must be connected to 0 V. ADM202 External Capacitor, (+ terminal) is connected to this pin. ADM203: The capacitor is connected internally and no external capacitor is required. ADM202 External Capacitor, (– terminal) is connected to this pin. ADM203: The capacitor is connected internally and no external capacitor is required. ADM202 External Capacitor, (+ terminal) is connected to this pin. ADM203: The capacitor is connected internally and no external capacitor is required. ADM202 External Capacitor, (– terminal) is connected to this pin. ADM203: The capacitor is connected internally and no external capacitor is required. Transmitter (Driver) Inputs. These inputs accept TTL/CMOS levels. An internal 400 kΩ pull-up resistor to VCC is connected on each input. Transmitter (Driver) Outputs. These are RS-232 levels (typically ± 10 V). Receiver Inputs. These inputs accept RS-232 signal levels. An internal 5 kΩ pull-down resistor to GND is connected on each of these inputs. Receiver Outputs. These are TTL/CMOS levels. VCC V+ V– GND C1+ C1– C2+ C2– TIN TOUT RIN ROUT 5V INPUT 5V INPUT 0.1F 6.3V 0.1F 16V C1+ C1– C2+ C2– +5V TO +10V VOLTAGE DOUBLER +10V TO –10V VOLTAGE INVERTER VCC V+ VCC 0.1F 6.3V 0.1F 6.3V V– 0.1F 16V T1IN T1 T1OUT T2IN T2 T2OUT R1OUT R1 GND T2IN T2 T2OUT RS-232 OUTPUTS R1OUT R1 R1IN R2OUT R2 R2IN RS-232 INPUTS** DO NOT MAKE CONNECTIONS TO THESE PINS C1+ C2+ C1– C2+ RS-232 INPUTS** R2 T1OUT R1IN TTL/CMOS OUTPUTS R2OUT T1 TTL/CMOS OUTPUTS RS-232 OUTPUTS TTL/CMOS INPUTS* T1IN TTL/CMOS INPUTS* R2IN INTERNAL –10V POWER SUPPLY INTERNAL +10V POWER SUPPLY ADM202 V– C2– V– ADM203 C2– V+ GND GND *INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT. **INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT. *INTERNAL 400k⍀ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT. **INTERNAL 5k⍀ PULL-DOWN RESISTOR ON EACH RS-232 INPUT. Figure 1. Typical Operating Circuits REV. A –3– ADM202/ADM203 –Typical Performance Characteristics 15 15 Tx O/P HI 10 10 V+ Tx O/P HI LOADED 5 Tx O/P – V V+, V– – V 5 0 –5 0 –5 Tx O/P LO LOADED V– –10 –10 Tx O/P LO –15 5 0 15 20 10 LOAD CURRENT – mA 25 –15 4.0 30 5.5 VCC – V TPC 1. Charge Pump V+, V– vs. Current TPC 4. Transmitter Output Voltage vs. VCC 15 30 VCC = 5V RL = 3k⍀ 25 10 f = 10kHz Tx O/P HI Tx O/P VOLTAGE – V SLEW RATE – V/s 5.0 4.5 20 15 LOW-TO-HIGH SLEW RATE 10 5 0 –5 Tx O/P LO HIGH-TO-LOW SLEW RATE –10 5 0 –15 0 500 2k 1k 1.5k CAPACITIVE LOAD – pF 2.5k 3k TPC 2. Transmitter Slew Rate vs. Load Capacitance 1 0 2 4 6 8 10 LOAD CURRENT – mA 12 14 TPC 5. Transmitter Output Voltage vs. Current T 1 2 T 2 T T CH1 10.0V CH2 5.00V M 1.00s CH2 –6.4V CH1 10.0V LOADED SLEW RATE – 1nF CH2 5.00V M 1.00s CH2 –6.4V UNLOADED SLEW RATE TPC 3. Transmitter Fully Loaded Slew Rate TPC 6. Transmitter Unloaded Slew Rate –4– REV. A ADM202/ADM203 S1 GENERAL INFORMATION The ADM202/ADM203 is an RS-232 drivers/receivers designed to solve interface problems by meeting the EIA-232E specifications while using a single digital 5 V supply. The EIA standard requires transmitters that will deliver ± 5 V minimum on the transmission channel and receivers that can accept signal levels down to ± 3 V. The parts achieve this by integrating step up voltage converters and level shifting transmitters and receivers onto the same chip. CMOS technology is used to keep the power dissipation to an absolute minimum. The ADM203 uses internal capacitors and, therefore, no external capacitors are required. The ADM202 contains an internal voltage doubler and a voltage inverter which generates ± 10 V from the 5 V input. External 0.1 µF capacitors are required for the internal voltage converter. The ADM202/ADM203 is a modification, enhancement and improvement to the AD230–AD241 family and derivatives thereof. It is essentially plug-in compatible and does not have materially different applications. S3 V+ FROM VOLTAGE DOUBLER GND GND C2 S2 C4 S4 V– = –(V+) INTERNAL OSCILLATOR Figure 3. Charge Pump Voltage Inverter Transmitter (Driver) Section The drivers convert TTL/CMOS input levels into EIA-232-E output levels. With VCC = +5 V and driving a typical EIA-232-E load, the output voltage swing is ± 9 V. Even under worst-case conditions the drivers are guaranteed to meet the ± 5 V EIA-232-E minimum requirement. The input threshold levels are both TTL and CMOS compatible with the switching threshold set at VCC/4. With a nominal VCC = 5 V the switching threshold is 1.25 V typical. Unused inputs may be left unconnected, as an internal 400 kΩ pull-up resistor pulls them high forcing the outputs into a low state. (a) A Charge Pump Voltage Converter As required by the EIA-232-E standard the slew rate is limited to less than 30 V/µs without the need for an external slew limiting capacitor and the output impedance in the power-off state is greater than 300 Ω. (b) RS-232 to TTL/CMOS Receivers Receiver Section (c) TTL/CMOS to RS-232 Transmitters The receivers are inverting level shifters that accept EIA-232-E input levels (± 5 V to ± 15 V) and translate them into 5 V TTL/ CMOS levels. The inputs have internal 5 kΩ pull-down resistors to ground and are also protected against overvoltages of up to ± 30 V. The guaranteed switching thresholds are 0.8 V minimum and 2.4 V maximum which are well within the ± 3 V EIA-232 requirement. The low level threshold is deliberately positive as it ensures that an unconnected input will be interpreted as a low level. CIRCUIT DESCRIPTION The internal circuitry consists of three main sections. These are: Charge Pump DC-DC Voltage Converter The charge pump voltage converter consists of an oscillator and a switching matrix. The converter generates a ± 10 V supply from the input 5 V level. This is done in two stages using a switched capacitor technique as illustrated below. First, the 5 V input supply is doubled to 10 V using capacitor C1 as the charge storage element. The 10 V level is then inverted to generate –10 V using C2 as the storage element. Capacitors C3 and C4 are used to reduce the output ripple. Their values are not critical and can be reduced if higher levels of ripple are acceptable. The charge pump capacitors C1 and C2 may also be reduced at the expense of higher output impedance on the V+ and V– supplies. On the ADM203, all capacitors C1 to C4 are molded into the package. The receivers have Schmitt trigger input with a hysteresis level of 0.5 V. This ensures error free reception both for noisy inputs and for inputs with slow transition times. The V+ and V– supplies may also be used to power external circuitry if the current requirements are small. S1 S3 VCC V+ = 2VCC C1 S2 C3 S4 GND VCC INTERNAL OSCILLATOR Figure 2. Charge Pump Voltage Doubler REV. A –5– ADM202/ADM203 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). C00065–0–1/01 (rev. A) 16-Lead Plastic DIP (N-16) 0.840 (21.34) 0.745 (18.92) 16 9 1 8 0.280 (7.11) 0.240 (6.10) PIN 1 0.060 (1.52) 0.015 (0.38) 0.325 (8.25) 0.300 (7.62) 0.210 (5.33) MAX 0.150 (3.81) 0.200 (5.05) MIN 0.125 (3.18) 0.022 (0.558) 0.100 0.070 (1.77) SEATING PLANE (2.54) 0.014 (0.356) 0.045 (1.15) BSC 0.195 (4.95) 0.115 (2.93) 0.015 (0.381) 0.008 (0.204) 16-Lead Narrow SOIC (R-16N) 0.3937 (10.00) 0.3859 (9.80) 0.1574 (4.00) 0.1497 (3.80) PIN 1 16 9 1 8 0.050 (1.27) BSC 0.0098 (0.25) 0.0040 (0.10) 0.2440 (6.20) 0.2284 (5.80) 0.0688 (1.75) 0.0532 (1.35) 0.0196 (0.50) ⴛ 45ⴗ 0.0099 (0.25) 8ⴗ 0.0192 (0.49) SEATING 0ⴗ 0.0500 (1.27) 0.0099 (0.25) PLANE 0.0138 (0.35) 0.0160 (0.41) 0.0075 (0.19) 16-Lead Wide SOIC (R-16W) 20-Lead Plastic DIP (N-20) 0.413 (10.50) 0.348 (10.10) 1.060 (26.90) 0.925 (23.50) 9 1 0.2992 (7.60) 0.2914 (7.40) 1 PIN 1 8 0.050 (1.27) BSC 0.010 (0.25) 0.004 (0.10) 8ⴗ 0.018 (0.46) SEATING 0ⴗ 0.015 (0.38) 0.014 (0.36) PLANE 0.007 (1.18) 0.280 (7.11) 0.240 (6.10) PIN 1 0.419 (10.65) 0.404 (10.26) 0.107 (2.72) 0.089 (2.26) 11 10 0.210 (5.33) MAX 0.200 (5.05) 0.125 (3.18) 0.022 (0.558) 0.014 (0.356) 0.0291 (0.74) ⴛ 45ⴗ 0.0098 (0.25) 0.060 (1.52) 0.015 (0.38) 0.150 (3.81) MIN SEATING 0.100 0.070 (1.77) (2.54) 0.045 (1.15) PLANE BSC 0.325 (8.25) 0.300 (7.62) 0.195 (4.95) 0.115 (2.93) PRINTED IN U.S.A. 20 16 0.015 (0.381) 0.008 (0.204) 0.045 (1.15) 0.020 (0.50) –6– REV. A