FAN4174 / FAN4274 Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier Features Description 200µA Supply Current per Amplifier The FAN4174 (single) and FAN4274 (dual) are ultra-low cost voltage feedback amplifiers with CMOS inputs that consume only 200µA of supply current per amplifier, while providing ±33mA of output short-circuit current. These amplifiers are designed to operate from 2.5V to 5V supplies. The common mode voltage range extends beyond the negative and positive rails. FAN4274 Competes with OPA2340 and TLV2462; Available in MSOP-8 Package Fully Specified at +2.7V and +5V Supplies 3.7MHz Bandwidth Output Swing to Within 10mV of Either Rail Input Voltage Range Exceeds the Rails 3V/µs Slew Rate 25nV/√Hz Input Voltage Noise Replaces KM4170 and KM4270 FAN4174 Competes with OPA340 and TLV2461; Available in SC70-5 and SOT23-5 Packages The FAN4174 and FAN4274 are designed on a CMOS process and provide 3.7MHz of bandwidth and 3V/μs of slew rate at a supply voltage of 5V. The combination of low power, rail-to-rail performance, low-voltage operation, and tiny package options make this amplifier family well suited for use in many general-purpose and battery-powered applications. Applications Portable / Battery-powered Applications PCMCIA, USB Mobile Communications, Cellular Phones, Pagers Notebooks and PDAs Sensor Interface A/D Buffer Active Filters Signal Conditioning Portable Test Instruments Figure 1. Frequency vs. Gain Ordering Information Part Number Operating Temperature Range Package Eco Status FAN4174IP5X -40 to +85°C 5-Lead SC70 Package RoHS FAN4174IS5X -40 to +85°C 5-Lead SOT23 Package RoHS FAN4274IMU8X -40 to +85°C 8-Lead Molded Small Outline Package RoHS Packing Method Tape and Reel (3000) Tape and Reel (3000) Tape and Reel (3000) For Fairchild’s definition of “green” Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. © 2004 Fairchild Semiconductor Corporation FAN4174/FAN4274 • Rev. 1.0.4 www.fairchildsemi.com FAN4174 / FAN4274 — Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier May 2008 Figure 2. Pin Configuration © 2004 Fairchild Semiconductor Corporation FAN4174/FAN4274 • Rev. 1.0.4 FAN4174 / FAN4274 — Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier Typical Application www.fairchildsemi.com 2 Figure 3. FAN4174 SOT23 Figure 4. FAN4147 SC70 Figure 5. FAN4274 MSOP FAN4174 Pin Assignments Pin # Name 1 OUT Description Output 2 -VS Negative Supply 3 +IN Positive Supply 4 -IN Negative Input 5 +VS Positive Supply FAN4174 / FAN4274 — Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier Pin Configurations FAN4274 Pin Assignments Pin # Name Description 1 OUT1 Output, Channel 1 2 -IN1 Negative Input, Channel 1 3 +IN1 Positive Input, Channel 1 4 -VS 5 +IN2 Negative Supply Positive Input, Channel 2 6 -IN2 Negative Input, Channel 2 7 OUT2 8 +VS Output, Channel 2 Positive Supply © 2004 Fairchild Semiconductor Corporation FAN4174/FAN4274 • Rev. 1.0.4 www.fairchildsemi.com 3 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Functional operation under any of these conditions is NOT implied. Performance and reliability are guaranteed only if operating conditions are not exceeded. Symbol Parameter VCC Supply Voltage VIN Input Voltage Range TJ Junction Temperature TSTG Storage Temperature TL ΘJA Min. Max. Unit 0 6 V -VS-0.5 +VS+0.5 V +150 °C -65 Lead Soldering, 10 Seconds Thermal Resistance (1) +150 °C +300 °C 5-Lead SOT23 256 5-Lead SC70 331 8-Lead MSOP 206 °C/W Note: 1. Package thermal resistance JEDEC standard, multi-layer test boards, still air. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol TA Parameter Min. Operating Temperature Range © 2004 Fairchild Semiconductor Corporation FAN4174/FAN4274 • Rev. 1.0.4 -40 Typ. Max. Unit +85 °C FAN4174 / FAN4274 — Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier Absolute Maximum Ratings www.fairchildsemi.com 4 VS=+2.7V, G=2, RL=10kΩ to VS/2, RF=5kΩ; unless otherwise noted. Symbol Parameter Conditions Min. Typ. Max. Units Frequency Domain Response UGBW BW SS GBWP G=+1 -3dB Bandwidth Gain Bandwidth Product 4 MHz 2.5 MHz 4 MHz Time Domain Response tR, fF Rise and Fall Time VO=1.0V Step 300 ns OS Overshoot VO=1.0V Step 5 % SR Slew Rate VO=3V Step, G=-1 3 V/µs Distortion and Noise Response HD2 2nd Harmonic Distortion VO=1VPP, 10kHz -66 dBc HD3 3rd Harmonic Distortion VO=1VPP, 10kHz -67 dBc THD Total Harmonic Distortion VO=1VPP, 10kHz 0.1 % 26 nV/√Hz -100 dB en Input Voltage Noise XTALK Crosstalk (FAN4274) 100kHZ DC Performance VIO dVIO Ibn PSRR AOL IS Input Offset Voltage (2) -6 Average Drift Input Bias Current Power Supply Rejection Ratio (2) Open-loop Gain DC 50 DC Supply Current per Amplifier 0 +6 2.1 µV/°C 5 pA 73 dB 98 (2) mV 200 dB 300 µA Input Characteristics RIN Input Resistance CIN Input Capacitance CMIR CMRR Input Common Mode Voltage Range Common Mode (2) Rejection Ratio 10 GΩ 1.4 pF FAN4174 (Typical) -0.3 to 2.6 FAN4274 (Typical) -0.3 to 3.0 FAN4174 DC, VCM=OV to 2.2V 50 65 FAN4274 DC, VCM=OV to 2.2V 50 65 0.03 0.01 to 2.69 V dB FAN4174 / FAN4274 — Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier Electrical Specifications at +2.7V Output Characteristics VO Output Voltage Swing (2) RL=10kΩ to VS/2 RL=1kΩ to VS/2 ISC VS Short Circuit Output Current Power Supply Operating Range 0.05 to 2.55 2.65 V +34/-12 mA 2.5 to 5.5 V Note: 2. 100% tested at 25°C. © 2004 Fairchild Semiconductor Corporation FAN4174/FAN4274 • Rev. 1.0.4 www.fairchildsemi.com 5 VS=+5V, G=2, RL=10kΩ to VS/2, RF= 5kΩ; unless otherwise noted. Symbol Parameter Conditions Min. Typ. Max. Units Frequency Domain Response UGBW BW SS GBWP G=+1 -3dB Bandwidth Gain Bandwidth Product 3.7 MHz 2.3 MHz 3.7 MHz Time Domain Response tR, fF Rise and Fall Time VO=1.0V Step 300 ns OS Overshoot VO=1.0V Step 5 % SR Slew Rate VO=3V Step, G=-1 3 V/µs Distortion and Noise Response HD2 2nd Harmonic Distortion VO=1VPP, 10kHz -80 dBc HD3 3rd Harmonic Distortion VO=1VPP, 10kHz -80 dBc THD Total Harmonic Distortion VO=1VPP, 10kHz 0.02 % 25 nV/√Hz 100kHZ -100 dB en Input Voltage Noise XTALK Crosstalk (FAN4274) DC Performance VIO dVIO Ibn PSRR AOL IS Input Offset Voltage (3) -8 Average Drift Input Bias Current Power Supply Rejection Ratio (3) Open-loop Gain DC 50 DC Supply Current per Amplifier 0 +8 2.9 µV/°C 5 pA 73 dB 102 (3) mV 200 dB 300 µA Input Characteristics RIN CIN Input Resistance Input Capacitance CMIR Input Common Mode Voltage Range CMRR Common Mode Rejection Ratio Typical (3) 10 GΩ 1.2 pF -0.3 to 5.3 V dB DC, VCM=0V to VS 58 73 RL=10kΩ to VS/2 0.03 0.01 to 4.99 Output Characteristics VO Output Voltage Swing (3) RL=1kΩ to VS/2 ISC VS Short Circuit Output Current Power Supply Operating Range 0.1 to 4.9 4.95 V ±33 mA 2.5 to 5.5 V FAN4174 / FAN4274 — Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier Electrical Specifications at +5V Note: 3. 100% tested at 25°C. © 2004 Fairchild Semiconductor Corporation FAN4174/FAN4274 • Rev. 1.0.4 www.fairchildsemi.com 6 VS=+2.7, G=2, RL=10kΩ to VS/2, RF=5kΩ; unless otherwise noted. Figure 6. Non-Inverting Frequency Response (+5) Figure 7. Inverting Frequency Response (+5V) Figure 8. Non-Inverting Frequency Response Figure 9. Inverting Frequency Response Figure 10. Frequency Response vs. CL Figure 11. Frequency Response vs. RL Figure 12. Large Signal Frequency Response (+5V) Figure 13. Open-loop Gain and Phase vs. Frequency © 2004 Fairchild Semiconductor Corporation FAN4174/FAN4274 • Rev. 1.0.4 FAN4174 / FAN4274 — Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier Typical Performance Characteristics www.fairchildsemi.com 7 VS=+2.7, G=2, RL=10kΩ to VS/2, RF=5kΩ; unless otherwise noted. Figure 14. 2nd and 3rd Harmonic Distortion Figure 15. 2nd Harmonic Distortion vs. VO Figure 16. 3rd Harmonic Distortion vs. VO Figure 17. CMRR VS=5V Figure 18. PSRR VS=5V Figure 19. Output Swing vs. Load Figure 20. Pulse Response vs. Common Mode Voltage Figure 21. Input Voltage Noise © 2004 Fairchild Semiconductor Corporation FAN4174/FAN4274 • Rev. 1.0.4 FAN4174 / FAN4274 — Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier Typical Performance Characteristic www.fairchildsemi.com 8 General Description Overdrive Recovery The FAN4174 amplifier includes single-supply, generalpurpose, voltage-feedback amplifiers, fabricated on a bi-CMOS process. The family features a rail-to-rail input and output and is unity gain stable. The typical noninverting circuit schematic is shown in Figure 22. Overdrive of an amplifier occurs when the output and/or input ranges are exceeded. The recovery time varies based on whether the input or output is overdriven and by how much the range is exceeded. The FAN4174 typically recovers in less than 500ns from an overdrive condition. Figure 24 shows the FAN4174 amplifier in an overdriven condition. Figure 22. Typical Non-inverting Configuration Figure 24. Overdrive Recovery Input Common Mode Voltage Driving Capacitive Loads The common mode input range extends to 300mV below ground and to 100mV above VS in single supply operation. Exceeding these values does not cause phase reversal; however, if the input voltage exceeds the rails by more than 0.5V, the input ESD devices begin to conduct. The output stays at the rail during this overdrive condition. If the absolute maximum input VIN (700mV beyond either rail) is exceeded, externally limit the input current to ±5mA, as shown in Figure 23. Figure 10 illustrates the response of the FAN4174 amplifier family. A small series resistance (RS) at the output of the amplifier, illustrated in Figure 25, improves stability and settling performance. RS values in Figure 10 were chosen to achieve maximum bandwidth with less than 2dB of peaking. For maximum flatness, use a larger RS. Capacitive loads larger than 500pF require the use of RS. Figure 23. Circuit for Input Current Protection Figure 25. Typical Topology for Driving a Capacitive Load Power Dissipation Driving a capacitive load introduces phase-lag into the output signal, which reduces phase margin in the amplifier. The unity gain follower is the most sensitive configuration. In a unity gain follower configuration, the FAN4174 amplifier family requires a 300Ω series resistor to drive a 100pF load. The maximum internal power dissipation allowed is directly related to the maximum junction temperature. If the maximum junction temperature exceeds 150°C, performance degradation occurs. If the maximum junction temperature exceeds 150°C for an extended time, device failure may occur. © 2004 Fairchild Semiconductor Corporation FAN4174/FAN4274 • Rev. 1.0.4 FAN4174 / FAN4274 — Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier Application Information www.fairchildsemi.com 9 General layout and supply bypassing play major roles in high-frequency performance. Fairchild evaluation boards help guide high-frequency layout and aid in device testing and characterization. Follow the steps below as a basis for high-frequency layout: 1. Include 6.8μF and 0.01μF ceramic capacitors. 2. Place the 6.8μF capacitor within 0.75 inches of the power pin. 3. Place the 0.01μF capacitor within 0.1 inches of the power pin. 4. Remove the ground plane under and around the part, especially near the input and output pins, to reduce parasitic capacitance. Minimize all inductances. trace lengths to reduce series Refer to the evaluation board layouts shown in Figures 28-31 for more information. When evaluating only one channel, complete the following on the unused channel: 1. Ground the non-inverting input. 2. Short the output to the inverting input. Figure 26. FAN4174 Evaluation Board Schematic (KEV002/KEB011) Evaluation Board Information The following evaluation boards are available to aid in the testing and layout of this device: Evaluation Board Description Products KEB002 Single Channel, Dual Supply, 5 and 6-Lead SOT23 FAN4174IS5X KEB010 Dual Channel, Dual Supply 8-Lead MSOP KEB011 Single Channel, Dual Supply, 5 and 6-Lead SC70 FAN4274IMU8X FAN4174IP5X FAN4174 / FAN4274 — Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier Layout Considerations Evaluation board schematics are shown in Figure 26 and Figure 27; layouts are shown in Figures 28-31. Figure 27. FAN4274 Evaluation Board Schematic (KEB010) © 2004 Fairchild Semiconductor Corporation FAN4174/FAN4274 • Rev. 1.0.4 www.fairchildsemi.com 10 Figure 28. KEB002 (Top Side) Figure 29. KEB002 (Bottom Side) Figure 30. KEB010 (Top Side) Figure 31. KEB010 (Bottom Side) © 2004 Fairchild Semiconductor Corporation FAN4174/FAN4274 • Rev. 1.0.4 FAN4174 / FAN4274 — Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier Board Layout Information www.fairchildsemi.com 11 FAN4174 / FAN4274 — Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier Physical Dimensions 3.00 2.80 5 SYMM CL 0.95 0.95 A 4 B 3.00 2.60 1.70 1.50 1 2 2.60 3 (0.30) 1.00 0.50 0.30 0.95 1.90 0.20 C A B 0.70 TOP VIEW LAND PATTERN RECOMMENDATION SEE DETAIL A 1.30 0.90 1.45 MAX 0.15 0.05 0.22 0.08 C 0.10 C NOTES: UNLESS OTHEWISE SPECIFIED GAGE PLANE A) THIS PACKAGE CONFORMS TO JEDEC MO-178, ISSUE B, VARIATION AA, B) ALL DIMENSIONS ARE IN MILLIMETERS. C) MA05Brev5 0.25 8° 0° 0.55 0.35 0.60 REF SEATING PLANE Figure 32. 5-Lead SOT-23 Package Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ © 2004 Fairchild Semiconductor Corporation FAN4174/FAN4274 • Rev. 1.0.4 www.fairchildsemi.com 12 FAN4174 / FAN4274 — Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier Physical Dimensions Figure 33. 5-Lead SC70 Package Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ © 2004 Fairchild Semiconductor Corporation FAN4174/FAN4274 • Rev. 1.0.4 www.fairchildsemi.com 13 3.00±0.10 (0.45) 0.65 A B (1.30) (5.50) (4.20) 4.90±0.15 3.00±0.10 PIN #1 ID QUADRANT LAND PATTERN RECOMMENDATION SEE DETAIL A TOP VIEW 1.10MAX 0.65 0.150 0.050 0.380 C 0.270 SIDE VIEW 0.10 0.23 0.13 END VIEW 12° TOP & BOTTOM A B C NOTES: A. CONFORMS TO JEDEC MO-187 B, DIMENSIONS ARE IN MM C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS D. DIMENSIONS AND TOLERANCES ARE PER ASME Y14.5M, 1994 E LANDPATTERN AS PER IPC7351 #TSOP65P490X110-8BL Gauge Plane Seating Plane 0.25 MKT-MUA08AREVB 0.70 0.40 0.95 8° 0° FAN4174 / FAN4274 — Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier Physical Dimensions DETAIL A Figure 34. 8-Lead Molded Small Outline Package (MSOP) Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ © 2004 Fairchild Semiconductor Corporation FAN4174/FAN4274 • Rev. 1.0.4 www.fairchildsemi.com 14 FAN4174 / FAN4274 — Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier © 2004 Fairchild Semiconductor Corporation FAN4174/FAN4274 • Rev. 1.0.4 www.fairchildsemi.com 15