APW7136A/B/C 1MHz, High-Efficiency, Step-Up Converter for 2 to 8 White LEDs Features General Description • • • • • Wide Input Voltage from 2.7V to 6V • • • • • • Open-LED Protection The APW7136A/B/C is a current-mode and fixed frequency boost converter with an integrated N-FET to drive up to 8 white LEDs in series. The series connection allows the LED current to be identical for uniform brightness. Its low on-resistance of NFET and feedback voltage reduce power loss and achieves high efficiency. Fast 1MHz current-mode PWM operation is available for input and output capacitors and a small inductor while minimizing ripple on the input supply. The OVP pin monitors the output voltage and stop switching if exceeds the over-voltage threshold. An internal soft-start circuit eliminates the inrush current during start-up. 0.25V Reference Voltage Fixed 1MHz Switching Frequency High Efficiency up to 87% 100Hz to 100KHz PWM brightness control frequency Under Voltage Lockout Protection Over Temperature Protection <1µA Quiescent Current during Shutdown SOT-23-6 Package The APW 7136A/B/C also integrates under-voltage lockout, over-temperature protection and current limit circuits. The APW7136/A/B/C is available in a SOT-23-6 package. Lead Free Available (RoHS Compliant) Applications • • • • White LED Display Backlighting Simplified Application Circuit Cell Phone and Smart Phone PDA, PMP, MP3 VIN Digital Camera VOUT L1 22µH Pin Configuration C1 SOT-23-6 Top View LX 1 6 4.7µF 2 VIN GND LX OVP 1 C2 1µF 5 Up to 8 WLEDs 6 VIN GND 2 OFF ON 5 OVP FB 3 4 EN FB 3 R1 12Ω 4 EN Ordering and Marking Information OVP Voltage Code A: 20V B: 28V C: 35V Package Code C : SOT-23-6 Operating Ambient Temperature Range I : -40 to 85oC Handling Code TR : Tape & Reel Lead Free Code L : Lead Free Device APW7136 Lead Free Code Handling Code Temperature Range Package Code OVP Voltage Code APW7136YCI : CFYX Y - OVP Voltage Code X - Date Code Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS and compatible with both SnPb and lead-free soldering operations. ANPEC lead-free products meet or exceed the leadfree requirements of IPC/JEDEC J STD-020C for MSL classification at lead-free peak reflow temperature. ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright ANPEC Electronics Corp. Rev. A.2 - Jan., 2008 1 www.anpec.com.tw APW7136A/B/C Absolute Maximum Ratings Symbol VIN VLX VOVP TJ (Note 1) Parameter VIN Supply Voltage (VIN to GND) Rating Unit -0.3 ~ 7 V FB, EN to GND Voltage -0.3 ~ VIN V LX to GND Voltage -0.3 ~ 38 V OVP to GND Voltage -0.3 ~ 38 V 150 °C -65 ~ 150 °C 260 °C Maximum Junction Temperature TSTG Storage Temperature Range TSDR Maximum Lead Soldering Temperature, 10 seconds Note 1: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Thermal Characteristics (Note 2) Symbol θJA Parameter SOT-23-6 Junction to Ambient Thermal Resistance Rating Unit 250 °C/W Note 2: θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. The exposed pad of package is soldered directly on the PCB. Recommended Operating Conditions (Note 3) Symbol VIN VOUT CIN COUT Parameter Range VIN Input Voltage Converter Output Voltage Unit 2.7~ 6 V Up to 32 V Input Capacitor 4.7 or higher µF Output Capacitor 0.68 or higher µF L1 Inductor 6.8 to 47 µH TA Ambient Temperature -40 to 85 °C TJ Junction Temperature -40 to 125 °C Note 3: Refer to the application circuit for further information. Electrical Characteristics (Refer to Figure 1 in the “Typical Application Circuits”. These specifications apply over VIN = 3.6V, TA = -40°C to 85°C, unless otherwise noted. Typical values are at TA = 25°C.) Symbol Parameter Test Condition APW7136A/B/C Min. Typ. Max. TA = -40 ~ 85°C, TJ = -40 ~ 125°C 2.7 - 6 VFB = 1.3V, no switching Unit SUPPLY VOLTAGE AND CURRENT VIN Input Voltage Range IDD1 IDD2 Input DC bias current ISD V 70 100 130 µA FB = GND, switching - 1 2 mA EN = GND - - 1 µA VIN Rising 2.0 2.2 2.4 V 50 100 150 mV UNDER VOLTAGE LOCKOUT UVLO Threshold Voltage UVLO Hysteresis Voltage Copyright ANPEC Electronics Corp. Rev. A.2 - Jan., 2008 2 www.anpec.com.tw APW7136A/B/C Electrical Characteristics (Cont.) (Refer to Figure 1 in the “Typical Application Circuits”. These specifications apply over VIN = 3.6V, TA = -40°C to 85°C, unless otherwise noted. Typical values are at TA = 25°C.) Symbol Parameter Test Condition APW7136A/B/C Max. Unit Min. Typ. TA = 25°C 237 250 263 TA = -40 ~ 85°C (TJ = -40 ~ 125°C) 230 - 270 -50 - 50 nA 0.8 1.0 1.2 MHz - 0.6 - Ω 0.7 0.9 1.2 A REFERENCE AND OUTPUT VOLTAGES VREF IFB Regulated Feedback Voltage FB Input Current mV INTERNAL POWER SWITCH FSW Switching Frequency RON Power Switch On Resistance ILIM Power Switch Current Limit LX Leakage Current DMAX FB=GND VEN=0V, VLX=0V or 5V, VIN = 5V -1 - 1 µA 92 95 98 % APW7136A - 20 - APW7136B - 28 - APW7136C - 35 - - 3 - V - - 50 µA VEN Rising 0.4 0.7 1 V - 0.1 - V VEN= 0~5V, VIN = 5V -1 - 1 µA TJ Rising - 150 - °C - 40 - °C LX Maximum Duty Cycle OUTPUT OVER VOLTAGE PROTECTION VOVP Over Voltage Threshold OVP Hysteresis OVP Leakage Current VOVP =30V, EN=VIN V ENABLE AND SHUTDOWN VTEN EN Voltage Threshold EN Voltage Hysteresis ILEN EN Leakage Current OVER-TEMPERATURE PROTECTION TOTP Over-Temperature Protection Over-Temperature Protection Hysteresis Copyright ANPEC Electronics Corp. Rev. A.2 - Jan., 2008 3 www.anpec.com.tw APW7136A/B/C Typical Operating Characteristics (Refer to Figure 1 in the section “Typical Application Circuits”, VIN=3.6V, TA=25oC, 8WLEDs unless otherwise specified) Efficiency vs. WLED Current 95 90 90 85 85 80 80 Efficiency (η) Efficiency (η) Efficiency vs. WLED Current 95 75 VIN=5V 70 VIN=4.2V 65 VIN=3.6V 60 VIN=3.3V 55 75 VIN=5V 70 VIN=4.2V 65 VIN=3.6V 60 8 WLEDs ≅ 25.6V@20mA η=POUT/PIN 50 50 0 5 10 15 20 25 0 30 5 Efficiency vs. WLED Current 90 18 WLED Current, ILED (mA) 20 Efficiency (η) 85 80 75 VIN=5V VIN=4.2V 65 VIN=3.6V 60 VIN=3.3V 4 WLEDs 55 15 20 25 30 WLED Current vs. PWM Duty Cycle 95 70 10 WLED Current, ILED (mA) WLED Current, ILED (mA) ≅ 13V@20mA η=POUT/PIN 16 14 12 10 8 100KHz 6 4 1KHz 2 50 100Hz 0 0 5 10 15 20 25 0 30 20 40 60 80 100 PWM Duty Cycle (%) Supply Voltage, V IN (V) WLED Current vs. Supply Voltage Switch ON Resistance vs. Supply Voltage 21.0 0.8 Switch ON Resistance, RON (Ω) 20.8 WLED Current, ILED (mA) 6 WLEDs ≅ 19.3V@20mA η=POUT/PIN VIN=3.3V 55 20.6 20.4 20.2 20.0 19.8 19.6 19.4 19.2 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 19.0 2.5 3 3.5 4 4.5 5 5.5 6 2.5 Supply Voltage, VIN (V) Copyright ANPEC Electronics Corp. Rev. A.2 - Jan., 2008 3 3.5 4 4.5 5 5.5 6 Supply Voltage, VIN (V) 4 www.anpec.com.tw APW7136A/B/C Typical Operating Characteristics (Refer to Figure 1 in the section “Typical Application Circuits”, VIN=3.6V, TA=25oC, 8WLEDs unless otherwise specified) Switching Frequency vs. Supply Voltage Maximum Duty Cycle vs. Supply Voltage 100 Maximum Duty Cycle, DMAX (%) Switching Frequency, FSW (MHz) 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 90 80 70 60 50 0.4 40 2.5 3 3.5 4 4.5 5 5.5 2.5 6 3 3.5 4 4.5 5 5.5 6 Supply Voltage, VIN (V) Supply Voltage, VIN (V) Operating Waveforms (Refer to the application circuit in the section “Typical Application Circuits”, VIN=3.6V, TA=25oC, 8WLEDs unless otherwise specified ) Start-up Start-up 1 VEN 1 VEN VIN VIN VOUT 2 2 VOUT 3 3 IIN, 0.1A/Div IIN, 0.1A/Div 4 4 6WLEDs, L=22µH, VIN=3.6V, ILED=20mA 8WLEDs, L=22µH, VIN=3.6V, ILED=20mA CH1: VEN, 2V/Div, DC CH2: VIN, 2V/Div, DC CH3: VOUT, 10V/Div, DC CH4: IL, 0.1A/Div, DC Time: 1ms/Div CH1: VEN, 2V/Div, DC CH2: VIN, 2V/Div, DC CH3: VOUT, 10V/Div, DC CH4: IL, 0.1A/Div, DC Time: 1ms/Div Copyright ANPEC Electronics Corp. Rev. A.2 - Jan., 2008 5 www.anpec.com.tw APW7136A/B/C Operating Waveforms (Cont.) (Refer to the application circuit in the section “Typical Application Circuits”, VIN=3.6V, TA=25oC, 8WLEDs unless otherwise specified ) Start-up 1 Open-LED Protection VEN VOUT,10V/Div VIN VOUT 2 1 3 IIN, 0.1A/Div APW7136C 4 4WLEDs, L=22µH, VIN=3.6V, ILED=20mA CH1: VOUT, 10V/Div, DC Time: 20ms/Div CH1: VEN, 2V/Div, DC CH2: VIN, 2V/Div, DC CH3: VOUT, 10V/Div, DC CH4: IL, 0.1A/Div, DC Time: 1ms/Div Normal Operating Waveform VLX, 20V/Div, DC 1 VOUT,50mV/Div,AC 2 IL, 0.1A/Div 3 8WLEDs, L=22µH, VIN=3.6V, ILED=20mA CH1: VLX, 20V/Div, DC CH2: VOUT, 50V/Div, AC CH3: IL, 0.1A/Div, DC Time: 1µs/Div Copyright ANPEC Electronics Corp. Rev. A.2 - Jan., 2008 6 www.anpec.com.tw APW7136A/B/C Pin Descriptions Pin No. Name 1 LX 2 GND 3 FB Function Description Switch pin. Connect this pin to inductor/diode here. Power and signal ground pin. Feedback Pin. Reference voltage is 0.25V. Connect this pin to cathode of the lowest LED and resistor (R1). Calculate resistor value according to R1=0.25V/ILED. Enable Control Input. Forcing this pin above 1.0V enables the device, or forcing this pin below 0.4V 4 to shut it down. In shutdown, all functions are disabled to decrease the supply current below 1µA. EN Do not leave this pin floating. 5 OVP Over Voltage Protection Input Pin. OVP is connected to the output capacitor of the converter. 6 VIN Main Supply Pin. Must be closely decoupled to GND with a 4.7µF or greater ceramic capacitor. Block Diagram VIN EN OVP UVLO LX Gate Driver Control Logic OverTemperature Protection Slope Compensation Current limit Current Sense Amplifier ICMP Error Amplifier Σ Oscillator FB GND COMP EAMP Softstart Copyright ANPEC Electronics Corp. Rev. A.2 - Jan., 2008 7 VREF 0.25V www.anpec.com.tw APW7136A/B/C Typical Application Circuits VIN VOUT L1 VIN 22µH C1 4.7µF 6 2 OFF ON 4 VIN 22µH LX GND OVP 1 C1 4.7µF C2 1µF 6 Up to 8 WLEDs 5 GND 100Hz~100KHz FB 3 C2 1µF 5 OVP EN 3 FB R1 12Ω Duty=100%, ILED=20mA Duty=0%, LED off Figure 1. Typical 8 WLEDs Application Up to 8 WLEDs APW7136 4 R1 12Ω 1 LX VIN 2 APW7136 EN VOUT L1 Figure 2. Brightness control using a PWM signal applies to EN VIN VOUT L1 22µH C1 4.7µF 6 VIN 2 GND OVP EN FB 3.3V PWM 0V brightness control Duty=100%, LED off Duty=0%, ILED=20mA R2 = VREF ⋅ R1 = 1 C2 1µF 5 Up to 8 WLEDs APW7136 4 OFF ON LX 3 R3 120K R2 10K R1 12Ω VADJ R4 10K C3 0.1µF ILED,MAX ⋅ R3 + VADJ,MIN − ILED,MIN ⋅ R3 − VADJ,MAX VADJ,MAX ⋅ ILED,MAX + VREF ⋅ ILED,MIN − VADJ,MIN ⋅ ILED,MIN − VREF ⋅ ILED,MAX R2 R2 V REF ⋅ 1 + ⋅ V ADJ ,MIN − R3 R3 ILED ,MAX Figure 3. Brightness control using a filtered PWM signal VIN L1 4.5V~6V 10µH C1 10µF 6 2 4 OFF ON VIN GND VOUT LX OVP 1 C2 10µF 9 Strings total 5 APW7136 EN FB 3 R1 1.4Ω 0603 Figure 4. Circuit for driving 27 WLEDs Copyright ANPEC Electronics Corp. Rev. A.2 - Jan., 2008 8 www.anpec.com.tw APW7136A/B/C Function Descriptions Main Control Loop Over-Temperature Protection (OTP) The APW7136 is a constant frequency current-mode The over-temperature circuit limits the junction tempera- switching regulator. During normal operation, the internal N-channel power MOSFET is turned on each cycle ture of the APW7136. When the junction temperature exceeds 150 ο C, a thermal sensor turns off the power when the oscillator sets an internal RS latch and turned off when an internal comparator (ICMP) resets the latch. MOSFET, allowing the devices to cool. The thermal sensor allows the converters to start a soft-start process and The peak inductor current at which ICMP resets the RS latch is controlled by the voltage on the COMP node, which regulate the output voltage again after the junction temperature cools by 40οC. The OTP designed with a 40οC is the output of the error amplifier (EAMP). An external resistive divider connected between VOUT and ground al- hysteresis lowers the average Junction Temperature (TJ) during continuous thermal overload conditions, increas- lows the EAMP to receive an output feedback voltage VFB at FB pin. When the load current increases, it causes a ing the lifetime of the device. Enable/Shutdown slightly decrease in VFB relative to the 0.25V reference, which in turn causes the COMP voltage to increase until Driving EN to ground places the APW7136 in shutdown the average inductor current matches the new load current. mode. When in shutdown, the internal power MOSFET turns off, all internal circuitry shuts down and the quiescnet supply current reduces to 1µA maximum. VIN Under-Voltage Lockout (UVLO) This pin also could be used as a digital input allowing brightness control using a PWM signal from 100Hz to The Under-Voltage Lockout (UVLO) circuit compares the input voltage at VIN with the UVLO threshold (2.2V, typical) 100KHz. The 0% duty cycle of PWM signal corresponds to zero LEDs current and 100% corresponds to full one. to ensure the input voltage is high enough for reliable operation. The 100mV (typ) hysteresis prevents supply Open-LED Protection transients from causing a restart. Once the input voltage exceeds the UVLO rising threshold, startup begins. When In driving LED applications, the feedback voltage on FB pin falls down if one of the LEDs, in series, is failed. the input voltage falls below the UVLO falling threshold, the controller turns off the converter. Meanwhile, the converter unceasingly boosts the output voltage like a open-loop operation. Therefore, an over- Soft-Start voltage protection (OVP), monitoring the output voltage via OVP pin, is integrated into the chip to prevent the LX The APW7136 has a built-in soft-start to control the Nchannel MOSFET current rise during start-up. During softstart, an internal ramp, connected to one of the inverting and the output voltages from exceeding their maximum voltage ratings. When the voltage on the OVP pin rises inputs, raise up to replace the output voltage of error amplifier until the ramp voltage reaches the VCOMP. above the OVP threshold, the converter stops switching and prevents the output voltage from rising. The converter Current-Limit Protection can work again when the OVP voltage falls below the falling of OVP voltage threshold. The APW7136 monitors the inductor current, flowing through the N-channel MOSFET, and limits the current peak at current-limit level to prevent loads and the APW7136 from damages during overload conditions. Copyright ANPEC Electronics Corp. Rev. A.2 - Jan., 2008 9 www.anpec.com.tw APW7136A/B/C Application Information The peak inductor current is calculated as the following Input Capacitor Selection equation: The input capacitor (CIN) reduces the ripple of the input current drawn from the input supply and reduces noise IPEAK = IIN(MAX ) + injection into the IC. The reflected ripple voltage will be smaller when an input capacitor with larger capacitance is used. For reliable operation, it is recommended to VIN select the capacitor with maximum voltage rating at least 1.2 times of the maximum input voltage. The capacitors IIN 1 VIN ⋅ (VOUT − VIN ) ⋅ 2 VOUT ⋅ L ⋅ FSW IL LX N-FET CIN IOUT D1 VOUT ESR ISW should be placed close to the VIN and GND. COUT Inductor Selection Selecting an inductor with low dc resistance reduces conduction losses and achieves high efficiency. The efficiency IL ILIM is moderated whilst using small chip inductor which opIPEAK erates with higher inductor core losses. Therefore, it is ∆IL necessary to take further consideration while choosing IIN an adequate inductor. Mainly, the inductor value determines the inductor ripple current: larger inductor value ISW results in smaller inductor ripple current and lower conduction losses of the converter. However, larger inductor value generates slower load transient response. A reasonable design rule is to set the ripple current, ∆IL, to be 30% to 50% of the maximum average inductor current, IL(AVG). The inductor value can be obtained as below, V L ≥ IN VOUT ID 2 VOUT − VIN η × × F ⋅I SW OUT (MAX ) ∆IL IL (AVG ) IOUT Output Capacitor Selection where The current-mode control scheme of the APW7136 allows the usage of tiny ceramic capacitors. The higher VIN = input voltage VOUT = output voltage capacitor value provides good load transients response. Ceramic capacitors with low ESR values have the lowest FSW = switching frequency in MHz output voltage ripple and are recommended. If required, tantalum capacitors may be used as well. The output ripple IOUT = maximum output current in amp. η = Efficiency is the sum of the voltages across the ESR and the ideal output capacitor. ∆IL /IL(AVG) = inductor ripple current/average current (0.3 to 0.5 typical) To avoid saturation of the inductor, the inductor should be rated at least for the maximum input current of the con- Δ VOUT = ΔVESR + ΔVCOUT verter plus the inductor ripple current. The maximum input current is calculated as below: ∆VCOUT ≈ IIN(MAX ) = V − VIN ⋅ OUT VOUT ⋅ FSW ∆VESR ≈ IPEAK ⋅ RESR IOUT (MAX ) ⋅ VOUT VIN ⋅ η Copyright ANPEC Electronics Corp. Rev. A.2 - Jan., 2008 IOUT COUT where IPEAK is the peak inductor current. 10 www.anpec.com.tw APW7136A/B/C Application Information (Cont.) Output Capacitor Selection (Cont.) Setting the LED Current For ceramic capacitor application, the output voltage ripple In figure 1, the converter regulates the voltage on FB pin, connected with the cathod of the lowest LED and the cur- is dominated by the ∆VCOUT. When choosing the input and output ceramic capacitors, the X5R or X7R with their good temperature and voltage characteristics are recommended. rent-sense resistor R1, at 0.25V (typical). Therefore the current (ILED), flowing via the LEDs and the R1, is calculated by the following equation: ILED = 0.25V/R1 Diode Selection To achieve high efficiency, a Schottky diode must be used. The current rating of the diode must meet the peak current rating of the converter. Recommended Inductor Selection Designator Manufacturer L1 GOTREND 0.592 Saturation Current (A) 0.52 Dimensions L x W x H (mm3) 3.85 x 3.85 x 1.8 TC Code X5R X7R Rated Voltage (V) 6.3 50 Case size 0603 0805 Part Number Inductance (µH) Max DCR (ohm) GTSD32 22 Recommended Capacitor Selection Designator Manufacturer Part Number C1 Murata GRM188R60J475KE19 C2 Murata GRM21BR71H105KA12 Capacitance (µF) 4.7 1.0 Recommended Diode Selection Designator Manufacturer D1 D1 Zowie Zowie Part Number MSCD106 MSCD104 Maximum average forward rectified current (A) 1.0 1.0 Maximum repetitive peak reverse voltage (V) 60 40 Case size 0805 0805 Layout Consideration For all switching power supplies, the layout is an important step in the design; especially at high peak currents and switching frequencies. If the layout is not carefully done, the regulator might show noise problems and duty cycle jitter. Via To OVP L1 To Anode of WLEDs 1. The input capacitor should be placed close to the VIN and GND. Connecting the capacitor with VIN and GND pins by short and wide tracks without using any vias for filtering and minimizing the input voltage ripple. VOUT D1 C1 LX C2 VIN Via To V OUT VEN 2. The inductor should be placed as close as possible to the LX pin to minimize length of the copper tracks as well as the noise coupling into other circuits. 3. Since the feedback pin and network is a high impedance circuit, the feedback network should be routed away from the inductor. The feedback pin and feedback network should be shielded with a ground plane or track to minimize noise coupling into this circuit. C3 R4 R3 R2 From Cathod of WLEDs R1 VADJ Via To GND Refer to Fig. 3 Optimized APW7136 Layout 4. A star ground connection or ground plane minimizes ground shifts and noise is recommended. Copyright ANPEC Electronics Corp. Rev. A.2 - Jan., 2008 11 www.anpec.com.tw APW7136A/B/C Package Information SOT-23-6 D e E E1 SEE VIEW A b c 0.25 A L 0 GAUGE PLANE SEATING PLANE A1 A2 e1 VIEW A S Y M B O L SOT-23-6 MILLIMETERS MIN. INCHES MAX. A MIN. MAX. 1.45 0.057 A1 0.00 0.15 0.000 0.006 A2 0.90 1.30 0.035 0.051 b 0.30 0.50 0.012 0.020 c 0.08 0.22 0.003 0.009 D 2.70 3.10 0.106 0.122 E 2.60 3.00 0.102 0.118 E1 1.40 1.80 0.055 0.071 e 0.95 BSC e1 1.90 BSC 0.037 BSC 0.075 BSC L 0.30 0.60 0 0° 8° 0.012 0° 0.024 8° Note : 1. Follow JEDEC TO-178 AB. 2. Dimension D and E1 do not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil per side. Copyright ANPEC Electronics Corp. Rev. A.2 - Jan., 2008 12 www.anpec.com.tw APW7136A/B/C Carrier Tape & Reel Dimensions P0 P2 P1 A B0 W F E1 OD0 K0 A0 A OD1 B B T SECTION A-A SECTION B-B H A d T1 Application SOT-23-6 A 178.0± 2.00 P0 H 50 MIN. 4.0±0.10 4.0±0.10 P1 T1 C d D W E1 F 8.4+2.00 13.0+0.50 1.5 MIN. 20.2 MIN. 8.0±0.30 1.75±0.10 3.5±0.05 -0.00 -0.20 P2 D0 D1 T A0 B0 K0 1.5+0.10 0.6+0.00 2.0±0.10 3.20±0.20 3.10±0.20 1.50±0.20 1.5 MIN. -0.00 -0.40 (mm) Devices Per Unit Package Type Unit Quantity SOT-23-6 Tape & Reel 3000 Copyright ANPEC Electronics Corp. Rev. A.2 - Jan., 2008 13 www.anpec.com.tw APW7136A/B/C Reflow Condition (IR/Convection or VPR Reflow) tp TP Critical Zone TL to TP Ramp-up Temperature TL tL Tsmax Tsmin Ramp-down ts Preheat 25 t 25°C to Peak Time Reliability Test Program Test item SOLDERABILITY HOLT PCT TST ESD Latch-Up Method MIL-STD-883D-2003 MIL-STD-883D-1005.7 JESD-22-B, A102 MIL-STD-883D-1011.9 MIL-STD-883D-3015.7 JESD 78 Description 245°C, 5 sec 1000 Hrs Bias @125°C 168 Hrs, 100%RH, 121°C -65°C~150°C, 200 Cycles VHBM > 2KV, VMM > 200V 10ms, 1tr > 100mA Classification Reflow Profiles Profile Feature Average ramp-up rate (TL to TP) Preheat - Temperature Min (Tsmin) - Temperature Max (Tsmax) - Time (min to max) (ts) Time maintained above: - Temperature (TL) - Time (tL) Peak/Classification Temperature (Tp) Time within 5°C of actual Peak Temperature (tp) Ramp-down Rate Time 25°C to Peak Temperature Sn-Pb Eutectic Assembly Pb-Free Assembly 3°C/second max. 3°C/second max. 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds 183°C 60-150 seconds 217°C 60-150 seconds See table 1 See table 2 10-30 seconds 20-40 seconds 6°C/second max. 6°C/second max. 6 minutes max. 8 minutes max. Note: All temperatures refer to topside of the package. Measured on the body surface. Copyright ANPEC Electronics Corp. Rev. A.2 - Jan., 2008 14 www.anpec.com.tw APW7136A/B/C Classification Reflow Profiles (Cont.) Table 1. SnPb Eutectic Process – Package Peak Reflow Temperatures 3 3 Package Thickness Volume mm <350 Volume mm ≥350 <2.5 mm ≥2.5 mm 240 +0/-5°C 225 +0/-5°C 225 +0/-5°C 225 +0/-5°C Table 2. Pb-free Process – Package Classification Reflow Temperatures 3 Package Thickness 3 Volume mm <350 Volume mm 350-2000 3 Volume mm >2000 <1.6 mm 260 +0°C* 260 +0°C* 260 +0°C* 1.6 mm – 2.5 mm 260 +0°C* 250 +0°C* 245 +0°C* ≥2.5 mm 250 +0°C* 245 +0°C* 245 +0°C* * Tolerance: The device manufacturer/supplier shall assure process compatibility up to and including the stated classification temperature (this means Peak reflow temperature +0°C. For example 260°C+0°C) at the rated MSL level. Customer Service Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 2F, No. 11, Lane 218, Sec 2 Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan Tel : 886-2-2910-3838 Fax : 886-2-2917-3838 Copyright ANPEC Electronics Corp. Rev. A.2 - Jan., 2008 15 www.anpec.com.tw