POSEICO SPA Via Pillea 42-44, 16153 Genova - ITALY Tel. + 39 010 8599400 - Fax + 39 010 8682006 Sales Office: Tel. + 39 010 8599400 - [email protected] PHASE CONTROL THYRISTOR AT880 Repetitive voltage up to Mean forward current Surge current 5200 V 2571 A 40 kA FINAL SPECIFICATION Feb. 17 - Issue: 02 Symbol Characteristic Tj [°C] Conditions Value Unit BLOCKING V RRM Repetitive peak reverse voltage 125 5200 V V RSM Non-repetitive peak reverse voltage 125 5300 V V DRM Repetitive peak off-state voltage 125 5200 V I RRM Repetitive peak reverse current V=VRRM 125 300 mA I DRM Repetitive peak off-state current V=VDRM 125 300 mA I T (AV) Mean forward current 180° sin ,50 Hz, Th=55°C, double side cooled 2571 A I T (AV) Mean forward current 180° sin ,50 Hz, Tc=85°C, double side cooled I TSM Surge forward current CONDUCTING 125 1981 A 40 kA I² t I² t Sine wave, 10 ms without reverse voltage V T On-state voltage On-state current = V T(TO) Threshold voltage 125 1,07 V r T On-state slope resistance 125 0,240 mohm 3 8000 x 10 2000 A 25 1,85 A²s V SWITCHING di/dt Critical rate of rise of on-state current, min. From 75% VDRM up to 1600 A; gate 10V, 5W 125 200 A/µs dv/dt Critical rate of rise of off-state voltage, min. Linear ramp up to 67% of VDRM 125 1000 V/µs t d Gate controlled delay time, typical VD=100V; gate source 40V, 10W , tr=.5 µs 25 t q Circuit commutated turn-off time, typical dv/dt = 20 V/µs linear up to 67% VDRM Q rr Reverse recovery charge di/dt = -20 A/µs, I= 1050 A I rr Peak reverse recovery current VR= 50 V I H Holding current, typical VD=5V, gate open circuit 25 300 mA I L Latching current, typical VD=12V, tp=30µs 25 1000 mA V GT Gate trigger voltage VD=12V 25 3,50 V I GT Gate trigger current VD=12V 25 400 mA V GD Non-trigger gate voltage, min. VD=VDRM 125 0,80 V V FGM Peak gate voltage (forward) 30 V I FGM Peak gate current 10 A V RGM Peak gate voltage (reverse) 10 V P GM Peak gate power dissipation 150 W P G Average gate power dissipation 2 W R th(j-h) Thermal impedance, DC Junction to heatsink, double side cooled R th(c-h) Thermal impedance Case to heatsink, double side cooled T j Operating junction temperature 3 450 125 µs µs µC A GATE Pulse width 100 µs MOUNTING F 10,5 °C/kW 1,5 °C/kW -30 / 125 °C Mounting force 60.0 / 80.0 kN Mass 1700 ORDERING INFORMATION : AT880 S 52 standard specification VRRM/100 g AT880 PHASE CONTROL THYRISTOR FINAL SPECIFICATION Feb. 17 - Issue: 02 DISSIPATION CHARACTERISTICS SQUARE WAVE Th [°C] 130 120 110 100 90 80 70 60 50 30° 60° 1000 1500 90° 120° 180° DC 40 0 500 2000 2500 3000 3500 4000 IF(AV) [A] PF(AV) [W] DC 180° 6000 60° 5000 90° 120° 30° 4000 3000 2000 1000 0 0 500 1000 1500 2000 IF(AV) [A] 2500 3000 3500 4000 AT880 PHASE CONTROL THYRISTOR FINAL SPECIFICATION Feb. 17 - Issue: 02 DISSIPATION CHARACTERISTICS SINE WAVE Th [°C] 130 120 110 100 90 80 70 60 50 30° 60° 90° 120° 180° 40 0 500 1000 1500 2000 2500 3000 IF(AV) [A] PF(AV) [W] 7000 180° 120° 90° 6000 30° 60° 5000 4000 3000 2000 1000 0 0 500 1000 1500 IF(AV) [A] 2000 2500 3000 AT880 PHASE CONTROL THYRISTOR FINAL SPECIFICATION Feb. 17 - Issue: 02 SURGE CHARACTERISTIC Tj = 125 °C 9000 45 8000 40 7000 35 6000 30 ITSM [kA] On-state Current [A] ON-STATE CHARACTERISTIC Tj = 125 °C 5000 4000 25 20 3000 15 2000 10 1000 5 0 0 0 1 2 3 4 1 On-state Voltage [V] 10 n° cycles TRANSIENT THERMAL IMPEDANCE DOUBLE SIDE COOLED 12 10 Zth j-h [°C/kW] 8 6 4 2 0 0,001 0,01 0,1 1 t[s] 10 100 Cathode terminal type DIN 46244 - A 4.8 - 0.8 Gate terminal type AMP 60598 - 1 Distributed by All the characteristics given in this data sheet are guaranteed only with uniform clamping force, cleaned and lubricated heatsink, surfaces with flatness < .03 mm and roughness < 2 µm. In the interest of product improvement POSEICO SpA reserves the right to change any data given in this data sheet at any time without previous notice. If not stated otherwise the maximum value of ratings (simbols over shaded background) and characteristics is reported. 100