AD AD8628AUJZ-REEL Zero-drift, single-supply, rail-to-rail input/output operational amplifier Datasheet

Zero-Drift, Single-Supply, Rail-to-Rail
Input/Output Operational Amplifier
AD8628/AD8629/AD8630
OUT 1
V– 2
AD8628
5
V+
4
–IN
TOP VIEW
(Not to Scale)
+IN 3
Figure 1. 5-Lead TSOT (UJ-5) and 5-Lead SOT-23 (RJ-5)
NC 1
–IN 2
AD8628
8
NC
7
V+
6 OUT
TOP VIEW
V– 4 (Not to Scale) 5 NC
Automotive sensors
Pressure and position sensors
Strain gage amplifiers
Medical instrumentation
Thermocouple amplifiers
Precision current sensing
Photodiode amplifiers
GENERAL DESCRIPTION
This amplifier has ultralow offset, drift, and bias current.
The AD8628/AD8629/AD8630 are wide bandwidth auto-zero
amplifiers featuring rail-to-rail input and output swing and low
noise. Operation is fully specified from 2.7 V to 5 V single supply
(±1.35 V to ±2.5 V dual supply).
The AD8628/AD8629/AD8630 provide benefits previously
found only in expensive auto-zeroing or chopper-stabilized
amplifiers. Using Analog Devices, Inc., topology, these zerodrift amplifiers combine low cost with high accuracy and low
noise. No external capacitor is required. In addition, the AD8628/
AD8629/AD8630 greatly reduce the digital switching noise
found in most chopper-stabilized amplifiers.
With an offset voltage of only 1 μV, drift of less than 0.005 μV/°C,
and noise of only 0.5 μV p-p (0 Hz to 10 Hz), the AD8628/
AD8629/AD8630 are suited for applications where error
sources cannot be tolerated. Position and pressure sensors,
medical equipment, and strain gage amplifiers benefit greatly
from nearly zero drift over their operating temperature range.
Many systems can take advantage of the rail-to-rail input and
output swings provided by the AD8628/AD8629/AD8630 to
reduce input biasing complexity and maximize SNR.
02735-002
+IN 3
NC = NO CONNECT
APPLICATIONS
02735-001
PIN CONFIGURATIONS
Figure 2. 8-Lead SOIC_N (R-8)
OUT A 1
–IN A 2
8
AD8629
V+
OUT B
TOP VIEW
6 –IN B
(Not to Scale)
V– 4
5 +IN B
7
+IN A 3
02735-063
Lowest auto-zero amplifier noise
Low offset voltage: 1 μV
Input offset drift: 0.002 μV/°C
Rail-to-rail input and output swing
5 V single-supply operation
High gain, CMRR, and PSRR: 130 dB
Very low input bias current: 100 pA maximum
Low supply current: 1.0 mA
Overload recovery time: 50 μs
No external components required
Qualified for automotive applications
Figure 3. 8-Lead SOIC_N (R-8) and 8-Lead MSOP (RM-8)
14 OUT D
OUT A 1
–IN A 2
+IN A 3
13 –IN D
AD8630
12 +IN D
TOP VIEW
11 V–
(Not to Scale)
10 +IN C
+IN B 5
V+ 4
–IN B 6
9
–IN C
OUT B 7
8
OUT C
02735-066
FEATURES
Figure 4. 14-Lead SOIC_N (R-14) and 14-Lead TSSOP (RU-14)
The AD8628/AD8629/AD8630 are specified for the extended
industrial temperature range (−40°C to +125°C). The AD8628
is available in tiny 5-lead TSOT, 5-lead SOT-23, and 8-lead
narrow SOIC plastic packages. The AD8629 is available in the
standard 8-lead narrow SOIC and MSOP plastic packages. The
AD8630 quad amplifier is available in 14-lead narrow SOIC and
14-lead TSSOP plastic packages. See the Ordering Guide for
automotive grades.
Rev. I
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2002–2011 Analog Devices, Inc. All rights reserved.
AD8628/AD8629/AD8630
TABLE OF CONTENTS
Features .............................................................................................. 1
1/f Noise....................................................................................... 14
Applications....................................................................................... 1
Peak-to-Peak Noise .................................................................... 15
General Description ......................................................................... 1
Noise Behavior with First-Order, Low-Pass Filter ................. 15
Pin Configurations ........................................................................... 1
Total Integrated Input-Referred Noise for First-Order Filter15
Revision History ............................................................................... 2
Input Overvoltage Protection ................................................... 16
Specifications..................................................................................... 3
Output Phase Reversal............................................................... 16
Electrical Characteristics—VS = 5.0 V....................................... 3
Overload Recovery Time .......................................................... 16
Electrical Characteristics—VS = 2.7 V....................................... 4
Infrared Sensors.......................................................................... 17
Absolute Maximum Ratings............................................................ 5
Precision Current Shunt Sensor ............................................... 18
Thermal Characteristics .............................................................. 5
Output Amplifier for High Precision DACs........................... 18
ESD Caution.................................................................................. 5
Outline Dimensions ....................................................................... 19
Typical Performance Characteristics ............................................. 6
Ordering Guide .......................................................................... 21
Functional Description .................................................................. 14
REVISION HISTORY
4/11—Rev. H to Rev. I
Updated Outline Dimensions ....................................................... 19
Changes to Ordering Guide .......................................................... 21
4/10—Rev. G to Rev. H
Change to Features List.................................................................... 1
Change to General Description Section ........................................ 1
Changes to Table 3............................................................................ 5
Updated Outline Dimensions Section ......................................... 19
Changes to Ordering Guide .......................................................... 21
6/08—Rev. F to Rev. G
Changes to Features Section............................................................ 1
Changes to Table 5 and Figure 42 Caption ................................. 12
Changes to 1/f Noise Section and Figure 49 ............................... 14
Changes to Figure 51 Caption and Figure 55 ............................. 15
Changes to Figure 57 Caption and Figure 58 Caption .............. 16
Changes to Figure 60 Caption and Figure 61 Caption .............. 17
Changes to Figure 64...................................................................... 18
2/08—Rev. E to Rev. F
Renamed TSOT-23 to TSOT ............................................Universal
Deleted Figure 4 and Figure 6......................................................... 1
Changes to Figure 3 and Figure 4 Captions .................................. 1
Changes to Table 1............................................................................ 3
Changes to Table 2............................................................................ 4
Changes to Table 4............................................................................ 5
Updated Outline Dimensions ....................................................... 19
Changes to Ordering Guide .......................................................... 20
5/05—Rev. D to Rev. E
Changes to Ordering Guide .......................................................... 22
1/05—Rev. C to Rev. D
Added AD8630 ...................................................................Universal
Added Figure 5 and Figure 6............................................................1
Changes to Caption in Figure 8 and Figure 9 ................................7
Changes to Caption in Figure 14.....................................................8
Changes to Figure 17.........................................................................8
Changes to Figure 23 and Figure 24................................................9
Changes to Figure 25 and Figure 26............................................. 10
Changes to Figure 31...................................................................... 11
Changes to Figure 40, Figure 41, Figure 42................................. 12
Changes to Figure 43 and Figure 44............................................. 13
Changes to Figure 51...................................................................... 15
Updated Outline Dimensions....................................................... 20
Changes to Ordering Guide .......................................................... 20
10/04—Rev. B to Rev. C
Updated Formatting...........................................................Universal
Added AD8629 ...................................................................Universal
Added SOIC and MSOP Pin Configurations ................................1
Added Figure 48 ............................................................................. 13
Changes to Figure 62...................................................................... 17
Added MSOP Package ................................................................... 19
Changes to Ordering Guide .......................................................... 22
10/03—Rev. A to Rev. B
Changes to General Description .....................................................1
Changes to Absolute Maximum Ratings........................................4
Changes to Ordering Guide .............................................................4
Added TSOT-23 Package .............................................................. 15
6/03—Rev. 0 to Rev. A
Changes to Specifications.................................................................3
Changes to Ordering Guide .............................................................4
Change to Functional Description............................................... 10
Updated Outline Dimensions....................................................... 15
10/02—Revision 0: Initial Version
Rev. I | Page 2 of 24
AD8628/AD8629/AD8630
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—VS = 5.0 V
VS = 5.0 V, VCM = 2.5 V, TA = 25°C, unless otherwise noted.
Table 1.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Symbol
Conditions
Min
VOS
Typ
Max
Unit
1
5
10
μV
μV
30
100
100
300
1.5
200
250
5
pA
pA
nA
pA
pA
V
dB
dB
dB
dB
μV/°C
−40°C ≤ TA ≤ +125°C
Input Bias Current
AD8628/AD8629
AD8630
IB
Input Offset Current
IOS
−40°C ≤ TA ≤ +125°C
50
−40°C ≤ TA ≤ +125°C
Input Voltage Range
Common-Mode Rejection Ratio
CMRR
Large Signal Voltage Gain
AVO
Offset Voltage Drift
OUTPUT CHARACTERISTICS
Output Voltage High
∆VOS/∆T
VOH
Output Voltage Low
VOL
Short-Circuit Limit
ISC
VCM = 0 V to 5 V
−40°C ≤ TA ≤ +125°C
RL = 10 kΩ, VO = 0.3 V to 4.7 V
−40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +125°C
RL = 100 kΩ to ground
−40°C ≤ TA ≤ +125°C
RL = 10 kΩ to ground
−40°C ≤ TA ≤ +125°C
RL = 100 kΩ to V+
−40°C ≤ TA ≤ +125°C
RL = 10 kΩ to V+
−40°C ≤ TA ≤ +125°C
0
120
115
125
120
4.99
4.99
4.95
4.95
±25
−40°C ≤ TA ≤ +125°C
Output Current
IO
−40°C ≤ TA ≤ +125°C
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current per Amplifier
INPUT CAPACITANCE
Differential
Common Mode
DYNAMIC PERFORMANCE
Slew Rate
Overload Recovery Time
Gain Bandwidth Product
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
PSRR
ISY
VS = 2.7 V to 5.5 V, −40°C ≤ TA ≤ +125°C
VO = VS/2
−40°C ≤ TA ≤ +125°C
115
140
130
145
135
0.002
4.996
4.995
4.98
4.97
1
2
10
15
±50
±40
±30
±15
130
0.85
1.0
0.02
5
5
20
20
1.1
1.2
V
V
V
V
mV
mV
mV
mV
mA
mA
mA
mA
dB
mA
mA
CIN
SR
1.5
8.0
pF
pF
RL = 10 kΩ
1.0
0.05
2.5
V/μs
ms
MHz
0.1 Hz to 10 Hz
0.1 Hz to 1.0 Hz
f = 1 kHz
f = 10 Hz
0.5
0.16
22
5
μV p-p
μV p-p
nV/√Hz
fA/√Hz
GBP
en p-p
en
in
Rev. I | Page 3 of 24
AD8628/AD8629/AD8630
ELECTRICAL CHARACTERISTICS—VS = 2.7 V
VS = 2.7 V, VCM = 1.35 V, VO = 1.4 V, TA = 25°C, unless otherwise noted.
Table 2.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Symbol
Conditions
Min
VOS
Typ
Max
Unit
1
5
10
μV
μV
30
100
1.0
50
100
300
1.5
200
250
2.7
pA
pA
nA
pA
pA
V
dB
dB
dB
dB
μV/°C
−40°C ≤ TA ≤ +125°C
Input Bias Current
AD8628/AD8629
AD8630
IB
Input Offset Current
IOS
−40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +125°C
Input Voltage Range
Common-Mode Rejection Ratio
CMRR
Large Signal Voltage Gain
AVO
Offset Voltage Drift
OUTPUT CHARACTERISTICS
Output Voltage High
∆VOS/∆T
VOH
Output Voltage Low
VOL
Short-Circuit Limit
ISC
VCM = 0 V to 2.7 V
−40°C ≤ TA ≤ +125°C
RL = 10 kΩ, VO = 0.3 V to 2.4 V
−40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +125°C
RL = 100 kΩ to ground
−40°C ≤ TA ≤ +125°C
RL = 10 kΩ to ground
−40°C ≤ TA ≤ +125°C
RL = 100 kΩ to V+
−40°C ≤ TA ≤ +125°C
RL = 10 kΩ to V+
−40°C ≤ TA ≤ +125°C
0
115
110
110
105
2.68
2.68
2.67
2.67
±10
−40°C ≤ TA ≤ +125°C
Output Current
IO
−40°C ≤ TA ≤ +125°C
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current per Amplifier
INPUT CAPACITANCE
Differential
Common Mode
DYNAMIC PERFORMANCE
Slew Rate
Overload Recovery Time
Gain Bandwidth Product
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
PSRR
ISY
VS = 2.7 V to 5.5 V, −40°C ≤ TA ≤ +125°C
VO = VS/2
−40°C ≤ TA ≤ +125°C
115
130
120
140
130
0.002
2.695
2.695
2.68
2.675
1
2
10
15
±15
±10
±10
±5
130
0.75
0.9
0.02
5
5
20
20
1.0
1.2
V
V
V
V
mV
mV
mV
mV
mA
mA
mA
mA
dB
mA
mA
CIN
SR
1.5
8.0
pF
pF
RL = 10 kΩ
1
0.05
2
V/μs
ms
MHz
0.1 Hz to 10 Hz
f = 1 kHz
f = 10 Hz
0.5
22
5
μV p-p
nV/√Hz
fA/√Hz
GBP
en p-p
en
in
Rev. I | Page 4 of 24
AD8628/AD8629/AD8630
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Supply Voltage
Input Voltage
Differential Input Voltage 1
Output Short-Circuit Duration to GND
Storage Temperature Range
Operating Temperature Range
Junction Temperature Range
Lead Temperature (Soldering, 60 sec)
ESD AD8628
HBM 8-Lead SOIC
FICDM 8-Lead SOIC
FICDM 5-Lead TSOT
MM 8-Lead SOIC
ESD AD8629
HBM 8-Lead SOIC
FICDM 8-Lead SOIC
ESD AD8630
HBM 14-Lead SOIC
FICDM 14-Lead SOIC
FICDM 14-Lead TSSOP
MM 14-Lead SOIC
1
Rating
6V
GND – 0.3 V to VS + 0.3 V
±5.0 V
Indefinite
−65°C to +150°C
−40°C to +125°C
−65°C to +150°C
300°C
±7000V
±1500V
±1000V
±200V
THERMAL CHARACTERISTICS
θJA is specified for worst-case conditions, that is, θJA is specified
for the device soldered in a circuit board for surface-mount
packages. This was measured using a standard two-layer board.
Table 4.
Package Type
5-Lead TSOT (UJ-5)
5-Lead SOT-23 (RJ-5)
8-Lead SOIC_N (R-8)
8-Lead MSOP (RM-8)
14-Lead SOIC_N (R-14)
14-Lead TSSOP (RU-14)
ESD CAUTION
±4000V
±1000V
±5000V
±1500V
±1500V
±200V
Differential input voltage is limited to ±5 V or the supply voltage, whichever
is less.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. I | Page 5 of 24
θJA
207
230
158
190
105
148
θJC
61
146
43
44
43
23
Unit
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
AD8628/AD8629/AD8630
TYPICAL PERFORMANCE CHARACTERISTICS
100
VS = 2.7V
TA = 25°C
VS = 5V
VCM = 2.5V
TA = 25°C
90
80
NUMBER OF AMPLIFIERS
140
120
100
80
60
70
60
50
40
30
40
20
20
10
0
–2.5
–1.5
–0.5
0.5
INPUT OFFSET VOLTAGE (µV)
1.5
2.5
0
–2.5
02735-003
–1.5
Figure 5. Input Offset Voltage Distribution
+85°C
NUMBER OF AMPLIFIERS
30
+25°C
1
2
3
4
5
INPUT COMMON-MODE VOLTAGE (V)
4
3
2
1
–40°C
0
5
6
0
0
2
8
10
1
10
Figure 9. Input Offset Voltage Drift
Figure 6. AD8628 Input Bias Current vs. Input Common-Mode Voltage
1k
1500
VS = 5V
4
6
TCVOS (nV/°C)
02735-007
10
02735-004
INPUT BIAS CURRENT (pA)
40
20
VS = 5V
TA = –40°C TO +125°C
6
50
150°C
1000
VS = 5V
TA = 25°C
100
125°C
OUTPUT VOLTAGE (mV)
INPUT BIAS CURRENT (pA)
2.5
7
VS = 5V
500
0
–500
10
SOURCE
SINK
1
0.1
–1000
0
1
2
3
4
5
INPUT COMMON-MODE VOLTAGE (V)
6
0.01
0.0001
02735-005
–1500
1.5
Figure 8. Input Offset Voltage Distribution
60
0
–0.5
0.5
INPUT OFFSET VOLTAGE (µV)
Figure 7. AD8628 Input Bias Current vs. Input Common-Mode Voltage
0.001
0.01
0.1
LOAD CURRENT (mA)
Figure 10. Output Voltage to Supply Rail vs. Load Current
Rev. I | Page 6 of 24
02735-008
NUMBER OF AMPLIFIERS
160
02735-006
180
AD8628/AD8629/AD8630
1k
1000
TA = 25°C
VS = 2.7V
800
SUPPLY CURRENT (µA)
10
SOURCE
SINK
1
0.1
600
400
0.001
0.01
0.1
LOAD CURRENT (mA)
1
10
0
02735-009
0.01
0.0001
Figure 11. Output Voltage to Supply Rail vs. Load Current
0
1
2
3
4
SUPPLY VOLTAGE (V)
VS = 5V
VCM = 2.5V
TA = –40°C TO +150°C
VS = 2.7V
CL = 20pF
RL = ∞
ФM = 45°
60
OPEN-LOOP GAIN (dB)
INPUT BIAS CURRENT (pA)
6
Figure 14. Supply Current vs. Supply Voltage
1500
1150
5
02735-012
200
900
450
GAIN
40
0
45
20
PHASE
90
135
0
180
PHASE SHIFT (Degrees)
OUTPUT VOLTAGE (mV)
100
225
100
0
25
50
75
100
TEMPERATURE (°C)
125
150
175
10k
100k
1M
FREQUENCY (Hz)
10M
Figure 15. Open-Loop Gain and Phase vs. Frequency
Figure 12. AD8628 Input Bias Current vs. Temperature
1250
70
VS = 5V
CL = 20pF
RL = ∞
ΦM = 52.1°
60
5V
1000
OPEN-LOOP GAIN (dB)
50
2.7V
750
500
250
GAIN
0
40
45
30
PHASE
20
90
10
135
0
180
–10
225
PHASE SHIFT (Degrees)
TA = 25 °C
0
50
100
TEMPERATURE (°C)
150
200
–30
10k
100k
1M
FREQUENCY (Hz)
10M
Figure 16. Open-Loop Gain and Phase vs. Frequency
Figure 13. Supply Current vs. Temperature
Rev. I | Page 7 of 24
02735-014
–20
0
–50
02735-011
SUPPLY CURRENT (µA)
02735-013
–25
02735-010
–20
0
–50
AD8628/AD8629/AD8630
70
300
VS = 2.7V
CL = 20pF
RL = 2kΩ
240
30
OUTPUT IMPEDANCE (Ω)
AV = 100
40
AV = 10
20
10
AV = 1
0
210
180
150
120
90
–10
60
–20
30
–30
1k
10k
100k
1M
FREQUENCY (Hz)
10M
0
100
02735-015
CLOSED-LOOP GAIN (dB)
50
VS = 5V
270
Figure 17. Closed-Loop Gain vs. Frequency
AV = 10
AV = 100
AV = 1
1k
10k
100k
1M
FREQUENCY (Hz)
10M
100M
Figure 20. Output Impedance vs. Frequency
70
VS = 5V
CL = 20pF
RL = 2kΩ
60
AV = 100
40
30
VOLTAGE (500mV/DIV)
CLOSED-LOOP GAIN (dB)
50
AV = 10
20
10
AV = 1
0
0V
VS = ±1.35V
CL = 300pF
RL = ∞
AV = 1
–10
10k
100k
1M
FREQUENCY (Hz)
10M
TIME (4µs/DIV)
02735-019
–30
1k
02735-016
–20
Figure 21. Large Signal Transient Response
Figure 18. Closed-Loop Gain vs. Frequency
300
270
VS = 2.7V
VOLTAGE (1V/DIV)
210
180
150
120
0V
VS = ±2.5V
CL = 300pF
RL = ∞
AV = 1
90
AV = 100
30
0
100
AV = 10
AV = 1
1k
10k
100k
1M
FREQUENCY (Hz)
10M
100M
TIME (5µs/DIV)
Figure 22. Large Signal Transient Response
Figure 19. Output Impedance vs. Frequency
Rev. I | Page 8 of 24
02735-020
60
02735-017
OUTPUT IMPEDANCE (Ω)
240
02735-018
60
AD8628/AD8629/AD8630
80
VS = ±2.5V
RL = 2kΩ
TA = 25°C
70
60
OVERSHOOT (%)
VOLTAGE (50mV/DIV)
VS = ±1.35V
CL = 50pF
RL = ∞
AV = 1
0V
50
40
30
OS–
20
OS+
TIME (4µs/DIV)
0
1k
10
100
CAPACITIVE LOAD (pF)
Figure 26. Small Signal Overshoot vs. Load Capacitance
Figure 23. Small Signal Transient Response
VS = ±2.5V
CL = 50pF
RL = ∞
AV = 1
VS = ±2.5V
AV = –50
RL = 10kΩ
CL = 0pF
CH1 = 50mV/DIV
CH2 = 1V/DIV
VIN
VOLTAGE (V)
VOLTAGE (50mV/DIV)
1
02735-024
02735-021
10
0V
0V
0V
TIME (4µs/DIV)
02735-025
02735-022
VOUT
TIME (2µs/DIV)
Figure 24. Small Signal Transient Response
Figure 27. Positive Overvoltage Recovery
100
VS = ±1.35V
RL = 2kΩ
TA = 25°C
90
0V
VS = ±2.5V
AV = –50
RL = 10kΩ
CL = 0pF
CH1 = 50mV/DIV
CH2 = 1V/DIV
80
VOLTAGE (V)
60
OS–
50
40
VIN
VOUT
OS+
30
20
0
1
10
100
CAPACITIVE LOAD (pF)
1k
TIME (10µs/DIV)
Figure 25. Small Signal Overshoot vs. Load Capacitance
Figure 28. Negative Overvoltage Recovery
Rev. I | Page 9 of 24
02735-026
0V
10
02735-023
OVERSHOOT (%)
70
AD8628/AD8629/AD8630
140
VS = ±1.35V
120
100
80
PSRR (dB)
VOLTAGE (1V/DIV)
VS = ±2.5V
VIN = 1kHz @ ±3V p-p
CL = 0pF
RL = 10kΩ
AV = 1
0V
60
+PSRR
40
20
–PSRR
0
–20
TIME (200µs/DIV)
–60
100
140
100
80
80
60
60
10M
1M
10M
VS = ±2.5V
40
20
0
–20
–20
–40
–40
10k
100k
FREQUENCY (Hz)
1M
10M
–PSRR
20
0
1k
+PSRR
40
–60
100
Figure 30. CMRR vs. Frequency
1k
10k
100k
FREQUENCY (Hz)
Figure 33. PSRR vs. Frequency
3.0
VS = 5V
VS = 2.7V
RL = 10kΩ
TA = 25°C
AV = 1
120
2.5
OUTPUT SWING (V p-p)
100
80
60
40
20
0
–20
2.0
1.5
1.0
0.5
–60
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
Figure 31. CMRR vs. Frequency
0
100
1k
10k
FREQUENCY (Hz)
100k
Figure 34. Maximum Output Swing vs. Frequency
Rev. I | Page 10 of 24
1M
02735-032
–40
02735-029
CMRR (dB)
02735-031
PSRR (dB)
100
140
1M
120
02735-028
CMRR (dB)
140
VS = 2.7V
–60
100
10k
100k
FREQUENCY (Hz)
Figure 32. PSRR vs. Frequency
Figure 29. No Phase Reversal
120
1k
02735-030
02735-027
–40
AD8628/AD8629/AD8630
VOLTAGE NOISE DENSITY (nV/√Hz)
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
1k
10k
FREQUENCY (Hz)
100k
1M
90
75
60
45
30
15
0
02735-033
0
100
Figure 35. Maximum Output Swing vs. Frequency
VS = 2.7V
NOISE AT 1kHz = 21.3nV
105
0
0.30
VOLTAGE (µV)
2.5
0.15
0
–0.15
–0.30
0
1
2
3
4
5
6
TIME (µs)
7
8
9
10
90
75
60
45
30
15
0
02735-034
–0.45
Figure 36. 0.1 Hz to 10 Hz Noise
VS = 2.7V
NOISE AT 10kHz = 42.4nV
105
0
5
10
15
FREQUENCY (kHz)
25
02735-037
VOLTAGE NOISE DENSITY (nV/√Hz)
0.45
2.5
20
Figure 39. Voltage Noise Density at 2.7 V from 0 Hz to 25 kHz
0.60
120
VS = 5V
VOLTAGE NOISE DENSITY (nV/√Hz)
0.45
0.30
0.15
0
–0.15
–0.30
–0.45
0
1
2
3
4
5
6
TIME (µs)
7
8
9
10
02735-035
VOLTAGE (µV)
2.0
120
VS = 2.7V
–0.60
1.0
1.5
FREQUENCY (kHz)
Figure 38. Voltage Noise Density at 2.7 V from 0 Hz to 2.5 kHz
0.60
–0.60
0.5
02735-038
OUTPUT SWING (V p-p)
120
VS = 5V
RL = 10kΩ
TA = 25°C
AV = 1
5.0
02735-036
5.5
Figure 37. 0.1 Hz to 10 Hz Noise
VS = 5V
NOISE AT 1kHz = 22.1nV
105
90
75
60
45
30
15
0
0
0.5
1.0
1.5
FREQUENCY (kHz)
2.0
Figure 40. Voltage Noise Density at 5 V from 0 Hz to 2.5 kHz
Rev. I | Page 11 of 24
AD8628/AD8629/AD8630
150
90
75
60
45
30
15
0
5
10
15
FREQUENCY (kHz)
20
25
ISC–
0
ISC+
–50
0
25
50
75
100
TEMPERATURE (°C)
125
150
175
150
105
90
75
60
45
30
0
10
5
FREQUENCY (kHz)
100
ISC–
50
0
–50
ISC+
–100
–50
02735-040
15
VS = 5V
TA = –40°C TO +150°C
Figure 42. Voltage Noise Density at 5 V from 0 Hz to 10 kHz
–25
0
25
50
75
100
TEMPERATURE (°C)
125
150
175
02735-043
OUTPUT SHORT-CIRCUIT CURRENT (mA)
VS = 5V
175
Figure 45. Output Short-Circuit Current vs. Temperature
150
1k
VS = 5V
OUTPUT-TO-RAIL VOLTAGE (mV)
140
130
VS = 2.7V TO 5V
TA = –40°C TO +125°C
120
110
100
90
80
70
VCC – VOH @ 1kΩ
100
VOL – VEE @ 1kΩ
VCC – VOH @ 10kΩ
10
VOL – VEE @ 10kΩ
VCC – VOH @ 100kΩ
1
VOL – VEE @ 100kΩ
60
50
–50
–25
0
25
50
TEMPERATURE (°C)
75
100
125
02735-041
POWER SUPPLY REJECTION (dB)
–25
Figure 44. Output Short-Circuit Current vs. Temperature
120
VOLTAGE NOISE DENSITY (nV/√Hz)
50
–100
–50
Figure 41. Voltage Noise Density at 5 V from 0 Hz to 25 kHz
0
100
02735-044
0
VS = 2.7V
TA = –40°C TO +150°C
02735-042
105
OUTPUT SHORT-CIRCUIT CURRENT (mA)
VS = 5V
NOISE AT 10kHz = 36.4nV
02735-039
VOLTAGE NOISE DENSITY (nV/√Hz)
120
Figure 43. Power Supply Rejection vs. Temperature
0.1
–50
–25
0
25
50
75
100
TEMPERATURE (°C)
125
150
Figure 46. Output-to-Rail Voltage vs. Temperature
Rev. I | Page 12 of 24
AD8628/AD8629/AD8630
1k
140
VS = ±2.5V
120
CHANNEL SEPARATION (dB)
VCC – VOH @ 1kΩ
100
VOL – VEE @ 1kΩ
VCC – VOH @ 10kΩ
10
VOL – VEE @ 10kΩ
VCC – VOH @ 100kΩ
1
VOL – VEE @ 100kΩ
100
80
60
40
R1
10kΩ
+2.5V
VIN
28mV p-p
+
–
20
V+
A
V–
V–
VOUT
R2
100Ω
B
V+
–25
0
25
50
75
100
TEMPERATURE (°C)
125
150
175
Figure 47. Output-to-Rail Voltage vs. Temperature
0
1k
10k
100k
FREQUENCY (Hz)
1M
10M
Figure 48. AD8629/AD8630 Channel Separation vs. Frequency
Rev. I | Page 13 of 24
02735-062
–2.5V
0.1
–50
02735-045
OUTPUT-TO-RAIL VOLTAGE (mV)
VS = 2.7V
AD8628/AD8629/AD8630
FUNCTIONAL DESCRIPTION
The AD8628/AD8629/AD8630 are single-supply, ultrahigh
precision rail-to-rail input and output operational amplifiers.
The typical offset voltage of less than 1 μV allows these amplifiers
to be easily configured for high gains without risk of excessive
output voltage errors. The extremely small temperature drift
of 2 nV/°C ensures a minimum offset voltage error over their
entire temperature range of −40°C to +125°C, making these
amplifiers ideal for a variety of sensitive measurement applications in harsh operating environments.
1/f NOISE
The AD8628/AD8629/AD8630 achieve a high degree of precision
through a patented combination of auto-zeroing and chopping.
This unique topology allows the AD8628/AD8629/AD8630 to
maintain their low offset voltage over a wide temperature range
and over their operating lifetime. The AD8628/AD8629/AD8630
also optimize the noise and bandwidth over previous generations
of auto-zero amplifiers, offering the lowest voltage noise of any
auto-zero amplifier by more than 50%.
The internal elimination of 1/f noise is accomplished as follows.
1/f noise appears as a slowly varying offset to the AD8628/AD8629/
AD8630 inputs. Auto-zeroing corrects any dc or low frequency
offset. Therefore, the 1/f noise component is essentially removed,
leaving the AD8628/AD8629/AD8630 free of 1/f noise.
120
Rev. I | Page 14 of 24
COMPETITOR A
(89.7nV/√Hz)
105
90
75
60
COMPETITOR B
(31.1nV/√Hz)
45
30
15
0
AD8628
(19.4nV/√Hz)
0
2
MK AT 1kHz FOR ALL 3 GRAPHS
4
6
FREQUENCY (kHz)
8
10
Figure 49. Noise Spectral Density of AD8628 vs. Competition
12
02735-046
The AD8628 is among the few auto-zero amplifiers offered in
the 5-lead TSOT package. This provides a significant improvement
over the ac parameters of the previous auto-zero amplifiers. The
AD8628/AD8629/AD8630 have low noise over a relatively wide
bandwidth (0 Hz to 10 kHz) and can be used where the highest
dc precision is required. In systems with signal bandwidths of
from 5 kHz to 10 kHz, the AD8628/AD8629/AD8630 provide
true 16-bit accuracy, making them the best choice for very high
resolution systems.
One advantage that the AD8628/AD8629/AD8630 bring to
system applications over competitive auto-zero amplifiers is their
very low noise. The comparison shown in Figure 49 indicates
an input-referred noise density of 19.4 nV/√Hz at 1 kHz for
the AD8628, which is much better than the Competitor A
and Competitor B. The noise is flat from dc to 1.5 kHz, slowly
increasing up to 20 kHz. The lower noise at low frequency is
desirable where auto-zero amplifiers are widely used.
VOLTAGE NOISE DENSITY (nV/√Hz)
Previous designs used either auto-zeroing or chopping to add
precision to the specifications of an amplifier. Auto-zeroing
results in low noise energy at the auto-zeroing frequency, at the
expense of higher low frequency noise due to aliasing of wideband
noise into the auto-zeroed frequency band. Chopping results in
lower low frequency noise at the expense of larger noise energy
at the chopping frequency. The AD8628/AD8629/AD8630
family uses both auto-zeroing and chopping in a patented pingpong arrangement to obtain lower low frequency noise together
with lower energy at the chopping and auto-zeroing frequencies,
maximizing the signal-to-noise ratio for the majority of
applications without the need for additional filtering. The
relatively high clock frequency of 15 kHz simplifies filter
requirements for a wide, useful noise-free bandwidth.
1/f noise, also known as pink noise, is a major contributor to
errors in dc-coupled measurements. This 1/f noise error term
can be in the range of several μV or more, and, when amplified
with the closed-loop gain of the circuit, can show up as a large
output offset. For example, when an amplifier with a 5 μV p-p
1/f noise is configured for a gain of 1000, its output has 5 mV of
error due to the 1/f noise. However, the AD8628/AD8629/AD8630
eliminate 1/f noise internally, thereby greatly reducing output errors.
AD8628/AD8629/AD8630
50
PEAK-TO-PEAK NOISE
45
Because of the ping-pong action between auto-zeroing and
chopping, the peak-to-peak noise of the AD8628/AD8629/
AD8630 is much lower than the competition. Figure 50 and
Figure 51 show this comparison.
40
NOISE (dB)
35
en p-p = 0.5µV
BW = 0.1Hz TO 10Hz
30
25
20
VOLTAGE (0.5µV/DIV)
15
10
0
0
10
20
30
40
50
60
70
FREQUENCY (kHz)
80
90
100
02735-050
5
Figure 53. Simulation Transfer Function of the Test Circuit in Figure 52
50
02735-047
45
TIME (1s/DIV)
40
35
NOISE (dB)
Figure 50. AD8628 Peak-to-Peak Noise
en p-p = 2.3µV
BW = 0.1Hz TO 10Hz
30
25
20
15
VOLTAGE (0.5µV/DIV)
10
0
0
10
20
30
40
50
60
70
FREQUENCY (kHz)
80
90
100
02735-051
5
Figure 54. Actual Transfer Function of the Test Circuit in Figure 52
02735-048
The measured noise spectrum of the test circuit charted in
Figure 54 shows that noise between 5 kHz and 45 kHz is
successfully rolled off by the first-order filter.
TOTAL INTEGRATED INPUT-REFERRED NOISE FOR
FIRST-ORDER FILTER
Figure 51. Competitor A Peak-to-Peak Noise
NOISE BEHAVIOR WITH FIRST-ORDER, LOW-PASS
FILTER
The AD8628 was simulated as a low-pass filter (see Figure 53)
and then configured as shown in Figure 52. The behavior of the
AD8628 matches the simulated data. It was verified that noise is
rolled off by first-order filtering. Figure 53 and Figure 54 show
the difference between the simulated and actual transfer functions
of the circuit shown in Figure 52.
IN
OUT
COMPETITOR A
AD8551
AD8628
1
470pF
0.1
10
Figure 52. First-Order Low-Pass Filter Test Circuit,
×101 Gain and 3 kHz Corner Frequency
100
1k
3dB FILTER BANDWIDTH (Hz)
Figure 55. RMS Noise vs. 3 dB Filter Bandwidth in Hz
Rev. I | Page 15 of 24
10k
02735-052
1kΩ
10
02735-049
100kΩ
For a first-order filter, the total integrated noise from the
AD8628 is lower than the noise of Competitor A.
RMS NOISE (µV)
TIME (1s/DIV)
AD8628/AD8629/AD8630
INPUT OVERVOLTAGE PROTECTION
VOLTAGE (V)
These diodes are connected between the inputs and each supply
rail to protect the input transistors against an electrostatic discharge
event, and they are normally reverse-biased. However, if the input
voltage exceeds the supply voltage, these ESD diodes can become
forward-biased. Without current limiting, excessive amounts
of current could flow through these diodes, causing permanent
damage to the device. If inputs are subject to overvoltage,
appropriate series resistors should be inserted to limit the diode
current to less than 5 mA maximum.
0V
0V
VOUT
02735-053
Although the AD8628/AD8629/AD8630 are rail-to-rail input
amplifiers, care should be taken to ensure that the potential
difference between the inputs does not exceed the supply voltage.
Under normal negative feedback operating conditions, the
amplifier corrects its output to ensure that the two inputs are at
the same voltage. However, if either input exceeds either supply
rail by more than 0.3 V, large currents begin to flow through the
ESD protection diodes in the amplifier.
CH1 = 50mV/DIV
CH2 = 1V/DIV
AV = –50
VIN
TIME (500µs/DIV)
Figure 56. Positive Input Overload Recovery for the AD8628
CH1 = 50mV/DIV
CH2 = 1V/DIV
AV = –50
VIN
0V
02735-054
VOUT
The AD8628/AD8629/AD8630 amplifiers have been carefully
designed to prevent any output phase reversal, provided that
both inputs are maintained within the supply voltages. If one or
both inputs could exceed either supply voltage, a resistor should
be placed in series with the input to limit the current to less than
5 mA. This ensures that the output does not reverse its phase.
TIME (500µs/DIV)
Figure 57. Positive Input Overload Recovery for Competitor A
CH1 = 50mV/DIV
CH2 = 1V/DIV
AV = –50
VIN
VOLTAGE (V)
OVERLOAD RECOVERY TIME
Many auto-zero amplifiers are plagued by a long overload recovery
time, often in ms, due to the complicated settling behavior of
the internal nulling loops after saturation of the outputs. The
AD8628/AD8629/AD8630 have been designed so that internal
settling occurs within two clock cycles after output saturation
occurs. This results in a much shorter recovery time, less
than 10 μs, when compared to other auto-zero amplifiers. The
wide bandwidth of the AD8628/AD8629/AD8630 enhances
performance when the parts are used to drive loads that inject
transients into the outputs. This is a common situation when an
amplifier is used to drive the input of switched capacitor ADCs.
0V
Rev. I | Page 16 of 24
0V
0V
VOUT
TIME (500µs/DIV)
Figure 58. Positive Input Overload Recovery for Competitor B
02735-055
Output phase reversal occurs in some amplifiers when the input
common-mode voltage range is exceeded. As common-mode
voltage is moved outside the common-mode range, the outputs of
these amplifiers can suddenly jump in the opposite direction to
the supply rail. This is the result of the differential input pair
shutting down, causing a radical shifting of internal voltages
that results in the erratic output behavior.
VOLTAGE (V)
OUTPUT PHASE REVERSAL
AD8628/AD8629/AD8630
VOLTAGE (V)
0V
The results shown in Figure 56 to Figure 61 are summarized in
Table 5.
CH1 = 50mV/DIV
CH2 = 1V/DIV
AV = –50
Table 5. Overload Recovery Time
VIN
Model
AD8628
Competitor A
Competitor B
VOUT
Negative Overload
Recovery (μs)
9
25,000
35,000
INFRARED SENSORS
02735-056
0V
TIME (500µs/DIV)
Figure 59. Negative Input Overload Recovery for the AD8628
0V
CH1 = 50mV/DIV
CH2 = 1V/DIV
AV = –50
VIN
VOUT
0V
TIME (500µs/DIV)
Infrared (IR) sensors, particularly thermopiles, are increasingly
being used in temperature measurement for applications as wide
ranging as automotive climate control, human ear thermometers,
home insulation analysis, and automotive repair diagnostics.
The relatively small output signal of the sensor demands high
gain with very low offset voltage and drift to avoid dc errors.
If interstage ac coupling is used, as in Figure 62, low offset and
drift prevent the output of the input amplifier from drifting close to
saturation. The low input bias currents generate minimal errors
from the output impedance of the sensor. As with pressure sensors,
the very low amplifier drift with time and temperature eliminate
additional errors once the temperature measurement is calibrated.
The low 1/f noise improves SNR for dc measurements taken
over periods often exceeding one-fifth of a second.
02735-057
VOLTAGE (V)
Positive Overload
Recovery (μs)
6
650
40,000
Figure 62 shows a circuit that can amplify ac signals from 100 μV to
300 μV up to the 1 V to 3 V levels, with a gain of 10,000 for
accurate analog-to-digital conversion.
10kΩ
100Ω
Figure 60. Negative Input Overload Recovery for Competitor A
100kΩ
100kΩ
5V
5V
IR
DETECTOR
0V
1/2 AD8629
1/2 AD8629
10kΩ
fC ≈ 1.6Hz
TO BIAS
VOLTAGE
VIN
Figure 62. AD8629 Used as Preamplifier for Thermopile
VOUT
0V
TIME (500µs/DIV)
02735-058
VOLTAGE (V)
CH1 = 50mV/DIV
CH2 = 1V/DIV
AV = –50
10µF
Figure 61. Negative Input Overload Recovery for Competitor B
Rev. I | Page 17 of 24
02735-059
100µV TO 300µV
AD8628/AD8629/AD8630
PRECISION CURRENT SHUNT SENSOR
OUTPUT AMPLIFIER FOR HIGH PRECISION DACS
A precision current shunt sensor benefits from the unique
attributes of auto-zero amplifiers when used in a differencing
configuration, as shown in Figure 63. Current shunt sensors are
used in precision current sources for feedback control systems.
They are also used in a variety of other applications, including
battery fuel gauging, laser diode power measurement and control,
torque feedback controls in electric power steering, and precision
power metering.
The AD8628/AD8629/AD8360 are used as output amplifiers for
a 16-bit high precision DAC in a unipolar configuration. In this
case, the selected op amp needs to have a very low offset voltage
(the DAC LSB is 38 μV when operated with a 2.5 V reference)
to eliminate the need for output offset trims. The input bias
current (typically a few tens of picoamperes) must also be very
low because it generates an additional zero code error when
multiplied by the DAC output impedance (approximately 6 kΩ).
I
100kΩ
e = 1000 RS I
100mV/mA
RS
0.1Ω
Rail-to-rail input and output provide full-scale output with very
little error. The output impedance of the DAC is constant and
code independent, but the high input impedance of the AD8628/
AD8629/AD8630 minimizes gain errors. The wide bandwidth
of the amplifiers also serves well in this case. The amplifiers,
with settling time of 1 μs, add another time constant to the
system, increasing the settling time of the output. The settling
time of the AD5541 is 1 μs. The combined settling time is
approximately 1.4 μs, as can be derived from the following
equation:
RL
100Ω
C
5V
AD8628
100Ω
C
02735-060
100kΩ
t S (TOTAL ) =
Figure 63. Low-Side Current Sensing
In such applications, it is desirable to use a shunt with very low
resistance to minimize the series voltage drop; this minimizes
wasted power and allows the measurement of high currents
while saving power. A typical shunt might be 0.1 Ω. At measured
current values of 1 A, the output signal of the shunt is hundreds
of millivolts, or even volts, and amplifier error sources are not
critical. However, at low measured current values in the 1 mA
range, the 100 μV output voltage of the shunt demands a very
low offset voltage and drift to maintain absolute accuracy. Low
input bias currents are also needed, so that injected bias current
does not become a significant percentage of the measured current.
High open-loop gain, CMRR, and PSRR help to maintain the
overall circuit accuracy. As long as the rate of change of the
current is not too fast, an auto-zero amplifier can be used with
excellent results.
5V
(t S DAC )2 + (t S AD8628 )2
2.5V
0.1µF
0.1µF
SERIAL
INTERFACE
VDD
10µF
REF(REFF*) REFS*
CS
DIN
SCLK
AD8628
AD5541/AD5542
VOUT
UNIPOLAR
OUTPUT
LDAC*
DGND
AGND
*AD5542 ONLY
Rev. I | Page 18 of 24
Figure 64. AD8628 Used as an Output Amplifier
02735-061
SUPPLY
AD8628/AD8629/AD8630
OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)
5
4
1
2
8
4.00 (0.1574)
3.80 (0.1497)
2.80 BSC
1.60 BSC
3
0.95 BSC
0.25 (0.0098)
0.10 (0.0040)
*1.00 MAX
0.50
0.30
SEATING
PLANE
8°
4°
0°
0.60
0.45
0.30
*COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH
THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.
1
3.00
2.80
2.60
3.20
3.00
2.80
3
0.95 BSC
1.27 (0.0500)
0.40 (0.0157)
8
1
5
5.15
4.90
4.65
4
0.65 BSC
0.50 MAX
0.35 MIN
0.95
0.85
0.75
0.20 MAX
0.08 MIN
SEATING
PLANE
10°
5°
0°
0.20
BSC
COMPLIANT TO JEDEC STANDARDS MO-178-AA
0.55
0.45
0.35
15° MAX
1.10 MAX
0.15
0.05
COPLANARITY
0.10
0.40
0.25
6°
0°
0.23
0.09
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 66. 5-Lead Small Outline Transistor Package [SOT-23]
(RJ-5)
Dimensions shown in millimeters
Figure 68. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
Rev. I | Page 19 of 24
0.80
0.55
0.40
10-07-2009-B
1.45 MAX
0.95 MIN
121608-A
0.15 MAX
0.05 MIN
0.25 (0.0098)
0.17 (0.0067)
PIN 1
IDENTIFIER
1.90
BSC
1.30
1.15
0.90
45°
8°
0°
3.20
3.00
2.80
4
2
0.50 (0.0196)
0.25 (0.0099)
Figure 67. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
3.00
2.90
2.80
5
1.75 (0.0688)
1.35 (0.0532)
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 65. 5-Lead Thin Small Outline Transistor Package [TSOT]
(UJ-5)
Dimensions shown in millimeters
1.70
1.60
1.50
6.20 (0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
SEATING
PLANE
0.20
0.08
100708-A
0.10 MAX
4
1.27 (0.0500)
BSC
1.90
BSC
*0.90 MAX
0.70 MIN
5
1
012407-A
2.90 BSC
AD8628/AD8629/AD8630
5.10
5.00
4.90
8.75 (0.3445)
8.55 (0.3366)
1
7
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0039)
COPLANARITY
0.10
0.51 (0.0201)
0.31 (0.0122)
14
6.20 (0.2441)
5.80 (0.2283)
8
4.50
4.40
4.30
6.40
BSC
1
1.75 (0.0689)
1.35 (0.0531)
SEATING
PLANE
0.50 (0.0197)
0.25 (0.0098)
PIN 1
8°
0°
0.25 (0.0098)
0.17 (0.0067)
7
45°
0.65 BSC
1.27 (0.0500)
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012-AB
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
1.05
1.00
0.80
1.20
MAX
0.15
0.05
COPLANARITY
0.10
0.30
0.19
SEATING
PLANE
0.20
0.09
8°
0°
COMPLIANT TO JEDEC STANDARDS MO-153-AB-1
Figure 69. 14-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-14)
Dimensions shown in millimeters and (inches)
Figure 70. 14-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-14)
Dimensions shown in millimeters
Rev. I | Page 20 of 24
0.75
0.60
0.45
061908-A
8
14
060606-A
4.00 (0.1575)
3.80 (0.1496)
AD8628/AD8629/AD8630
ORDERING GUIDE
Model 1, 2
AD8628AUJ-REEL
AD8628AUJ-REEL7
AD8628AUJZ-R2
AD8628AUJZ-REEL
AD8628AUJZ-REEL7
AD8628ARZ
AD8628ARZ-REEL
AD8628ARZ-REEL7
AD8628ARTZ-R2
AD8628ARTZ-REEL7
AD8628WARZ-RL
AD8628WARZ-R7
AD8628WARTZ-RL
AD8628WARTZ-R7
AD8628WAUJZ-RL
AD8628WAUJZ-R7
AD8629ARZ
AD8629ARZ-REEL
AD8629ARZ-REEL7
AD8629ARMZ
AD8629ARMZ-REEL
AD8629WARZ-RL
AD8629WARZ-R7
AD8630ARUZ
AD8630ARUZ-REEL
AD8630ARZ
AD8630ARZ-REEL
AD8630ARZ-REEL7
AD8630WARZ-RL
AD8630WARZ-R7
1
2
Temperature Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
Package Description
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
5-Lead TSOT
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
5-Lead SOT-23
5-Lead SOT-23
8-Lead SOIC_N
8-Lead SOIC_N
5-Lead SOT-23
5-Lead SOT-23
5-Lead TSOT
5-Lead TSOT
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead MSOP
8-Lead MSOP
8-Lead SOIC_N
8-Lead SOIC_N
14-Lead TSSOP
14-Lead TSSOP
14-Lead SOIC_N
14-Lead SOIC_N
14-Lead SOIC_N
14-Lead SOIC_N
14-Lead SOIC_N
Package Option
UJ-5
UJ-5
UJ-5
UJ-5
UJ-5
R-8
R-8
R-8
RJ-5
RJ-5
R-8
R-8
RJ-5
RJ-5
UJ-5
UJ-5
R-8
R-8
R-8
RM-8
RM-8
R-8
R-8
RU-14
RU-14
R-14
R-14
R-14
R-14
R-14
Branding
AYB
AYB
A0L
A0L
A0L
A0L
A0L
A0L
A0L
A0L
A0L
A0L
A0L
A06
A06
Z = RoHS Compliant Part.
W = Qualified for Automotive Applications.
AUTOMOTIVE PRODUCTS
The AD8628W/AD8629W/AD8630W models are available with controlled manufacturing to support the quality and reliability
requirements of automotive applications. Note that these automotive models may have specifications that differ from the commercial
models; therefore, designers should review the Specifications section of this data sheet carefully. Only the automotive grade products
shown are available for use in automotive applications. Contact your local Analog Devices account representative for specific product
ordering information and to obtain the specific Automotive Reliability reports for these models.
Rev. I | Page 21 of 24
AD8628/AD8629/AD8630
NOTES
Rev. I | Page 22 of 24
AD8628/AD8629/AD8630
NOTES
Rev. I | Page 23 of 24
AD8628/AD8629/AD8630
NOTES
©2002–2011 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D02735-0-4/11(I)
Rev. I | Page 24 of 24