FDMC7208S Dual N-Channel PowerTrench® MOSFET Q1: 30 V, 12 A, 9.0 mΩ Q2: 30 V, 16 A, 6.4 mΩ Features General Description Q1: N-Channel This device includes two 30V N-Channel MOSFETs in a dual Power 33 (3 mm X 3 mm MLP) package. The package is enhanced for exceptional thermal performance. Max rDS(on) = 9.0 mΩ at VGS = 10 V, ID = 12 A Max rDS(on) = 11.0 mΩ at VGS = 4.5 V, ID = 11 A Applications Q2: N-Channel Max rDS(on) = 6.4 mΩ at VGS = 10 V, ID = 16 A Computing Max rDS(on) = 7.5 mΩ at VGS = 4.5 V, ID = 13.5 A Communications General Purpose Point of Load Termination is Lead-free and RoHS Compliant Notebook System Pin 1 G1 S1 S1 S1 D1 D2 G2 S2 S2 S2 Power 33 MOSFET Maximum Ratings TA = 25 °C unless otherwise noted Symbol VDS Drain to Source Voltage Parameter VGS Gate to Source Voltage Drain Current ID TJ, TSTG Units V V (Note 4) ±20 ±12 TC = 25 °C 22 26 -Continuous TA = 25 °C 121a 161b 60 80 Single Pulse Avalanche Energy PD Q2 30 -Continuous (Package limited) -Pulsed EAS Q1 30 (Note 3) 21 21 Power Dissipation for Single Operation TA = 25 °C 1.91a 1.91b Power Dissipation for Single Operation TA = 25 °C 0.81c 0.81d Operating and Storage Junction Temperature Range A mJ -55 to +150 W °C Thermal Characteristics RθJA Thermal Resistance, Junction to Ambient 651a 651b RθJA Thermal Resistance, Junction to Ambient 1551c 1551d °C/W Package Marking and Ordering Information Device Marking FDMC7208S Device FDMC7208S ©2012 Fairchild Semiconductor Corporation FDMC7208S Rev.C2 Package Power 33 1 Reel Size 13 ” Tape Width 12 mm Quantity 3000 units www.fairchildsemi.com FDMC7208S Dual N-Channel PowerTrench® MOSFET August 2012 Symbol Parameter Test Conditions Type Min 30 30 Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V ID = 1 mA, VGS = 0 V Q1 Q2 ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C ID = 10 mA, referenced to 25 °C Q1 Q2 IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V Q1 Q2 1 500 μA IGSS Gate to Source Leakage Current, Forward VGS = 20 V, VDS= 0 V VGS = 12 V, VDS= 0 V Q1 Q2 100 100 nA 3.0 3.0 V V 27 21 mV/°C On Characteristics VGS(th) Gate to Source Threshold Voltage ID = 250 μA, VGS = 0 V ID = 1 mA, VGS = 0 V Q1 Q2 ΔVGS(th) ΔTJ Gate to Source Threshold Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C ID = 10 mA, referenced to 25 °C Q1 Q2 -5 -3 VGS = 10 V, ID = 12 A VGS = 4.5 V, ID = 11 A VGS = 10 V, ID = 12 A, TJ = 125 °C Q1 6.7 8.8 9.2 9.0 11.0 12.4 VGS = 10 V, ID = 16 A VGS = 4.5 V, ID = 13.5 A VGS = 10 V, ID = 16 A , TJ = 125 °C Q2 4.7 5.3 6.4 6.4 7.5 6.8 VDS = 5 V, ID = 12 A VDS = 5 V, ID = 16 A Q1 Q2 53 80 Q1: VDS = 15 V, VGS = 0 V, f = 1 MHZ Q1 Q2 848 1685 1130 2245 pF Q1 Q2 270 432 360 575 pF Q1 Q2 36 42 55 65 pF 1.1 1.0 2.5 2.5 Ω rDS(on) gFS Drain to Source On Resistance Forward Transconductance 1.2 1.2 1.7 1.6 mV/°C mΩ S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate Resistance Q2: VDS = 15 V, VGS = 0 V, f = 1 MHZ Q1 Q2 0.1 0.1 Switching Characteristics td(on) Turn-On Delay Time tr Rise Time td(off) Turn-Off Delay Time tf Fall Time Qg Total Gate Charge Qg Total Gate Charge Qgs Gate to Source Gate Charge Qgd Gate to Drain “Miller” Charge ©2012 Fairchild Semiconductor Corporation FDMC7208S Rev.C2 Q1: VDD = 15 V, ID = 12 A, RGEN = 6 Ω Q2: VDD = 15 V, ID = 16 A, RGEN = 6 Ω VGS = 0 V to 10 V Q1 VDD = 15 V, VGS = 0 V to 5 V ID = 12 A Q2 VDD = 15 V, ID = 16 A 2 Q1 Q2 6 7 12 14 ns Q1 Q2 2 3 10 10 ns Q1 Q2 16 23 29 36 ns Q1 Q2 2 2 10 10 ns Q1 Q2 13 26 18 36 nC Q1 Q2 6.7 14 9.4 20 nC Q1 Q2 2.3 3.9 nC Q1 Q2 1.8 2.7 nC www.fairchildsemi.com FDMC7208S Dual N-Channel PowerTrench® MOSFET Electrical Characteristics TJ = 25 °C unless otherwise noted Symbol Parameter Test Conditions Type Min Typ Max Units Q1 Q1 Q2 Q2 0.72 0.82 0.70 0.82 1.2 1.2 1.2 1.2 V Q1 Q2 21 21 34 33 ns Q1 Q2 6 16 12 28 nC Drain-Source Diode Characteristics VSD VGS = 0 V, IS = 2 A V = 0 V, IS = 12 A Source to Drain Diode Forward Voltage GS VGS = 0 V, IS = 2 A VGS = 0 V, IS = 16 A trr Reverse Recovery Time Qrr Reverse Recovery Charge (Note 2) (Note 2) (Note 2) (Note 2) Q1 IF = 12 A, di/dt = 100 A/μs Q2 IF = 16 A, di/dt = 300 A/μs Notes: 1.RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. b. 65 °C/W when mounted on a 1 in2 pad of 2 oz copper a. 65 °C/W when mounted on a 1 in2 pad of 2 oz copper SS SF DS DF G SS SF DS DF G d. 155 °C/W when mounted on a minimum pad of 2 oz copper c. 155 °C/W when mounted on a minimum pad of 2 oz copper SS SF DS DF G SS SF DS DF G 2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%. 3. Q1: EAS of 21 mJ is based on starting TJ = 25 oC, L = 0.3 mH, IAS = 12 A, VDD = 27 V, VGS = 10 V. 100% tested at L = 3 mH, IAS = 5.2 A. Q1: EAS of 21 mJ is based on starting TJ = 25 oC, L = 0.3 mH, IAS = 12 A, VDD = 27 V, VGS = 10 V. 100% tested at L = 3 mH, IAS = 5.4 A. 4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied ©2012 Fairchild Semiconductor Corporation FDMC7208S Rev.C2 3 www.fairchildsemi.com FDMC7208S Dual N-Channel PowerTrench® MOSFET Electrical Characteristics TJ = 25 °C unless otherwise noted 60 5 VGS = 4.5 V 50 ID, DRAIN CURRENT (A) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE VGS = 10 V VGS = 3.5 V 40 VGS = 4 V 30 VGS = 3 V 20 10 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0 0 1 2 3 4 4 VGS = 3.5 V 3 VGS = 4 V 2 1 0 5 0 10 20 30 40 50 60 ID, DRAIN CURRENT (A) Figure 1. On Region Characteristics Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 40 ID = 12 A VGS = 10 V rDS(on), DRAIN TO 1.4 1.2 1.0 0.8 0.6 -75 SOURCE ON-RESISTANCE (mΩ) 1.6 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE VGS = 10 V VGS = 4.5 V VDS, DRAIN TO SOURCE VOLTAGE (V) ID = 12 A PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 30 20 TJ = 125 oC 10 TJ = 25 oC 0 -50 2 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) 3 4 5 6 7 8 9 10 VGS, GATE TO SOURCE VOLTAGE (V) Figure 4. On-Resistance vs Gate to Source Voltage Figure 3. Normalized On Resistance vs Junction Temperature 60 IS, REVERSE DRAIN CURRENT (A) 100 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 50 ID, DRAIN CURRENT (A) PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX VGS = 3 V VDS = 5 V 40 TJ = 150 oC 30 TJ = 25 oC 20 TJ = -55 oC 10 0 1.0 1.5 2.0 2.5 3.0 3.5 10 TJ = 150 oC 1 TJ = 25 oC 0.1 TJ = -55 oC 0.01 0.001 0.0 4.0 VGS, GATE TO SOURCE VOLTAGE (V) 0.2 0.4 0.6 0.8 1.0 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics ©2012 Fairchild Semiconductor Corporation FDMC7208S Rev.C2 VGS = 0 V Figure 6. Source to Drain Diode Forward Voltage vs Source Current 4 www.fairchildsemi.com FDMC7208S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted VGS, GATE TO SOURCE VOLTAGE (V) 10 2000 ID = 12 A 8 CAPACITANCE (pF) VDD = 15 V 6 VDD = 10 V 4 VDD = 20 V Coss 100 Crss f = 1 MHz VGS = 0 V 2 0 0 5 10 10 0.1 15 1 10 30 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain to Source Voltage 40 100 ID, DRAIN CURRENT (A) IAS, AVALANCHE CURRENT (A) Ciss 1000 10 TJ = 25 oC TJ = 100 oC TJ = 125 oC 10 1 0.1 TA = 25 oC 0.1 1 10 0.01 0.01 100 tAV, TIME IN AVALANCHE (ms) 10 ms SINGLE PULSE TJ = MAX RATED RθJA = 155 oC/W 1 0.01 1 ms THIS AREA IS LIMITED BY rDS(on) 0.1 100 ms 1s 10 s DERIVED FROM TEST DATA 1 DC 10 100 VDS, DRAIN to SOURCE VOLTAGE (V) Figure 9. Unclamped Inductive Switching Capability Figure 10. Forward Bias Safe Operating Area 100 P(PK), PEAK TRANSIENT POWER (W) SINGLE PULSE o RθJA = 155 C/W o TA = 25 C 10 1 0.5 -3 10 -2 10 -1 0 10 10 1 10 100 1000 t, PULSE WIDTH (sec) Figure 11. Single Pulse Maximum Power Dissipation ©2012 Fairchild Semiconductor Corporation FDMC7208S Rev.C2 5 www.fairchildsemi.com FDMC7208S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted 2 DUTY CYCLE-DESCENDING ORDER NORMALIZED THERMAL IMPEDANCE, ZθJA 1 0.1 D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 SINGLE PULSE NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJC x RθJc + TC o RθJA = 155 C/W (Note 1b) 0.01 0.005 -3 10 -2 10 -1 0 10 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 12. Junction-to-Ambient Transient Thermal Response Curve ©2012 Fairchild Semiconductor Corporation FDMC7208S Rev.C2 6 www.fairchildsemi.com FDMC7208S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted 80 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 5 ID, DRAIN CURRENT (A) VGS = 10 V VGS = 4.5 V 60 VGS = 4 V VGS = 3.5 V VGS = 3 V 40 20 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0 0.0 0.5 1.0 1.5 2.0 2.5 VGS = 3 V 4 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 3 VGS = 3.5 V 2 1 0 3.0 0 20 VDS, DRAIN TO SOURCE VOLTAGE (V) 60 80 Figure 15. Normalized on-Resistance vs Drain Current and Gate Voltage 30 ID = 16 A VGS = 10 V 1.4 rDS(on), DRAIN TO 1.3 1.2 1.1 1.0 0.9 0.8 0.7 -75 SOURCE ON-RESISTANCE (mΩ) 1.5 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 40 ID, DRAIN CURRENT (A) Figure 14. On- Region Characteristics PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 24 ID = 16 A 18 12 TJ = 125 oC 6 TJ = 25 oC 0 -50 -25 0 25 50 75 2 100 125 150 4 TJ, JUNCTION TEMPERATURE (oC) 6 8 10 VGS, GATE TO SOURCE VOLTAGE (V) Figure 17. On-Resistance vs Gate to Source Voltage Figure 16. Normalized On-Resistance vs Junction Temperature 100 IS, REVERSE DRAIN CURRENT (A) 80 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 64 ID, DRAIN CURRENT (A) VGS = 10 V VGS = 4.5 V VGS = 4 V VDS = 5 V 48 TJ = 125 oC 32 TJ = 25 oC 16 TJ = -55 oC 0 1 2 3 10 TJ = 125 oC 1 TJ = 25 oC 0.1 TJ = -55 oC 0.01 0.001 0.0 4 VGS, GATE TO SOURCE VOLTAGE (V) 0.2 0.4 0.6 0.8 1.0 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 18. Transfer Characteristics ©2012 Fairchild Semiconductor Corporation FDMC7208S Rev.C2 VGS = 0 V Figure 19. Source to Drain Diode Forward Voltage vs Source Current 7 www.fairchildsemi.com FDMC7208S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q2 N-Channel) TJ = 25 °C unless otherwise noted 3000 VGS, GATE TO SOURCE VOLTAGE (V) 10 ID = 16 A Ciss 1000 CAPACITANCE (pF) 8 VDD = 15 V 6 VDD = 10 V 4 VDD = 20 V Coss 100 2 10 0.1 0 0 6 12 18 24 30 1 10 30 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) Figure 21. Capacitance vs Drain to Source Voltage Figure 20. Gate Charge Characteristics 40 100 10 ID, DRAIN CURRENT (A) IAS, AVALANCHE CURRENT (A) Crss f = 1 MHz VGS = 0 V TJ = 25 oC TJ = 100 oC TJ = 125 oC 10 1 ms 1 0.1 THIS AREA IS LIMITED BY rDS(on) TA = 25 oC 0.01 0.1 1 10 0.01 0.01 100 tAV, TIME IN AVALANCHE (ms) 100 ms SINGLE PULSE TJ = MAX RATED RθJA = 155 oC/W 1 0.001 10 ms 0.1 1s DERIVED FROM TEST DATA 1 10 s DC 10 100 VDS, DRAIN to SOURCE VOLTAGE (V) Figure 23. Forward Bias Safe Operating Area Figure 22. Unclamped Inductive Switching Capability 100 P(PK), PEAK TRANSIENT POWER (W) SINGLE PULSE o RθJA = 155 C/W o TA = 25 C 10 1 0.5 -3 10 -2 10 -1 0 10 10 1 10 100 1000 t, PULSE WIDTH (sec) Figure 24. Single Pulse Maximum Power Dissipation ©2012 Fairchild Semiconductor Corporation FDMC7208S Rev.C2 8 www.fairchildsemi.com FDMC7208S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q2 N-Channel) TJ = 25°C unless otherwise noted 2 DUTY CYCLE-DESCENDING ORDER NORMALIZED THERMAL IMPEDANCE, ZθJA 1 0.1 D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 SINGLE PULSE NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJC x RθJC + TC o RθJA = 155 C/W (Note 1b) 0.01 0.005 -3 10 -2 10 -1 0 10 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 26. Junction-to-Ambient Transient Thermal Response Curve ©2012 Fairchild Semiconductor Corporation FDMC7208S Rev.C2 9 www.fairchildsemi.com FDMC7208S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q2 N-Channel) TJ = 25 °C unless otherwise noted SyncFETTM Schottky body diode Characteristics Fairchild’s SyncFETTM process embeds a Schottky diode in parallel with PowerTrench MOSFET. This diode exhibits similar characteristics to a discrete external Schottky diode in parallel with a MOSFET. Figure 27 shows the reverses recovery characteristic of the FDMC7208S. Schottky barrier diodes exhibit significant leakage at high temperature and high reverse voltage. This will increase the power in the device. -2 IDSS, REVERSE LEAKAGE CURRENT (A) 20 CURRENT (A) 15 10 5 0 -5 0 40 80 120 160 200 TJ = 125 oC -3 10 TJ = 100 oC -4 10 -5 10 TJ = 25 oC -6 10 -7 10 0 5 10 15 20 25 30 VDS, REVERSE VOLTAGE (V) TIME (ns) Figure 28. SyncFETTM body diode reverses leakage versus drain-source voltage Figure 27. FDMC7208S SyncFETTM body diode reverse recovery characteristic ©2012 Fairchild Semiconductor Corporation FDMC7208S Rev.C2 10 10 www.fairchildsemi.com FDMC7208S Dual N-Channel PowerTrench® MOSFET Typical Characteristics (continued) FDMC7208S Dual N-Channel PowerTrench® MOSFET Dimensional Outline and Pad Layout ©2012 Fairchild Semiconductor Corporation FDMC7208S Rev.C2 11 www.fairchildsemi.com tm tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 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Preliminary First Production Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I61 ©2012 Fairchild Semiconductor Corporation FDMC7208S Rev.C2 12 www.fairchildsemi.com FDMC7208S Dual N-Channel PowerTrench® MOSFET TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. 2Cool™ PowerTrench® F-PFS™ The Power Franchise® ® AccuPower™ PowerXS™ FRFET® Global Power ResourceSM AX-CAP™* Programmable Active Droop™ ® ® Green Bridge™ BitSiC QFET TinyBoost™ Build it Now™ QS™ Green FPS™ TinyBuck™ CorePLUS™ Quiet Series™ Green FPS™ e-Series™ TinyCalc™ CorePOWER™ RapidConfigure™ Gmax™ TinyLogic® GTO™ CROSSVOLT™ ™ TINYOPTO™ IntelliMAX™ CTL™ TinyPower™ Saving our world, 1mW/W/kW at a time™ ISOPLANAR™ Current Transfer Logic™ TinyPWM™ Marking Small Speakers Sound Louder SignalWise™ DEUXPEED® TinyWire™ Dual Cool™ SmartMax™ and Better™ TranSiC® EcoSPARK® SMART START™ MegaBuck™ TriFault Detect™ EfficentMax™ Solutions for Your Success™ MICROCOUPLER™ TRUECURRENT®* ESBC™ SPM® MicroFET™ μSerDes™ STEALTH™ MicroPak™ ® SuperFET® MicroPak2™ ® SuperSOT™-3 MillerDrive™ Fairchild UHC® SuperSOT™-6 MotionMax™ Fairchild Semiconductor® Ultra FRFET™ SuperSOT™-8 Motion-SPM™ FACT Quiet Series™ UniFET™ SupreMOS® mWSaver™ FACT® VCX™ SyncFET™ OptoHiT™ FAST® ® VisualMax™ Sync-Lock™ OPTOLOGIC FastvCore™ ® VoltagePlus™ OPTOPLANAR ®* FETBench™ XS™ FlashWriter® * ® FPS™