HDMI Switch ICs No.10063EET01 BU16006KV, BU16018KV, BU16024KV, BU16027KV ●Description These devices control are simple. It requires only 3.3V source and a few GPIO controls. Termination resistors (50Ω) are integrated at all TMDS input port. When channel is not selected, TMDS input termination resistors are turned off and TMDS inputs are high impedance. These devices are also integrated equalizer circuit to adapt long cable and DDC active buffer function to isolate capacitance. ●Features 1) Supports 2.25 Gbps signaling rate for 480i/p, 720p, and 1080i/p resolution to 12-bit color depth 2) Compatible with HDMI 1.3a 3) 5V tolerance to all DDC and HPD_SINK inputs 4) Integrated active DDC buffer 5) Integrated switchable 50Ω termination resistors 6) Integrated equalizer circuit to adapt long cable 7) HBM ESD protection exceeds 10kV 8) 3.3V fixed supply 9) RoHS compatible ●Applications Digital TV, Audio Video Receiver, Digital Projector, DVI or HDMI Switch Box ●Line up matrix Part No. Power Supply (V) ESD (KV) Input and Output Data rate (Gbps) Hot Plug Control BU16018KV 3 to 3.6 10 3 input 1 output 2.25 BU16027KV 3 to 3.6 10 3 input 1 output 2.25 BU16006KV 3 to 3.6 10 2 input 1 output BU16024KV 3 to 3.6 10 1 input 1 output Termination Resistor switch Control Switching Method DDC Buffer type Equalizer High speed mode Package RoHS Yes Sync HPD GPIO Active Fixed Yes VQFP80 Yes Yes Sync S1/S2 GPIO Active Fixed VQFP64 Yes 2.25 Yes Sync HPD GPIO Active Fixed 2.25 Yes Sync HPD - Active Fixed Yes (Always ON) Yes (Always ON) Yes VQFP64 Yes VQFP48C Yes ●Other Line up HDMI Switch adapted “Repeater” and “Source” Equipment Part No. Power Supply (V) ESD (KV) Input and Output Data rate (Gbps) Hot Plug Control Termination Resistor switch Control Switching Method DDC Buffer type Equalizer High speed mode Package RoHS BU16025MUV 3 to 3.6 10 1 input 1 output 2.70 Yes Sync OE - Active Selectable Yes VQFN48AV7070 Yes www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 1/19 2010.05 - Rev.E Technical Note BU16006KV, BU16018KV, BU16024KV, BU16027KV ●Absolute Maximum Rating Over operating free-air temperature range (unless otherwise noted) Item Limits BU16006KV BU16018KV BU16024KV Power supply voltage(Vcc) -0.3～+4.5 -0.3～+4.5 -0.3～+4.5 DDC, HPD_SINK input voltage -0.3～+5.6 -0.3～+5.6 -0.3～+5.6 Differential input voltage +2.5～+4.0 +2.5～+4.0 +2.5～+4.0 Control pin input voltage -0.3～+4.0 -0.3～+4.0 -0.3～+4.0 Power dissipation 1000(*1) 1200(*2) 950(*3) Strage temperture range -55～+125 -55～+125 -55～+125 BU16027KV -0.3～+4.5 -0.3～+5.6 +2.5～+4.0 -0.3～+4.0 1000(*1) -55～+125 Unit V V V V mW ℃ (*1-3) 70mm×70mm×1.6mm glass epoxy board mount.（Reverse Cu occupation rate：15mm×15mm） (*1) When it’s used by than Ta=25℃, it’s reduced by 10.0mW/℃. (*2) When it’s used by than Ta=25℃, it’s reduced by 12.5mW/℃. (*3) When it’s used by than Ta=25℃, it’s reduced by 9.5mW/℃. ●Recommended Operating Conditions Symbol Parameter VCC Supply voltage TA Free-air temperature TMDS Differential Pins VIC Input common mode voltage, see Figure 2. VID(pp) Receiver peak-to-peak differential input voltage, see Figure 2. RVSADJ Resistor for TMDS compliant voltage swing range AVCC TMDS Output termination voltage, see Figure 1. RT Termination resistance, see Figure 1. Signaling rate Control Pins VIH LVTTL High-level input voltage VIL LVTTL Low-level input voltage HPD_SINK VIH High-level input voltage VIL Low-level input voltage RX (SDA[n],SCL[n]) VIH High-level input voltage VIL Low-level input voltage TX (SCL_SINK, SDA_SINK) VIH High-level input voltage VIL Low-level input voltage www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 2/19 Min. 3 0 Typ. 3.3 - Max. 3.6 70 Unit V ℃ VCC–0.6 150 4.60 3 45 - 4.64 3.3 50 - VCC+0.01 1560 4.68 3.6 55 2.25 V mVp-p kΩ V Ω Gbps 2 GND - VCC 0.8 V V 2.4 GND - 5.5 0.8 V V 2.4 GND - 5.5 0.8 V V 1.5 GND - 5.5 0.35 V V 2010.05 - Rev.E Technical Note BU16006KV, BU16018KV, BU16024KV, BU16027KV ●Electrical Specifications Over recommended operating conditions (unless otherwise noted) Symbol Icc Parameter Supply current BU16006KV, BU16018KV BU16027KV BU16024KV PD Power Consumption BU16006KV, BU16018KV BU16027KV BU16024KV Test Condition VID = 400mV, RVSADJ = 4.64kΩ RT = 50Ω, AVcc = Vcc, Am/Bm = 2.25 Gbps HDMI data pattern, A1,/B1 = 225 MHz clock See Figure 2 VID = 400mV, RVSADJ = 4.64kΩ RT = 50Ω, AVcc = Vcc, Am/Bm = 2.25 Gbps HDMI data pattern, A1,/B1 = 225 MHz clock See Figure 2 Min. Limit Typ.(1) Max. - 120 150 mA - 140 170 mA - 450 600 mW - 480 700 mW Unit TMDS Differential Pins (A/B;Y/Z) BU16006KV, BU16027KV VOH VOL VSWING Vod(O) Vod(U) RINT Single-ended high-level output voltage BU16018KV, BU16024KV BU16018KV, BU16024KV Single-ended low-level output voltage BU16006KV, BU16027KV Single-ended BU16018KV, low-level BU16024KV swing voltage BU16018KV, BU16024KV Overshoot of output differential voltage Undershoot of output differential voltage Input termination resistance www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. AVcc = Vcc, RT = 50Ω AVcc = Vcc, PRE = Vcc, RT = 50Ω AVcc = Vcc, PRE = 0.0V, RT = 50Ω AVcc = Vcc, RT = 50Ω AVcc = Vcc, RT = 50Ω, Figure 2, AVcc = Vcc, PRE = Vcc, 50Ω, See Figure 2, AVcc = Vcc, PRE = 0.0V, 50Ω, See Figure 2, See Figure 2 See Figure 2 AVcc = Vcc = 3.3V, VA = Vcc-400mV, See Figure 2 3/19 See RT = RT = VB = AVcc200 AVcc200 AVcc10 AVcc600 - Avcc50 AVcc - 50 AVcc +10 Avcc400 mV mV mV mV 300 - 460 mV 300 - 460 mV 400 - 600 mV - 6% 12% 15% 25% 2xVswing 2xVswing 45 50 55 Ω 2010.05 - Rev.E Technical Note BU16006KV, BU16018KV, BU16024KV, BU16027KV Symbol Min. Limits Typ.(1) Max. VI=5.5V VI=Vcc VO=3.6V VI=GND -10 -10 -10 -10 - 10 10 10 10 μA μA μA μA BU16006KV BU16018KV BU16027KV RL=4.7kΩ 0.43 0.5 0.57 V BU16024KV RL=4.7kΩ 0.43 0.58 0.73 - 0.57 0.72 0.87 V 20 100 190 mV - 100 250 400 - mV Parameter Test Conditions Unit DDC Input and output Tx IlKT1 IlKT2 IOHT IILT VOLT Input leak current Input leak current High-level output current Low-level input current Low-level output voltage SELREF = NC SELREF = GND SELREF =Vcc VOLT-VIL Low-level input voltage below output low-level voltage BU16006KV BU16018KV BU16027KV RL=4.7kΩ BU16024KV RL=4.7kΩ SELREF = NC SELREF= GND SELREF = Vcc Rx IlKR1 IlKR2 IOHR Input leak current Input leak current High-level output current VI=5.5V VI=Vcc VO=3.6V -10 -10 -10 - 10 10 10 μA μA μA IILR Low-level input current VIL=GND -10 - 10 μA Iout = 4mA - - 0.2 V IOH = -8mA IOL = 8mA 2.4 0 - Vcc 0.4 V V VIH = Vcc VIL = GND -10 -10 - 10 10 μA μA VIH = Vcc VIL = GND -45 -45 - 45 45 μA μA VIH = 5.5V VIH = Vcc VIL = GND 10 5 -10 50 30 - 100 80 10 μA μA μA VOLR Low-level output voltage HPD 1, HPD 2, HPD 3 VOH(TTL) High level output voltage VOL(TTL) Low level output voltage CONTROL PINS IIH High level input current IIL Low level input current CONTROL PINS (I2CEN, SELREF,) IIH IIL High level input current Low level input current HPD_SINK IIH High level input current IIL Low –level input current www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 4/19 2010.05 - Rev.E Technical Note BU16006KV, BU16018KV, BU16024KV, BU16027KV Symbol Parameter Test Condition Min. Limits Typ.(1) Max. Unit - 480 - - 320 - - 500 - - 335 - - 160 - - 120 - - 160 - - 120 - - 20 - - 15 - - 35 - - 25 - - 650 - ns - 200 - ns - 500 - ns - 350 - ns - 800 150 950 50 8 5 7 800 15 - ns ns ns ns ns ns ns ns pF - 5 - ns - 5 - ns - 8 - ns TMDS Differential Pins (Y/Z) tPLH tPHL tr tf tsk(p) tsk(D) Propagation delay time low to high level output Propagation delay time low to high level output Differential output signal rise time (20%-80%) Differential output signal fall time (20%-80%) Pulse skew (|tPHL - tPLH |) Intra-pair differential skew, see Figure 3. BU16006KV, BU16018KV, BU16027KV BU16024KV BU16006KV, BU16018KV, BU16027KV BU16024KV BU16006KV, BU16027KV, BU16018KV BU16024KV BU16006KV, BU16018KV, BU16027KV BU16024KV BU16006KV, BU16018KV, BU16027KV BU16024KV AVCC = 3.3V, RT = 50Ω BU16006KV, BU16018KV, BU16027KV BU16024KV DDC I/O Pins (SCL, SCL_SINK, SDA, SDA_SINK) See Figure 4 tpdLHTR(DDC) Propagation delay time, low to high level output Tx to Rx RL = 4.7kΩ, CL = 100pF, see Figure 5 Propagation delay time, high to low level output Tx to Rx Propagation delay time, low to high level tpdLHRT(DDC) output Rx to Tx RL = 1.67kΩ, CL = 400pF, Propagation delay time, high to low level see Figure 5 tpdHLRT(DDC) output Rx to Tx tr Tx(DDC) Tx output Rise time RL = 4.7kΩ, CL = 100pF, see Figure 5 tf Tx(DDC) Tx output Fall time tr Rx(DDC) Rx output Rise time RL = 1.67kΩ CL = 400pF tf Rx(DDC) Rx output Fall time tsx Select to switch output see Figure 4 tdis Disable time see Figure 4 ten Enable time see Figure 4 tsx(DDC) Switch time from SCLn to SCL_SINK CL=10pF CIO Input/output capacitance VI=0V Hot Plug Detect Pins Propagation delay time, low to high level tpdLH(HPD) CL=10pF output from HPD_SINK to HPDn(n=1,2,3) Propagation delay time, high to low level tpdHL(HPD) CL=10pF output from HPD_SINK to HPDn(n=1,2,3) Switch time from port select to the latest tsx(HPD) CL=10pF valid status of HPD Note: (1). All typical values are at 25℃ and with a 3.3V supply. tpdHLTR(DDC) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 5/19 ps ps ps ps ps ps 2010.05 - Rev.E Technical Note BU16006KV, BU16018KV, BU16024KV, BU16027KV ●Measurement Symbol And Circuit AVcc RT RT Zo = R T TMDS Receiver Zo = R T TMDS Driver Figure 1 TMDS Output Driver Vcc RINT RINT RT Y VA A VID TMDS Driver TMDS Receiver CL VY 0.5pF RT AVCC Z B VZ VB VID = VA - VB Vswing = VY - VZ VA Vcc V VB Vcc-0.4 V 0.4 V VIC VID(pp) 0V -0.4 V tPLH tPLH 80% 100% Vswing VOD(O) 0V Differential 20% tf 0% tr VOD(U) Figure 2 Test Circuit and Definitions www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 6/19 2010.05 - Rev.E Technical Note BU16006KV, BU16018KV, BU16024KV, BU16027KV VY VOH 50% VZ VOL tsk(D) Figure 3 Definition of Intra-Pair Differential Skew Vcc V Vcc-0.4 V Vcc-0.4 V Vcc V Vcc-0.4 V Vcc V A B A Port 2 B Port 3 A B Port 1 VDD 2 VDD 0V S1 Clocking S2 tsx tsx Y Output Z 75mV 75mV -75mV HI-Z -75mV tdis ten Figure 4 TMDS Outputs Control Timing Definitions VDD 2 HPD_SINK VDD 2 HPD1 tpdHL(HPD) tpdLH(HPD) tsx(HPD) 2.4V HPD2 HPD3 0V S1 Vcc 2 S2 SDA_SINK tpdHLRT(DDC) tpdLHRT(DDC) 80% 20% tpdHLTR(DDC) tpdLHTR(DDC) 1.5V V IL SDA1 80% 20% 1.5V SDA2 SDA3 VDD tSX(DDC) 0V tfTX(DDC) trTX(DDC) tfRX(DDC) RX to TX trRX(DDC) VDD TX to RX Figure 5 DDC and HPD Timing Definitions www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 7/19 2010.05 - Rev.E BU16006KV, BU16018KV, BU16024KV, BU16027KV Technical Note ●Reference Data of BU16027KV/BU16006KV Figure 6 Supply voltage(Vcc) vs. Supply current(Icc) of BU16006KV/BU16027KV [S1=H,S2=L] www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 8/19 2010.05 - Rev.E Technical Note BU16006KV, BU16018KV, BU16024KV, BU16027KV ●Pin Assignment and Block Diagram of BU16006KV VCC VCC RINT VCC RINT RINT VCC RINT RINT RINT TMD S RX TMD S RX TMD S RX TMD S RX RINT RINT A14 B14 Vcc A13 B13 GND A12 B12 Vcc A11 B11 SCL1 SDA1 HPD1 Reserve1 S2 A14 B14 A13 B13 A12 B12 A11 B11 33 34 35 36 37 38 39 40 41 42 43 44 45 46 49 S1 HPD_SINK SDA_SINK SCL_SINK 32 50 31 51 30 52 29 53 28 54 27 55 57 24 23 A21 B21 VCC RINT VCC RINT Y4 RINT TMD S RX TMDS Drive RINT TMDS Drive RINT Z3 Y2 TMD S RX TMDS Drive VCC RINT Z4 Y3 TMD S RX RINT Z2 Y1 TMD S RX TMDS Drive Z1 VSADJ 16 15 14 13 12 11 10 9 8 17 7 18 64 6 19 63 5 20 62 4 21 61 3 22 60 2 59 A22 B22 RINT Vcc Z2 Y2 GND Z3 Y3 Vcc Z4 Y4 25 (64-pin VQFP) 58 A23 B23 GND Z1 Y1 26 BU16006KV 56 1 Reserve2 HPD2 SDA2 SCL2 B21 A21 Vcc B22 A22 GND B23 A23 Vcc B24 A24 NC 47 48 VCC A24 B24 S1 S2 HPD_SINK HPD1 HPD2 NC NC GND NC NC Vcc NC NC GND NC NC Vcc NC NC GND VSADJ SCL1 SDA1 Control Logic SCL2 SCL_SINK SDA_SINK SDA2 ●Pin Explanation List Terminal Name No. A11, A12, A13, A14 39, 42, 45, 48 A21, A22, A23, A24 54, 57, 60, 63 B11, B12, B13, B14 38, 41, 44, 47 B21, B22, B23, B24 53, 56, 59, 62 3, 9, 15, 22, GND 28, 43, 58 HPD1 35 HPD2 50 HPD_SINK 31 Reserve1 34 Reserve2 49 SCL1 37 SCL2 52 SCL_SINK 29 SDA1 36 SDA2 51 SDA_SINK 30 S1, S2 32, 33 6, 12, 19, 25, Vcc 40, 46, 55, 61 VSADJ 16 Y1, Y2, Y3, Y4 26, 23, 20, 17 Z1, Z2, Z3, Z4 27, 24, 21, 18 www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. I/O Description I I I I Source port 1 TMDS positive inputs Source port 2 TMDS positive inputs Source port 1 TMDS negative inputs Source port 2 TMDS negative inputs - Ground O O I I/O I/O I/O I/O I/O I/O I/O I/O I Source port 1 hot plug detector output Source port 2 hot plug detector output Sink port hot plug detector input Set to HIGH/LOW/OPEN Non Connect Pin Source port 1 DDC I2C clock line Source port 2 DDC I2C clock line 2 Sink port DDC I C clock line Source port 1 DDC I2C data line Source port 2 DDC I2C data line Sink port DDC I2C data line Source selector - Power supply I O O TMDS compliant voltage swing control (4.64kΩ to GND) TMDS positive outputs TMDS negative outputs 9/19 2010.05 - Rev.E Technical Note BU16006KV, BU16018KV, BU16024KV, BU16027KV A14 B14 A13 B13 VCC VCC RINT RINT VCC RINT TMD S RX RINT TMD S RX RINT TMD S RX TMD S RX RINT RINT TEST3 GND A34 B34 VCC A33 B33 GND A32 B32 VCC A31 B31 GND SCL3 SDA3 HPD3 VCC OE TEST2 BU16018KV VCC RINT 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 PRE VSADJ Y4 VCC A24 B24 A23 B23 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 VCC HPD2 SDA2 SCL2 GND GND B21 A21 VCC B22 A22 GND B23 A23 VCC B24 A24 GND VCC HPD1 A12 B12 A11 B11 ●Pin Assignment and Block Diagram of BU16018KV 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 HPD_SINK SDA_SINK SCL_SINK GND GND Z1 Y1 VCC Z2 Y2 GND Z3 Y3 VCC Z4 Y4 GND S3 S2 S1 A22 B22 A21 B21 RINT RINT TMD S RX VCC RINT RINT VCC RINT 3-to-1 MUX TMDS Drive TMD S RX TMDS Drive RINT A33 B33 Y1 TMDS Drive A32 B32 A31 B31 HPD1 HPD2 HPD3 RINT TMD S RX RINT TMD S RX VCC RINT S1 S2 S3 TMD S RX VCC RINT Z1 OE RINT VCC RINT Z2 RINT VCC A34 B34 Z3 Y2 TMD S RX RINT Z4 Y3 TMD S RX VCC RINT TMDS Drive RINT TMD S RX HPD_SINK SCL1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 SDA1 Control Logic TEST0 SDA1 SCL1 GND B11 A11 VCC B12 A12 GND B13 A13 VCC B14 A14 GND VCC VSADJ PRE TEST1 SCL2 SCL_SINK SDA_SINK SDA2 SCL3 SDA3 ●Pin Explanation List Terminal Name A11, A12, A13, A14 A21, A22, A23, A24 A31, A32, A33, A34 B11, B12, B13, B14 B21, B22, B23, B24 B31, B32, B33, B34 GND HPD1 HPD2 HPD3 HPD_SINK TEST0,1,2,3 _______ OE PRE SCL1 SCL2 SCL3 SCL_SINK SDA1 SDA2 SDA3 SDA_SINK S1, S2, S3 VCC VSADJ Y1, Y2, Y3, Y4 Z1, Z2, Z3, Z4 No. 6, 9, 12, 15 68, 71, 74, 77 49, 52, 55, 58 5, 8, 11, 14 67, 70, 73, 76 48, 51, 54, 57 4, 10, 16, 24, 30, 36, 37, 47, 53, 59, 65, 66, 72, 78 80 62 44 40 1, 20, 41, 60 42 I/O I I I I I I Port 1 TMDS positive inputs Port 2 TMDS positive inputs Port 3 TMDS positive inputs Port 1 TMDS negative inputs Port 2 TMDS negative inputs Port 3 TMDS negative inputs - Ground O O O I Port 1 hot plug detector output Port 2 hot plug detector output Port 3 hot plug detector output Sink side hot plug detector input Open or GND connect (recommend) Output enable, active low TMDS high speed mode SW High : ON, Low : OFF (above 165MHz recommend to High) Source port 1 DDC I2C clock line Source port 2 DDC I2C clock line Source port 3 DDC I2C clock line Sink port DDC I2C clock line I 19 I 3 64 46 38 2 63 45 39 21, 22, 23 7, 13, 17, 27, 33, 43, 50, 56, 61, 69, 75, 79 18 34, 31, 28, 25 35, 32, 29, 26 I/O I/O I/O I/O I/O I/O I/O I/O I www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. Description Source port 1 DDC I2C data line Source port 2 DDC I2C data line Source port 3 DDC I2C data line Sink port DDC I2C data line Source selector input - Power supply I O O TMDS voltage swing control. Connect to GND 4.64KΩ TMDS positive outputs TMDS negative outputs 10/19 2010.05 - Rev.E Technical Note BU16006KV, BU16018KV, BU16024KV, BU16027KV ●Pin Assignment and Block Diagram of BU16024KV VSADJ OE PRE VCC RINT Y4 B4 TEST2 GND SCL_SINK SDA_SINK Vcc SELREF GND Vcc SDA TEST3 VSADJ SCL A4 TMDS Rx TMDS Driver TMDS Rx TMDS Driver RINT Y3 B3 25 26 27 28 29 30 31 32 33 34 35 36 A3 37 24 38 23 39 22 40 21 41 43 44 19 18 17 Z3 VCC RINT Y2 A2 TMDS Rx B2 TMDS Driver Z2 VCC RINT Y1 A1 12 B1 TEST1 11 10 Y4 Z4 9 GND 8 PRE 7 OEB I2CEN Vcc A14 B14 6 13 5 14 48 4 15 47 3 46 2 16 1 45 TEST0 HPD_SINK GND Z1 Y1 Vcc Z2 Y2 GND Z3 Y3 Vcc NC 20 16024KV (48-pin VQFP) 42 GND HPD GND B11 A11 Vcc B12 A12 GND B13 A13 Vcc NC Z4 VCC TMDS Rx TMDS Driver Z1 SCL SCL_SINK SDA SDA_SINK I2CEN SELREF HPD HPD_SINK(* ) (*) when HPD_SINK = “L”. Termination resistor is turned off. ●Pin Explanation List Terminal Name No. B1, B2, B3, B4 39, 42, 45, 2 A1, A2, A3, A4 40, 43, 46, 3 Z1, Z2, Z3, Z4 22, 19, 16, 11 Y1, Y2, Y3, Y4 21, 18, 15, 10 HPD 37 HPD_SINK 24 SCL 34 SDA 33 SCL_SINK 27 SDA_SINK 28 VSADJ 35 I2CEN 6 SELREF 30 TEST0, 1, 2, 3 1, 12, 25, 36 N.C 13, 48 I/O Description I I O O O I I/O I/O I/O I/O I I I I TMDS Negative inputs TMDS Positive inputs TMDS Negative outputs TMDS Positive outputs Source side hot plug detector output Sink side hot plug detector input Source port DDC I2C clock line Source port DDC I2C data line Sink port DDC I2C clock line Sink port DDC I2C data line TMDS voltage swing control(4.64kΩ to GND) I2C Repeater enable Low : High-Z High : Active SCL_SINK/SDA_SINK Output voltage select Open or GND connect (recommend) Open or GND connect (recommend) TMDS Output enable Low : Active High : High-Z TMDS high speed mode SW High : ON, Low : OFF (above 165MHz recommend to High) OEB 7 I PRE 8 I VCC GND 5, 14, 20, 29, 32, 41, 47 4, 9, 17, 23, 26, 31, 38, 44 www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. - Power supply - Ground 11/19 2010.05 - Rev.E Technical Note BU16006KV, BU16018KV, BU16024KV, BU16027KV ●Pin Assignment and Block Diagram of BU16027KV VCC RINT VCC VCC RINT RINT VCC RINT TMD S RX RINT TMD S RX RINT TMD S RX TMD S RX RINT RINT A14 B14 Vcc A13 B13 GND A12 B12 Vcc A11 B11 SCL1 SDA1 HPD1 Reserve1 S2 A14 B14 A13 B13 A12 B12 A11 B11 Reserve2 HPD2 SDA2 SCL2 B21 A21 Vcc B22 A22 GND B23 A23 Vcc B24 A24 HPD3 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 VCC 49 32 50 31 30 51 52 29 53 28 54 27 55 26 57 BU16027KV BU16028KV 58 (64-pin VQFP) 56 24 23 59 22 60 21 RINT A23 B23 RINT A22 B22 RINT A21 B21 RINT A34 B34 RINT A33 B33 RINT A32 B32 RINT A31 B31 HPD1 HPD2 HPD3 RINT VCC VCC VCC RINT Y4 TMD S RX TMDS Drive RINT TMDS Drive RINT Z3 Y2 TMD S RX TMDS Drive RINT Z2 Y1 TMD S RX VCC Z4 Y3 TMD S RX TMDS Drive VCC Vcc Z2 Y2 GND Z3 Y3 Vcc Z4 Y4 16 15 14 13 12 11 10 9 8 7 17 6 18 64 5 63 4 19 3 20 62 2 61 1 1PIN MARK 25 S1 HPD_SINK SDA_SINK SCL_SINK GND Z1 Y1 A24 B24 Z1 VSADJ RINT TMD S RX RINT TMD S RX VCC RINT TMD S RX VCC RINT TMD S RX S1 S2 HPD_SINK SCL1 SDA3 SCL3 GND B31 A31 Vcc B32 A32 GND B33 A33 Vcc B34 A34 GND VSADJ SDA1 Control Logic SCL2 SCL_SINK SDA_SINK SDA2 SCL3 SDA3 ●Pin Explanation List Terminal Name A11, A12, A13, A14 A21, A22, A23, A24 A31, A32, A33, A34 B11, B12, B13, B14 B21, B22, B23, B24 B31, B32, B33, B34 GND HPD1 HPD2 HPD3 HPD_SINK Reserve1 Reserve2 SCL1 SCL2 SCL3 SCL_SINK SDA1 SDA2 SDA3 SDA_SINK S1, S2 Vcc VSADJ Y1, Y2, Y3, Y4 Z1, Z2, Z3, Z4 No. 39, 42, 45, 48 54, 57, 60, 63 5, 8, 11, 14 38, 41, 44, 47 53, 56, 59, 62 4, 7, 10, 13 3, 9, 15, 22, 28, 43, 58 35 50 64 31 34 49 37 52 2 29 36 51 1 30 32, 33 6, 12, 19, 25, 40, 46, 55, 61 16 26, 23, 20, 17 27, 24, 21, 18 www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. I/O Description I I I I I I O O O I I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I Source port 1 TMDS positive inputs Source port 2 TMDS positive inputs Source port 3 TMDS positive inputs Source port 1 TMDS negative inputs Source port 2 TMDS negative inputs Source port 3 TMDS negative inputs Ground Source port 1 hot plug detector output (status pin) Source port 2 hot plug detector output (status pin) Source port 3 hot plug detector output (status pin) Sink port hot plug detector input (status pin) In High, Low, and Open, any setting is OK. Non Connect Pin Source port 1 DDC I2C clock line Source port 2 DDC I2C clock line Source port 3 DDC I2C clock line Sink port DDC I2C clock line Source port 1 DDC I2C data line Source port 2 DDC I2C data line Source port 3 DDC I2C data line Sink port DDC I2C data line Source selector - Power supply I O O TMDS voltage swing control (via 4.64kΩ to GND) Sink port TMDS positive outputs Sink port TMDS negative outputs 12/19 2010.05 - Rev.E Technical Note BU16006KV, BU16018KV, BU16024KV, BU16027KV ●Source Selection Lookup Table of BU16006KV Control Pins I/O Selected HPD_SINK S1 S2 H H H H L H H L L H H L L H H L L H L L L L H L Output Status Y/Z A1/B1 Termination resistors of A2/B2 and A3/B3 are disconnected A2/B2 Termination resistors of A1/B1 and A3/B3 are disconnected Disallowed (indeterminate) State All termination resistors are disconnected None (Z) All termination resistors are disconnected Disallowed (indeterminate) State All termination resistors are disconnected Disallowed (indeterminate) State All termination resistors are disconnected Disallowed (indeterminate)State All termination resistors are disconnected None (Z) All termination resistors are disconnected SCL_SINK SDA_SINK HPD1 HPD2 HPD3 SCL1 SDA1 H L L SCL2 SDA2 L H L L L H H H H L L L L L L L L L L L L None (Z) SCL1 SDA1 SCL2 SDA2 None (Z) ●Source Selection Lookup Table of BU16027KV Control Pins I/O Selected HPD_SINK S1 S2 H/L H H H/L L H H/L L L H/L H L Output Status Y/Z A1/B1 Termination resistors of A2/B2 and A3/B3 are disconnected A2/B2 Termination resistors of A1/B1 and A3/B3 are disconnected A3/B3 Termination resistors A1/B1 and A2/B2 are disconnected None (Z) All terminations are disconnected ●Source Selection Lookup Table of BU16018KV Control Pins I/O Selected HPD_SINK S1 S2 S3 Y/Z A1/B1 H H X X Termination resistors of A2/B2 and A3/B3 are disconnected A2/B2 H L H X Termination resistors of A1/B1 and A3/B3 are disconnected A3/B3 H L L H Termination resistors of A1/B1 and A2/B2 are disconnected None (Z) H L L L All terminations are disconnected Disallowed (indeterminate)State L H X X All terminations are disconnected Disallowed (indeterminate)State L L H X All terminations are disconnected Disallowed (indeterminate)State L L L H All terminations are disconnected None (Z) L L L L All terminations are disconnected H: Logic high; L: Logic low; X: Don’t care; Z: High impedance www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 13/19 SCL_SINK SDA_SINK HPD1 HPD2 HPD3 SCL1 SDA1 HPD _SINK L L SCL2 SDA2 L HPD _SINK L SCL3 SDA3 L L HPD _SINK None (Z) HPD _SINK HPD _SINK HPD _SINK Output Status SCL_SINK/SDA_SINK HPD1 HPD2 HPD3 SCL1 SDA1 H L L SCL2 SDA2 L H L SCL3 SDA3 L L H None (Z) H H H L L L L L L L L L L L L SCL1 SDA1 SCL2 SDA2 SCL3 SDA3 None (Z) 2010.05 - Rev.E Technical Note BU16006KV, BU16018KV, BU16024KV, BU16027KV ●Equivalent Input And Output Schematic Diagrams TMDS Input Stage TMDS Output Stage VDD HPD Output Stage VDD VDD VDD 50Ω 50Ω Anm Ym Bnm Zm HPDn 10mA R-Side I2 C Input/Output Stage T-Side I2 C Input/Output Stage VDD SCL_SINK SDA_SINK SCL SDA VDD HPD_SINK VDD ※n=1,2,3 m=1,2,3,4 www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 14/19 2010.05 - Rev.E Technical Note BU16006KV, BU16018KV, BU16024KV, BU16027KV ●Note for use 1). Attention on use as “repeater” or “source” equipment. Y and Z terminals are connected to Vcc through ESD diode as Figure 7. When Vcc＋0.4 < AVcc, leak current flows from AVcc to Vcc. For this current, BU16006KV/BU16027KV can’t pass the compliance test as “Repeater” and “Source” equipment (Test ID 7-3 VOFF). BU16018KV/BU16024KV is able to pass the compliance test using external element like Figure 8 Vcc=0V Vcc=0V Voff 50 Ym AVcc=3.3V Ioff 50 Ioff Zm AVcc=3.3V Voff Figure 7 TMDS Equivalent output schematic Figure 8 Leak current control in BU16018KV and BU16024KV www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 15/19 2010.05 - Rev.E Technical Note BU16006KV, BU16018KV, BU16024KV, BU16027KV 2). HPD_SINK Pull down resistance. HPD_SINK have a 5V tolerant structure shown in Figure 9.It needs some drive current to pull down HPD_SINK "H" to "L". So to pull down HPD_SINK, please use 10kΩ(or under 10kΩ) resistor. Figure 9 HPD_SINK I/O schematic 3). About don’t use terminal. 3-1. Unused TMDS input channel recommend open. B U 1 6 0 * * KV Vcc R INT R INT RT A TMDS Receiver Y TMDS Driver B Z AVcc RT Figure 10 TMDS Input Recommendation 3-2. Unused DDC Buffers of R side recommend to pull up to Vcc. Vcc 4.7k T SCL_SINK SDA_SINK SCL SDA R Figure 11 Unused DDC Buffers of R side www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 16/19 2010.05 - Rev.E Technical Note BU16006KV, BU16018KV, BU16024KV, BU16027KV 3-3. Unused DDC Buffers of R side recommend pull up to Vcc. Vcc 4.7k T RSCL RSDA TSCL TSDA R Figure 12 Unused DDC of T side 3-4. Unused HPDn recommend open. Figure 13 Open unused HPDn 4). About serial connection notice. When BU160xxKV output connect to other HDMI sw input like following application the specification of Jitter tolerance is downed. Especially when system needs 1080p (12bit) data rate and cable or PCB trace lengths between BU160xxKV input and output is small, Deteriorations of Jitter tolerance is outstanding. This problem also depends on receiver IC characteristic. When system is required 1080p (12bit), Rohm doesn’t recommend serial connect application. Figure 14 serial connection notice www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 17/19 2010.05 - Rev.E BU16006KV, BU16018KV, BU16024KV, BU16027KV Technical Note 5). AC Coupling notice BU160xxKV can also communicate using AC coupling capacitor with TMDS line. But even connecting AC coupling capacitor, AC current may flow if input common mode voltage between two devices is different. For this current, the lower common mode voltage devices like PCIe or DP may be damaged by AC current. Figure 15 AC Coupling connection notice 6). TMDS output offset voltage notice. Offset voltage may appear to TMDS output when there is no signal to TMDS input differential line. OE should set to “H” to avoid it. 7). Limitation of Master and slave direction as shown Figure 16. Figure 16 Limitation of Master and slave direction www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 18/19 2010.05 - Rev.E Technical Note BU16006KV, BU16018KV, BU16024KV, BU16027KV ●Ordering part number B U 1 Part No. 6 0 0 6 K Part No. 16006 16018 16024 16027 V - Package KV: VQFP80 (BU16018), VQFP64 (BU16027 / BU16006), VQFP48C (BU16024) E 2 Packaging and forming specification E2: Embossed tape and reel VQFP80 <Tape and Reel information> 14.0±0.2 12.0±0.1 60 41 1000pcs 0.5 ± 0.15 20 1 1.25 E2 Direction of feed direction is the 1pin of product is at the upper left when you hold ( The ) reel on the left hand and you pull out the tape on the right hand 1.0± 0.2 1.25 21 80 +0.05 0.145 -0.03 1PIN MARK S 4 +6 –4 1.4 ± 0.05 0.1± 0.05 1.6MAX Embossed carrier tape (with dry pack) Quantity 40 12.0 ± 0.1 14.0 ± 0.2 61 Tape 0.08 S +0.05 0.2 -0.04 0.08 M Direction of feed 1pin 0.5±0.1 Reel (Unit : mm) ∗ Order quantity needs to be multiple of the minimum quantity. VQFP64 <Tape and Reel information> 12.0±0.2 10.0±0.1 48 33 Embossed carrier tape (with dry pack) Quantity 1000pcs 17 64 1 1.0±0.2 1.25 0.5±0.15 32 10.0±0.1 12.0±0.2 49 Tape Direction of feed E2 direction is the 1pin of product is at the upper left when you hold ( The ) reel on the left hand and you pull out the tape on the right hand 16 1.25 1PIN MARK 1.6MAX +0.05 0.145 -0.03 0.1±0.05 1.4±0.05 4 +6 –4 0.08 S +0.05 0.2 -0.04 0.08 M Direction of feed 1pin 0.5±0.1 Reel (Unit : mm) ∗ Order quantity needs to be multiple of the minimum quantity. VQFP48C <Tape and Reel information> 9.0±0.2 7.0±0.1 36 25 Embossed carrier tape Quantity 1500pcs 0.5±0.15 0.75 48 13 1 1PIN MARK Direction of feed E2 direction is the 1pin of product is at the upper left when you hold ( The ) reel on the left hand and you pull out the tape on the right hand +0.05 0.145 -0.03 1.6MAX 0.75 12 1.0±0.2 24 7.0 ± 0.1 9.0 ± 0.2 37 Tape 0.1 ± 0.05 1.4 ± 0.05 4 +6 –4 0.5±0.1 0.08 S +0.05 0.22 -0.04 0.08 1pin M (Unit : mm) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. Reel 19/19 Direction of feed ∗ Order quantity needs to be multiple of the minimum quantity. 2010.05 - Rev.E Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. 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