NSC DS75208J Dual line receiver Datasheet

DS55107/DS75107/DS75108/DS75208
Dual Line Receivers
General Description
The products described herein are TTL compatible dual
high speed circuits intended for sensing in a broad range of
system applications. While the primary usage will be for line
receivers of MOS sensing, any of the products may effectively be used as voltage comparators, level translators,
window detectors, transducer preamplifiers, and in other
sensing applications. As digital line receivers the products
are applicable with the SN55109/SN75109 and mA75110/
DS75110 companion drivers, or may be used in other balanced or unbalanced party-line data transmission systems.
The improved input sensitivity and delay specifications of
the DS75208 make it ideal for sensing high performance
MOS memories as well as high sensitivity line receivers and
voltage comparators.
Input protection diodes are incorporated in series with the
collectors of the differential input stage. These diodes are
useful in certain applications that have multiple VCC a supplies or VCC a supplies that are turned off.
Features
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Diode protected input stage for power ‘‘OFF’’ condition
17 ns typ high speed
TTL compatible
g 10 mV or g 25 mV input sensitivity
g 3V input common-mode range
High input impedance with normal VCC, or VCC e 0V
Strobes for channel selection
Dual circuits
Sensitivity gntd. over full common-mode range
Logic input clamp diodesÐmeets both ‘‘A’’ and ‘‘B’’
version specifications
g 5V standard supply voltages
Connection Diagram
Dual-In-Line Package
TL/F/9446 – 1
Top View
Order Number DS75107M, DS75107N, DS75107AM, DS75107AN,
DS75108M, DS75108N or DS75208N
See NS Package Number M14A or N14A
For Complete Military 883 Specifications, see RETS Datasheet.
Order Number DS55107AJ/883
See NS Package Number J14A
Selection Guide
Temperature x
Package x
b 55§ C s TA s a 125§ C
Cavity Dip
0§ C s TA s a 70§ C
Cavity or Molded Dip
Input Sensitivity x
Output Logicv
g 25 mV
g 25 mV
g 10 mV
TTL Active Pull-Up
TTL Open Collector
DS55107
DS75107
DS75108
DS75208
C1996 National Semiconductor Corporation
TL/F/9446
RRD-B30M36/Printed in U. S. A.
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DS55107/DS75107/DS75108/DS75208 Dual Line Receivers
January 1996
Absolute Maximum Ratings (Note 1)
Strobe Input Voltage
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage, VCC a
Supply Voltage, VCC
Differential Input Voltage
Common Mode Input Voltage
b 65§ C to a 150§ C
Maximum Power Dissipation* at 25§ C
Cavity Package
Molded Package
Lead Temperature (Soldering, 4 sec)
7V
b 7V
g 6V
g 5V
b
5.5V
Storage Temperature Range
1308 mW
1207 mW
260§ C
*Derate cavity package 8.7 mW/§ C above 25§ C; derate molded package 9.7
mW/§ C above 25§ C.
Operating Conditions
DS75107,
DS75108, DS75208
DS55107
Min
Nom
Max
Min
Nom
Max
4.5V
5V
5.5V
4.75V
5V
5.25V
Supply Voltage VCCb
b 4.5V
b 5V
b 5.5V
b 4.75V
b 5V
b 5.25V
Operating Temperature Range
b 55§ C
to
a 125§ C
0§ C
to
a 70§ C
Supply Voltage VCC a
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.
Note 2. Unless otherwise specified min/max limits apply across the b 55§ C to a 125§ C temperature range for the DS55107 and across the 0§ C to a 70§ C range for
the DS75107, DS75108 and DS75208. All typical values are for TA e 25§ C and VCC e 5V.
Note 3: All currents into device pins shown as positive, out of device pins as negative, all voltages referenced to ground unless otherwise noted. All values shown
as max or min on absolute value basis.
DS55107/DS75107, DS75108
Electrical Characteristics TMIN s TA s TMAX (Notes 2, 3)
Symbol
IIH
Parameter
Conditions
High Level Input Current
into A1, B1, A2 or B2
VCC a e Max, VCCb e Max,
VID e 0.5V, VIC e b3V to 3V
IIL
Low Level Input Current
into A1, B1, A2 or B2
IIH
High Level Input Current
into G1 or G2
VCC a e Max, VCCb e Max,
VID e b2V, VIC e b3V to 3V
VCC a e Max,
VCCb e Max
IIL
Low Level Input Current
into G1 or G2
VCC a e Max, VCCb e Max,
VIL(S) e 0.4V
IIH
High Level Input Current into S
VCC a e Max,
VCCb e Max
IIL
VOH
VOL
Min
Max
Units
30
75
mA
b 10
mA
VIH(S) e 2.4V
40
mA
VIH(S) Max VCC a
1
mA
b 1.6
mA
VIH(S) e 2.4V
80
mA
VIH(S) e Max VCC a
2
mA
b 3.2
mA
Low Level Input Current into S
VCC a e Max, VCCb e Max,
VIL(S) e 0.4V
High Level Output Voltage
VCC a e Min, VCCb e Min,
ILOAD e b400 mA, VID e 25 mV,
VIC e b3V to 3V, (Note 3)
Low Level Output Voltage
Typ
2.4
V
VCC a e Min, VCCb e Min,
ISINK e 16 mA, VID e b25 mV,
VIC e b3V to 3V
0.4
V
250
mA
b 70
mA
IOH
High Level Output Current
VCC a e Min, VCCb e Min
VOH e Max VCC a , (Note 4)
IOS
Short Circuit Output Current
VCC a e Max, VCCb e Max,
(Notes 2 and 3)
ICCH a
High Logic Level Supply
Current from VCC
VCC a e Max, VCCb e Max,
VID e 25 mV, TA e 25§ C
18
30
mA
ICCHb
High Logic Level Supply
Current from VCC
VCC a e Max, VCCb e Max,
VID e 25 mV, TA e 25§ C
b 8.4
b 15
mA
Input Clamp Voltage on G or S
VCC a e Min, VCCb e Min,
IIN e b12 mA, TA e 25§ C
b1
b 1.5
V
VI
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2
b 18
Switching Characteristics VCC a e 5V, VCCb e b5V, TA e 25§ C
Symbol
Parameter
Typ
Max
Units
tPLH(D)
Propagation Delay Time, Low to
High Level, from Differential
Inputs A and B to Output
RL e 390X, CL e 50 pF,
(Note 1)
(Note 3)
17
25
ns
(Note 4)
19
25
ns
Propagation Delay Time, High to
Low Level, from Differential
Inputs A and B to Output
RL e 390X, CL e 50 pF,
(Note 1)
(Note 3)
17
25
ns
(Note 4)
19
25
ns
Propagation Delay Time, Low to
High Level, from Strobe Input G
or S to Output
RL e 390X, CL e 50 pF
(Note 3)
10
15
ns
(Note 4)
13
20
ns
Propagation Delay Time, High to
Low Level, from Strobe Input G
or S to Output
RL e 390X, CL e 50 pF
(Note 3)
8
15
ns
(Note 4)
13
20
ns
Typ
Max
Units
30
75
mA
b 10
mA
tPHL(D)
tPLH(S)
tPHL(S)
Conditions
Min
Note 1: Differential input is a 100 mV to b 100 mV pulse. Delays read from 0 mV on input to 1.5V on output.
Note 2: Only one output at a time should be shorted.
Note 3: DS55107/DS75107 only.
Note 4: DS75108 only.
DS75208
Electrical Characteristics 0§ C s TA s a 70§ C
Symbol
Parameter
Conditions
IIH
High Level Input Current
into A1, B1, A2 or B2
VCC a e Max, VCCb e Max,
VID e 0.5V, VIC e b3V to 3V
IIL
Low Level Input Current
into A1, B1, A2 or B2
VCC a e Max, VCCb e Max,
VID e b2V, VIC e b3V to 3V
IIH
High Level Input Current
into G1 or G2
VCC a e Max,
VCCb e Max
IIL
Low Level Input Current
into G1 or G2
VCC a e Max, VCCb e Max,
VIL(S) e 0.4V
IIH
High Level Input Current into S
VCC a e Max,
VCCb e Max
IIL
Low Level Input Current into S
VCC a e Max, VCCb e Max,
VIL(S) e 0.4V
VOL
Low Level Output Voltage
Min
VIH(S) e 2.4V
40
mA
VIH(S) e Max VCC a
1
mA
b 1.6
mA
VIH(S) e 2.4V
80
mA
VIH(S) e Max VCC a
2
mA
b 3.2
mA
VCC a e Min, VCCb e Min,
ISINK e 16 mA, VID e b10 mV,
VIC e b3V to 3V
0.4
V
250
mA
IOH
High Level Output Current
VCC a e Min, VCCb e Min,
VOH e Max VCC a
ICCH a
High Logic Level Supply
Current from VCC a
VCC a e Max, VCCb e Max,
VID e 10 mV, TA e 25§ C
18
30
mA
ICCHb
High Logic Level Supply
Current from VCCb
VCC a e Max, VCCb e Max,
VID e 10 mV, TA e 25§ C
b 8.4
b 15
mA
VI
Input Clamp Voltage on G or S
VCC a e Min, VCCb e Min,
IIN e b12 mA, TA e 25§ C
b1
b 1.5
V
3
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Switching Characteristics VCC a e 5V, VCCb e b5V, TA e 25§ C
Symbol
Parameter
Conditions
tPLH(D)
Propagation Delay Time, Low-toHigh Level, from Differential
Inputs A and B to Output
RL e 470X, CL e 15 pF, (Note 1)
Propagation Delay Time, High-toLow Level, from Differential
Inputs A and B to Output
RL e 470X, CL e 15 pF, (Note 1)
Propagation Delay Time, Low-toHigh Level, from Strobe Input G
or S to Output
RL e 470X, CL e 15 pF
Propagation Delay Time, High-toLow Level, from Strobe Input G
or S to Output
RL e 470X, CL e 15 pF
tPHL(D)
tPLH(S)
tPHL(S)
Min
Typ
Max
Units
35
ns
20
ns
17
ns
17
ns
Note 1: Differential input is a 10 mV to b 30 mV pulse. Delays read from 0 mV on input to 1.5V on output.
Voltage Waveforms
TL/F/9446 – 12
Typical Applications
Basic Balanced-Line Transmission System
TL/F/9446 – 2
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4
Typical Applications (Continued)
Data-Bus or Party-Line System
TL/F/9446 – 3
25 mV (or less). For normal line resistances, data may be
recovered from lines of several thousand feet in length.
Line termination resistors (RT) are required only at the extreme ends of the line. For short lines, termination resistors
at the receiver only may prove adequate. The signal amplitude will then be approximately:
VDIFF j IO(on) c RT
(2)
APPLICATION
The DS55107, DS75107 dual line circuits are designed specifically for use in high speed data transmission systems
that utilize balanced, terminated transmission lines such as
twisted-pair lines. The system operates in the balanced
mode, so that noise induced on one line is also induced on
the other. The noise appears common mode at the receiver
input terminals where it is rejected. The ground connection
between the line driver and receiver is not part of the signal
circuit so that system performance is not affected by circulating ground currents.
The unique driver output circuit allows terminated transmission lines to be driven at normal line impedances. High
speed system operation is ensured since line reflections are
virtually eliminated when terminated lines are used. Crosstalk is minimized by low signal amplitudes and low line impedances.
The typical data delay in a system is approximately (30 a
1.3L) ns, where L is the distance in feet separating the driver and receiver. This delay includes one gate delay in both
the driver and receiver.
Data is impressed on the balanced-line system by unbalancing the line voltages with the driver output current. The driven line is selected by appropriate driver input logic levels.
The voltage difference is approximately:
VDIFF j (/2 IO(on) c RT
(1)
The strobe feature of the receivers and the inhibit feature of
the drivers allow the DS55107, DS75107 dual line circuits to
be used in data-bus or party-line systems. In these applications, several drivers and receivers may share a common
transmission line. An enabled driver transmits data to all
enabled receivers on the line while other drivers and receivers are disabled. Data is thus time multiplexed on the transmission line. The DS55107, DS75107 device specifications
allow widely varying thermal and electrical environments at
the various driver and receiver locations. The data-bus system offers maximum performance at minimum cost.
The DS55107, DS75107 dual line circuits may also be used
in unbalanced or single line systems. Although these systems do not offer the same performance as balanced systems for long lines, they are adequate for very short lines
where environment noise is not severe.
The receiver threshold level is established by applying a DC
reference voltage to one receiver input terminal. The signal
from the transmission line is applied to the remaining input.
The reference voltage should be optimized so that signal
High series line resistance will cause degradation of the signal. The receivers, however, will detect signals as low as
5
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Typical Applications (Continued)
swing is symmetrical about it for maximum noise margin.
The reference voltage should be in the range of b3.0V to
a 3.0V. It can be provided by a voltage supply or by a voltage divider from an available supply voltage.
DS75108 Wired-OR Output Connections
Unbalanced or Single-Line Systems
TL/F/9446–4
TL/F/9446 – 6
Precautions in the Use of DS1603, DS3603, DS55107,
DS75107, DS75108 and DS75208 Dual Line Receivers
The following precaution should be observed when using or
testing DS55107, DS75107 line circuits.
When only one receiver in a package is being used, at least
one of the differential inputs of the unused receiver should
be terminated at some voltage between b3.0V and a 3.0V,
preferably at ground. Failure to do so will cause improper
operation of the unit being used because of common bias
circuitry for the current sources of the two receivers.
The DS55107, DS75107 and DS75108 line receivers feature a common mode input voltage range of g 3.0V. This
satisfies the requirements for all but the noisiest system applications. For these severe noise environments, the common mode range can be extended by the use of external
input attenuators. Common mode input voltages can in this
way be reduced to g 3.0V at the receiver input terminals.
Differential data signals will be reduced proportionately. Input sensitivity, input impedance and delay times will be adversely affected.
The DS75108 line receivers feature an open-collector-output circuit that can be connected in the DOT-OR logic configuration with other DS75108 outputs. This allows a level of
logic to be implemented without addtional logic delay.
Circuit Differences Between ‘‘A’’ and Standard Devices
The difference between the ‘‘A’’ and standard devices is
shown in the following schematics of the input stage.
‘‘A’’ Devices
TL/F/9446 – 7
Increasing Common Mode Input
Voltage Range of Receiver
Standard Devices
TL/F/9446–5
TL/F/9446 – 8
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6
Typical Applications (Continued)
This would be a problem in specific systems which might
possibly have the transmission lines biased to some potential greater than 1.4V. Since this is not a widespread application problem, both the ‘‘A’’ and standard devices will be
available. The ratings and characteristic specifications of
the ‘‘A’’ devices are the same as those of the standard
devices.
The DS55107A feature the ‘‘A’’ device input stage.
The input protection diodes are useful in certain party-line
systems which may have multiple V a power supplies and,
in which case, may be operated with some of the V a supplies turned off. In such a system, if a supply is turned off
and allowed to go to ground, the equivalent input circuit
connected to that supply would be as follows:
‘‘A’’ Devices
TL/F/9446 – 9
Standard Devices
TL/F/9446 – 10
Schematic Diagrams
DS55107/DS75107, DS75108, DS75208
TL/F/9446 – 11
Note 1: (/2 of the dual circuit is shown.
Note 2: *Indicates connections common to second half of dual circuit.
Note 3: Components shown with dash lines are applicable to the DS55107, DS75207 and DS75107 only.
7
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8
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number DS55107J, DS75107J or DS75208J
NS Package Number J14A
Molded Dual-In-Line Package (M)
Order Number DS75107M, DS75107AM or DS75108M
NS Package Number M14A
9
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DS55107/DS75107/DS75108/DS75208 Dual Line Receivers
Physical Dimensions inches (millimeters) (Continued)
Molded Dual-In-Line Package (N)
Order Number DS75107N, DS75107AN, DS75108N or DS75208N
NS Package Number N14A
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