ASM2P20807A June 2005 rev 0.2 2.5V CMOS 1-TO-10 CLOCK DRIVER Features Product Description • High frequency > 150MHz • Guaranteed low skew < 150pS (max.) between any two outputs • Very low duty cycle distortion < 300pS • High speed: propagation delay < 3nS • Very low CMOS power levels • TTL compatible inputs and outputs The ASM2P20807A is a 2.5V compatible, high speed, low noise, 1:10 fanout, non-inverting clock buffer. The large fanout from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. Providing output to output skew as low as 150pS, the ASM20807A is an ideal clock distribution device for synchronous systems. Multiple power and grounds reduce noise. Typical applications are clock and signal distribution. • 1:10 fanout • Maximum output rise and fall time < 1.25nS (max.) • Low input capacitance: 3pF (typ) • 2.5V Supply Voltage • Available in SSOP and QSOP Packages Block Diagram O1 O2 O3 O4 O5 IN O6 O7 O8 O9 O10 Alliance Semiconductor 2575, Augustine Drive • Santa Clara, CA • Tel: 408.855.4900 • Fax: 408.855.4999 • www.alsc.com Notice: The information in this document is subject to change without notice. ASM2P20807A June 2005 rev 0.2 Pin Configuration IN 1 GND 2 O1 3 VCC 4 O2 5 GND 6 O3 7 VCC 8 O4 9 GND A S M 2 P 2 0 8 0 7 A 10 20 VCC 19 O10 18 O9 17 GND 16 O8 15 VCC 14 O7 13 GND 12 06 11 O5 SSOP/ QSOP PACKAGE TOP VIEW Pin Description Pin # Pin Names Description 1 IN Clock Input 3,5,7,9,11,12,14,16,18,19 O1-O10 Clock Outputs 2,6,10,13,17 GND Ground 4,8,15,20 VCC Power supply Capacitance (TA = +25°C, f = 1.0MHz) Symbol Parameter1 Conditions Typ Max Unit CIN Input Capacitance VIN = 0V 3 4 pF NOTE:1. This parameter is measured at characterization but not tested. Absolute Maximum Ratings1 Symbol Max Unit VTERM 2 Terminal Voltage with Respect to GND Description -0.5 to +4.6 V VTERM3 Terminal Voltage with Respect to GND -0.5 to +5.5 V 4 VTERM Terminal Voltage with Respect to GND -0.5 to VCC+0.5 V TSTG Storage Temperature -65 to +150 °C IOUT DC Output Current -60 to +60 mA NOTES: 1. These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. 2. VCC terminals. 3. Input terminals. 4. Outputs and I/O terminals. 2.5V CMOS 1-TO-10 CLOCK DRIVER Notice: The information in this document is subject to change without notice. 2 of 11 ASM2P20807A June 2005 rev 0.2 Power Supply Characteristics Symbol Parameter Test Conditions1 Min Typ2 Max Unit ICCL Quiescent Power Supply Current TTL Inputs HIGH VCC= Max VIN = GND or VCC - 0.1 20 µA - 45 300 µA - 40 - µA /MHz - 65 90 ICCH ∆ICC ICCD IC Power Supply Current per Input HIGH VCC= Max VIN = VCC -0.6V Dynamic Power Supply Current per Output3 Total Power Current4 Supply VCC= 2.7V and 15 pF load 150 MHz VCC= Max. CL= 12pF All outputs toggling fi = 150MHz VIN= VCC VIN= GND mA VIN= VCC –0.6V VIN= GND - 75 100 NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 2.5V, +25°C ambient. 3. This parameter is not directly testable, but is derived for use in Total Power Supply calculations. 4. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ∆ICC DHNT + ICCD (fi) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ∆ICC = Power Supply Current for a TTL High Input (VIN = VCC -0.6V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fi = Input Frequency 2.5V CMOS 1-TO-10 CLOCK DRIVER Notice: The information in this document is subject to change without notice. 3 of 11 ASM2P20807A June 2005 rev 0.2 DC Electrical Characteristics Over Operating Range Following Conditions Apply Unless Otherwise Specified Industrial: TA = -40°C to +85°C, VCC = 2.5V ± 0.2V Symbol Test Conditions1 Parameter Min Typ2 Max Unit VIH Input HIGH Level 1.7 - - V VIL Input LOW Level - - 0.7 V IIH Input HIGH (Input pins) Current VCC= Max, VI = VCC - - ±1 mA IIL Input LOW (Input pins) Current VCC= Max, VI = GND - - ±1 mA VIK Clamp Diode Voltage VCC= Min, IIN = -18mA - -0.7 -1 V IODH Output HIGH Current -25 -45 -100 mA IODL Output LOW Current 20 55 120 mA IOH = -1mA VCC–0.2 - - IOH = -8mA 1.85 - - VCC= Min IOL = 1mA - - 0.4 VIN = VIH or VIL IOL = 8mA - - 0.6 -25 -60 -135 VOH VOL IOS Output HIGH Voltage Output LOW Voltage Short Circuit Current4 VCC= 2.5V, VIN = VIH or VIL VO = 1.25V3 VCC= 2.5V, VIN = VIH or VIL VO = 1.25V3 VCC= Min VIN = VIH or VIL VCC= Max., VO = GND3 NOTES: 1. For conditions shown as Max or Min, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 2.5V, +25°C ambient. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. This parameter is guaranteed but not tested. 5. VOH = Vcc - 0.6V at rated current. 2.5V CMOS 1-TO-10 CLOCK DRIVER Notice: The information in this document is subject to change without notice. 4 of 11 V V mA ASM2P20807A June 2005 rev 0.2 Switching Characteristics Over Operating Range1,2 Following Conditions Apply Unless Otherwise Specified Industrial: TA = -40°C to +85°C, VCC = 2.5V ± 0.2V Conditions3 Symbol Parameter tPLH Propagation Delay Min Typ Max Unit - 3 3.5 nS CL= 22pF 100 MHz tPHL tR Output Rise Time - 1 1.25 nS tF Output Fall Time - 1 1.25 nS tSK(O) Same Device Output Pin-to-Pin Skew4 - 100 150 pS - 250 300 pS - 400 600 pS Min Typ Max Unit - 2.4 2.7 nS tSK(P) tSK(PP) 5 Pulse Skew 6 Part-to-Part Skew Symbol tPLH Parameter Conditions3,7 CL= 12pF Propagation Delay 150 MHz tPHL tR Output Rise Time - 1 1.2 nS tF Output Fall Time - 1 1.2 nS tSK(O) Same Device Output Pin-to-Pin Skew4 - 100 150 pS - 250 300 pS - 400 600 pS tSK(P) tSK(PP) 5 Pulse Skew 6 Part-to-Part Skew NOTES: 1. tPLH and tPHL are production tested. All other parameters guaranteed but not production tested. 2. Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delay limits do not imply skew. 3. See test circuits and waveforms. 4. Skew measured between all outputs under identical transitions and load conditions. 5. Skew measured is difference between propagation delay times tPHL and tPLH of same output under identical load conditions. 6. Part to part skew for all outputs given identical transitions and load conditions at identical VCC levels and temperature. 7. Airflow of 1m/s is recommended for frequencies above 133MHz. 2.5V CMOS 1-TO-10 CLOCK DRIVER Notice: The information in this document is subject to change without notice. 5 of 11 ASM2P20807A June 2005 rev 0.2 Test Circuits and Waveforms VCC O VOUT VIN D.U.T Pulse Generator CL CL = Load Capacitance: Includes Jig and Capacitance probe 2.5V 1.25V INPUT tPLH OV tPLH VOH 1.7 V 1.25 V 0.7 V OUTPUT tR VOL tF Propagation Delay 2.5V 1.25V INPUT OV tPLH tPLH VOH 1.25 V OUTPUT VOL tSK(p) =[ tPHL – tPLH ] Pulse Skew - tSK(P) 2.5V CMOS 1-TO-10 CLOCK DRIVER Notice: The information in this document is subject to change without notice. 6 of 11 ASM2P20807A June 2005 rev 0.2 2.5V 1.25V INPUT tPLH OV tPLHL 1 VOH 1.25 V OUTPUT 1 VOL tSK(O) tSK(O) VOH 1.25 V OUTPUT 2 VOL tPHL2 tPLH2 tSK(O) =[ tPLH2 – tPLH 1 ] or [tPHL2 - tPHL1 ] Output Skew - tSK(O) 2.5V 1.25V INPUT tPLH 1 tPLHL OV 1 VOH 1.25 V DEVICE 1 OUTPUT VOL tSK(t) tSK(t) VOH 1.25 V DEVICE 2 OUTPUT tPLH2 tPHL2 VOL DEVICE 2 OUTPUT tSK(t) =[ tPLH2 – tPLH 1 ] or [tPHL2 - tPHL1 ] Part-to-Part Skew - tSK(PP) NOTE: Device 1 and device 2 are same package type and speed grade. Test Conditions Symbol CL VCC = 2.5V ±0.2V 221 Unit pF 122 RT t R / tF Z OUT of pulse generator 1 1.25 Ω nS 2 1.2 DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. tR / tF = Rise/Fall time of the input stimulus from the Pulse Generator. NOTES: 1. Test conditions at 100MHz. 2. Test conditions at 150MHz. 2.5V CMOS 1-TO-10 CLOCK DRIVER Notice: The information in this document is subject to change without notice. 7 of 11 ASM2P20807A June 2005 rev 0.2 Package Information 20-lead SSOP ( 150 mil ) Package Dimensions Symbol Inches Min Max Millimeters Min Max A 0.053 0.069 1.346 1.753 A1 0.004 0.010 0.102 0.254 A2 …. 0.059 …. 1.499 D 0.337 0.344 8.560 8.738 c 0.007 0.012 0.178 0.274 E 0.228 0.244 5.791 6.198 E1 0.150 0.157 3.810 3.988 L 0.016 0.035 0.406 0.890 L1 0.010 BASIC 0.254 BASIC b 0.203 0.325 0.008 0.014 R1 0.003 …. 0.08 ….. a 0° 8° 0° 8° e 0.025 BASIC 0.635 BASIC 2.5V CMOS 1-TO-10 CLOCK DRIVER Notice: The information in this document is subject to change without notice. 8 of 11 ASM2P20807A June 2005 rev 0.2 20-lead QSOP Package Dimensions Symbol Inches Min Max Millimeters Min Max A 0.060 0.068 1.52 1.73 A1 0.004 0.008 0.10 0.20 b 0.009 0.012 0.23 0.30 c 0.007 0.010 0.18 0.25 D 0.337 0.344 8.56 8.74 E 0.150 0.157 3.81 3.99 e 0.025 BSC 0.64 BSC H 0.230 0.244 5.84 6.20 h 0.010 0.016 0.25 0.41 L 0.016 0.035 0.41 0.89 S 0.056 0.060 1.42 1.52 a 0° 8° 0° 8° 2.5V CMOS 1-TO-10 CLOCK DRIVER Notice: The information in this document is subject to change without notice. 9 of 11 ASM2P20807A June 2005 rev 0.2 Ordering Information Part Number Marking Package Type Temperature ASM2P20807A-20-AR 2P20807A 20-Pin SSOP, TAPE & REEL Commercial ASM2P20807A-20-AT 2P20807A 20-Pin SSOP, TUBE Commercial ASM2P20807A-20-DR 2P20807A 20-Pin QSOP, TAPE & REEL Commercial ASM2P20807A-20-DT 2P20807A 20-Pin QSOP, TUBE Commercial ASM2I20807AG-20-AR 2I20807AG 20-Pin SSOP, TAPE & REEL, Green Industrial ASM2I20807AG-20-AT 2I20807AG 20-Pin SSOP, TUBE, Green Industrial ASM2I20807AG-20-DR 2I20807AG 20-Pin QSOP, TAPE & REEL, Green Industrial ASM2I20807AG-20-DT 2I20807AG 20-Pin QSOP, TUBE, Green Industrial Device Ordering Information A S M 2 P 2 0 8 0 7 A G - 2 0 - A R R = Tape & reel, T = Tube or Tray O = SOT S = SOIC T = TSSOP A = SSOP V = TVSOP B = BGA Q = QFN U = MSOP E = TQFP L = LQFP U = MSOP P = PDIP D = QSOP X = SC-70 DEVICE PIN COUNT F = LEAD FREE AND RoHS COMPLIANT PART G = GREEN PACKAGE PART NUMBER X= Automotive I= Industrial P or n/c = Commercial (-40C to +125C) (-40C to +85C) (0C to +70C) 1 = Reserved 2 = Non PLL based 3 = EMI Reduction 4 = DDR support products 5 = STD Zero Delay Buffer 6 = Power Management 7 = Power Management 8 = Power Management 9 = Hi Performance 0 = Reserved ALLIANCE SEMICONDUCTOR MIXED SIGNAL PRODUCT Licensed under US patent Nos 5,488,627 and 5,631,920. 2.5V CMOS 1-TO-10 CLOCK DRIVER Notice: The information in this document is subject to change without notice. 10 of 11 ASM2P20807A June 2005 rev 0.2 Alliance Semiconductor Corporation 2595, Augustine Drive, Santa Clara, CA 95054 Tel# 408-855-4900 Fax: 408-855-4999 www.alsc.com Copyright © Alliance Semiconductor All Rights Reserved Advance Information Part Number: ASM2P20807A Document Version: v0.2 Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to Alliance Semiconductor, dated 11-11-2003 © Copyright 2003 Alliance Semiconductor Corporation. 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Alliance does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of Alliance products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use. 2.5V CMOS 1-TO-10 CLOCK DRIVER Notice: The information in this document is subject to change without notice. 11 of 11