TI1 BQ500212ARGZR Low system cost, wireless power controller for wpc tx a5 or a11 Datasheet

bq500212A
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SLUSBD6B – JULY 2013 – REVISED NOVEMBER 2013
Low System Cost, Wireless Power Controller for WPC TX A5 or A11
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FEATURES
DESCRIPTION
•
The bq500212A is a Qi-certified value solution that
integrates all functions required to control wireless
power delivery to a single WPC1.1 compliant
receiver. It is WPC1.1 compliant and designed for 5-V
systems as a wireless power consortium type A5 or
A11 transmitter. The bq500212A pings the
surrounding environment for WPC compliant devices
to be powered, safely engages the device, receives
packet communication from the powered device and
manages the power transfer according to WPC1.1
specification. To maximize flexibility in wireless power
control applications, Dynamic Power Limiting™ (DPL)
is featured on the bq500212A. Dynamic Power
Limiting™ enhances user experience by seamlessly
optimizing the usage of power available from limited
input supplies. The bq500212A supports both Foreign
Object Detection (FOD) and enhanced Parasitic
Metal Object Detection (PMOD) for legacy product by
continuously monitoring the efficiency of the
established power transfer, protecting from power lost
due to metal objects misplaced in the wireless power
transfer field. Should any abnormal condition develop
during power transfer, the bq500212A handles it and
provides indicator outputs. Comprehensive status and
fault monitoring features enable a low cost yet robust,
Qi-certified wireless power system design.
1
Proven, Qi-Certified Value Solution for
Transmit-Side Application
Lowest Device Count for Full WPC1.1 5-V
Solution
5-V Operation Conforms to Wireless Power
Consortium (WPC1.1) Type A5 or A11
Transmitter Specification
Fully WPC Compliant, Including Improved
Foreign Object Detection (FOD) Method
Permits X7R Type Resonant Capacitors for
Reduced Cost
Dynamic Power Limiting™ for USB and
Limited Source Operation
Digital Demodulation Reduces Components
LED Indication of Charging State and Fault
Status
Low Standby and High Efficiency
2
•
•
•
•
•
•
•
•
APPLICATIONS
•
Wireless Power Consortium (WPC1.1)
Compliant Wireless Chargers For:
– Qi-Certified Smart Phones and other
Handhelds
– Car and Other Vehicle Accessories
See www.ti.com/wirelesspower for More
Information on TI's Wireless Charging
Solutions
•
The bq500212A is available in a 48-pin, 7-mm x 7mm QFN package.
System Diagram and Efficiency Versus System Output Power
80
Current
Sense
5V
VIN
70
LDO
bq500212 A
Wireless
Power Controller
PWM
½ Bridge
Driver
Tank /Coil
Assembly
Communication
½ Bridge
Driver
Efficiency (%)
LED
60
50
40
30
20
10
0
0
0.5
1
1.5
2
2.5
3
3.5
4
Power (W)
4.5
5
C001
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Dynamic Power Limiting is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2013, Texas Instruments Incorporated
bq500212A
SLUSBD6B – JULY 2013 – REVISED NOVEMBER 2013
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION (1)
OPERATING
TEMPERATURE
RANGE, TA
ORDERABLE PART NUMBER
PIN COUNT
SUPPLY
PACKAGE
TOP SIDE
MARKING
BQ500212ARGZR
48 pin
Reel of 2500
QFN
BQ500212A
BQ500212ARGZT
48 pin
Reel of 250
QFN
BQ500212A
-40°C to 110°C
(1)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range (unless otherwise noted)
VALUE
MIN
MAX
Voltage applied at V33D to GND
–0.3
3.6
Voltage applied at V33A to GND
–0.3
3.6
–0.3
3.6
–40
150
Voltage applied to any pin
(2)
Storage temperature,TSTG
(1)
(2)
2
UNIT
V
°C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages referenced to GND.
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RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN
V
Supply voltage during operation, V33D, V33A
3.0
TA
Operating free-air temperature range
–40
TJ
Junction temperature
TYP MAX
3.3
UNIT
3.6
110
110
V
°C
THERMAL INFORMATION
bq500212A
THERMAL METRIC (1)
RGZ
UNITS
48 PINS
θJA
Junction-to-ambient thermal resistance (2)
28.4
θJCtop
Junction-to-case (top) thermal resistance (3)
14.2
(4)
θJB
Junction-to-board thermal resistance
ψJT
Junction-to-top characterization parameter (5)
0.2
ψJB
Junction-to-board characterization parameter (6)
5.3
θJCbot
Junction-to-case (bottom) thermal resistance (7)
1.4
(1)
(2)
(3)
(4)
(5)
(6)
(7)
5.4
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDECstandard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
The junction-to-top characterization parameter, ψJT, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θJA, using a procedure described in JESD51-2a (sections 6 and 7).
The junction-to-board characterization parameter, ψJB, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θJA , using a procedure described in JESD51-2a (sections 6 and 7).
The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific
JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
Spacer
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ELECTRICAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
V33A = 3.3 V
8
15
V33D = 3.3 V
44
55
V33D = V33A = 3.3 V
52
60
3.3
3.6
4
4.6
UNIT
SUPPLY CURRENT
IV33A
IV33D
Supply current
ITOTAL
mA
INTERNAL REGULATOR CONTROLLER INPUTS/OUTPUTS
V33
3.3-V linear regulator
V33FB
3.3-V linear regulator feedback
IV33FB
Series pass base drive
Beta
Series NPN pass device
Emitter of NPN transistor
3.25
VIN = 12 V; current into V33FB pin
10
V
mA
40
EXTERNALLY SUPPLIED 3.3 V POWER
V33D
Digital 3.3-V power
TA = 25°C
3
3.6
V33A
Analog 3.3-V power
TA = 25°C
3
3.6
V33Slew
V33 slew rate
V33 slew rate between 2.3 V and 2.9 V,
V33A = V33D
0.25
V
V/ms
DIGITAL DEMODULATION INPUTS COMM_A+, COMM_A-, COMM_B+, COMM_BVbias
COMM+ Bias Voltage
COMM+,
COMM-
1.5
Modulation voltage digital resolution
REA
Input impedance
Ground reference
0.5
IOFFSET
Input offset current
1-kΩ source impedance
–5
V
1
1.5
mV
3
MΩ
5
µA
0.36
V
ANALOG INPUTS V_SENSE, I_SENSE, T_SENSE, LED_MODE, LOSS_THR, SNOOZE_CAP, PWR_UP
VADDR_OPEN
Voltage indicating open pin
LED_MODE open
VADDR_SHORT
Voltage indicating pin shorted to GND
LED_MODE shorted to ground
VADC_RANGE
Measurement range for voltage monitoring
ALL ANALOG INPUTS
INL
ADC integral nonlinearity
RIN
Input impedance
CIN
Input capacitance
Ground reference
2.37
0
2.5
-2.5
2.5
8
mV
MΩ
10
pF
DIGITAL INPUTS/OUTPUTS
DGND1
+ 0.25
VOL
Low-level output voltage
IOL = 6 mA , V33D = 3 V
VOH
High-level output voltage
IOH = -6 mA , V33D = 3 V
VIH
High-level input voltage
V33D = 3V
VIL
Low-level input voltage
V33D = 3.5 V
IOH(MAX)
Output high source current
4
IOL(MAX)
Output low sink current
4
V33D
- 0.6V
2.1
V
3.6
1.4
mA
SYSTEM PERFORMANCE
VRESET
Voltage where device comes out of reset
V33D Pin
tRESET
Pulse width needed for reset
RESET pin
fSW
Switching Frequency
4
2.4
2
112
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V
µs
205
kHz
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SLUSBD6B – JULY 2013 – REVISED NOVEMBER 2013
DEVICE INFORMATION
Functional Block Diagram
bq500212A
LED Control /
Low Power
Interface
COMM_A+ 37
COMM_A- 38
COMM_B+ 39
6
SLEEP
7
LED_A
8
LED_B
9
SNOOZE
15 FOD_CAL
18 LED_C
Digital
Demodulation
16 PMOD
17 FOD
COMM_B- 40
12 PWM-A
Controller
PWM
13 PWM-B
PEAK_DET
1
V_SENSE 46
I_SENSE 42
T_SENSE
2
12-bit
ADC
23 BUZ_AC
Buzzer
Control
24 BUZ_DC
LOSS_THR 43
LED_MODE 44
SNOOZE_CAP
POR
11 DATA
I2C
3
10 CLK
5
RESET
UDG-13118
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COMM_A+
COMM_B-
I_SENSE
PWR_UP
V_SENSE
37
36
GND
48 47 46 45 44 43 42 41 40 39 38
ADCREF
COMM_A-
COMM_B+
RESERVED
LOSS_THR
LED_MODE
RGZ Package
(Top View)
GND
PEAK_DET
1
T_SENSE
2
35
BPCAP
SNOOZE_CAP
3
34
V33A
N/C
4
33
V33D
RESET
5
32
GND
SLEEP
6
31
GND
bq500212A
RESERVED
CLK
10
27
RESERVED
DATA
11
26
RESERVED
25
12
13 14 15 16 17 18 19 20 21 22 23 24
RESERVED
PWM_B
PWM_A
6
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BUZ_DC
28
BUZ_AC
9
SNOOZE_CHG
SNOOZE
DOUT_TX
RESERVED
RESERVED
29
RESERVED
8
LED_C
LED_B
FOD
RESERVED
PMOD
30
FOD_CAL
7
RESERVED
LED_A
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PIN FUNCTIONS
PIN
NO.
1
2
3
4
NAME
I/O
DESCRIPTION
PEAK_DET
I
Connected to peak detect circuit. Protects from coil overvoltage event.
T_SENSE
I
Sensor Input. Device shuts down when below 1 V for longer than 150ms. If not used, keep
above 1 V by connecting to the 3.3-V supply.
SNOOZE_CAP
I
Connected to interval timing capacitor
N/C
I
Not used. Can be left open. Can also be tied to GND and flooded with copper to improve
GND plane.
5
RESET
I
Device reset. Use a 10-kΩ to 100-kΩ pull-up resistor to the 3.3-V supply.
6
SLEEP
O
Connected to 5 s interval circuit
7
LED_A
I
Connect to an LED via 470-Ω resistor for status indication.
8
LED_B
I
Connect to an LED via 470-Ω resistor for status indication.
9
SNOOZE
O
Connected to 500ms ping interval circuit
10
CLK
I/O
10-kΩ pull-up resistor to 3.3-V supply. For factory use only.
11
DATA
I/O
10-kΩ pull-up resistor to 3.3-V supply. For factory use only.
PWM_A
O
PWM Output A, controls one half of the full bridge in a phase-shifted full bridge. Switching
deadtimes must be externally generated.
PWM_B
O
PWM Output B, controls other half of the full bridge in a phase-shifted full bridge. Switching
deadtimes must be externally generated.
14
RESERVED
O
Reserved. Leave open.
15
FOD_CAL
O
FOD Calibration pin. It controls the FOD calibration setting at startup.
PMOD
O
Set the threshold used to detect a PMOD condition by connecting, via resistor, to pin 43.
Leave open to disable PMOD.
FOD
O
Set the threshold used to detect an FOD condition by connecting, via resistor, to pin 43.
Leave open to disable FOD.
18
LED_C
O
Connect to an LED via 470-Ω resistor for status indication.
19
RESERVED
O
Reserved, leave this pin open.
20
RESERVED
I
Reserved, connect to GND.
21
DOUT_TX
I
Not used. Leave this pin open.
22
SNOOZE_CHG
I
Connected to interval timing capacitor.
23
BUZ_AC
O
AC Buzzer Output. Outputs a 400-ms, 4-kHz AC pulse when charging begins.
BUZ_DC
O
DC Buzzer Output. Outputs a 400-ms DC pulse when charging begins. This could also be
connected to an LED via 470-Ω resistor.
25
RESERVED
I/O
Not used, leave this pin open.
26
RESERVED
I/O
Not used, leave this pin open.
27
RESERVED
I/O
Reserved, leave this pin open.
28
RESERVED
I/O
Reserved, leave this pin open.
29
RESERVED
I/O
Reserved, leave this pin open.
30
RESERVED
I/O
Reserved, leave this pin open.
31
GND
I/O
Reserved, connect to GND.
12
13
16
17
24
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PIN FUNCTIONS (continued)
PIN
NO.
32
33
34
GND
V33D
V33A
I/O
DESCRIPTION
—
GND.
—
Digital core 3.3-V supply. Be sure to decouple with bypass capacitors as close to the part as
possible.
—
Analog 3.3-V Supply. This pin can be derived from V33D supply, decouple with 10-Ω resistor
and additional bypass capacitors
35
BPCAP
—
Bypass capacitor for internal 1.8-V core regulator. Connect bypass capacitor to GND.
36
GND
—
GND.
37
COMM_A+
I
Digital demodulation non-inverting input A, connect parallel to input B+.
38
COMM_A-
I
Digital demodulation inverting input A, connect parallel to input B-.
39
COMM_B+
I
Digital demodulation non-inverting input B, connect parallel to input A+.
40
COMM_B-
I
Digital demodulation inverting input B, connect parallel to input A-.
41
RESERVED
O
Reserved, leave this pin open.
I
Transmitter input current, used for efficiency calculations. Use 20-mΩ sense resistor and
A=50 gain current sense amplifier.
42
I_SENSE
43
LOSS_THR
I
Input to program FOD/PMOD thresholds and FOD_CAL correction.
44
LED_MODE
I
Input to select from four LED modes.
45
PWR_UP
I
Connected to external test circuit or LED drive circuit.
I
Transmitter input voltage, used for efficiency calculations. Use 76.8-kΩ to 10-kΩ divider to
minimize quiescent current.
46
8
NAME
V_SENSE
47
GND
48
ADCREF
49
EPAD
—
I
—
GND.
External Reference Voltage Input. Connect this input to GND.
Flood with copper GND plane and stitch vias to PCB internal GND plane.
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Principles of Operation
Fundamentals
The principle of wireless power transfer is simply an open cored transformer consisting of primary and secondary
coils and associated electronics. The primary coil and electronics are also referred to as the transmitter, and the
secondary side the receiver. The transmitter coil and electronics are typically built into a charger pad. The
receiver coil and electronics are typically built into a portable device, such as a cell-phone.
When the receiver coil is positioned on the transmitter coil, magnetic coupling occurs when the transmitter coil is
driven. The flux is coupled into the secondary coil which induces a voltage, current flows, it is rectified and power
can be transferred quite effectively to a load - wirelessly. Power transfer can be managed via any of various
familiar closed-loop control schemes.
Wireless Power Consortium (WPC)
The Wireless Power Consortium (WPC) is an international group of companies from diverse industries. The WPC
standard was developed to facilitate cross compatibility of compliant transmitters and receivers. The standard
defines the physical parameters and the communication protocol to be used in wireless power. For more
information, go to www.wirelesspowerconsortium.com.
Power Transfer
Power transfer depends on coil coupling. Coupling is dependant on the distance between coils, alignment, coil
dimensions, coil materials, number of turns, magnetic shielding, impedance matching, frequency and duty cycle.
Most importantly, the receiver and transmitter coils must be aligned for best coupling and efficient power transfer.
The closer the space between the coils, the better the coupling, but the practical distance is set to be less than 5
mm (as defined within the WPC Specification) to account for housing and interface surfaces.
Shielding is added as a backing to both the transmitter and receiver coils to direct the magnetic field to the
coupled zone. Magnetic fields outside the coupled zone do not transfer power. Thus, shielding also serves to
contain the fields to avoid coupling to other adjacent system components.
Regulation can be achieved by controlling any one of the coil coupling parameters. For WPC compatibility, the
transmitter coils and capacitance are specified and the resonant frequency point is fixed at 100 kHz. Power
transfer is regulated by changing the operating frequency between 110 kHz to 205 kHz. The higher the
frequency, the further from resonance and the lower the power. Duty cycle remains constant at 50% throughout
the power band and is reduced only once 205 kHz is reached.
The WPC standard describes the dimension and materials of the coils. It also has information on tuning the coils
to resonance. The value of the inductor and resonant capacitor are critical to proper operation and system
efficiency.
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Communication
Communication within the WPC is from the receiver to the transmitter, where the receiver tells the transmitter to
send power and how much. In order to regulate, the receiver must communicate with the transmitter whether to
increase or decrease frequency. The receiver monitors the rectifier output and using Amplitude Modulation (AM),
sends packets of information to the transmitter. A packet is comprised of a preamble, a header, the actual
message and a checksum, as defined by the WPC standard.
The receiver sends a packet by modulating an impedance network. This AM signal reflects back as a change in
the voltage amplitude on the transmitter coil. The signal is demodulated and decoded by the transmitter side
electronics and the frequency of its coil drive output is adjusted to close the regulation loop. The bq500212A
features internal digital demodulation circuitry.
The modulated impedance network on the receiver can either be resistive or capacitive. Figure 1 shows the
resistive modulation approach, where a resistor is periodically added to the load and also shows the resulting
change in resonant curve which causes the amplitude change in the transmitter voltage indicated by the two
operating points at the same frequency. Figure 2 shows the capacitive modulation approach, where a capacitor
is periodically added to the load and also shows the resulting amplitude change in the transmitter voltage.
Rectifier
Receiver Coil
Receiver
Capacitor
Amax
Modulation
Resitor
Operating state at logic “0”
A(0)
Operating state at logic “1”
A(1)
Comm
Fsw
a)
F, kHz
b)
Figure 1. Receiver Resistive Modulation Circuit
Rectifier
Receiver Coil
Receiver
Capacitor
Modulation
Capacitors
Amax
Comm
A(0)
Operating state at logic “ 0”
A(1)
Operating state at logic “ 1”
Fsw
F, kHz
Fo(1) < Fo(0)
a)
b)
Figure 2. Receiver Capacitive Modulation Circuit
10
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Application Information
Coils and Matching Capacitors
The coil and matching capacitor selection for the transmitter has been established by WPC standard. These
values are fixed and cannot be changed on the transmitter side.
An up to date list of available and compatible A5 or A11 transmitter coils can be found here (Texas Instruments
Literature Number SLUA649):
Capacitor selection is critical to proper system operation. A total capacitance value of 400 nF is required in the
resonant tank. A 400-nF capacitor is not a standard value and therefore several must be combined in parallel. It
is recommended to use 4 x 100nF, as these are very commonly available.
NOTE
A total capacitance value of 400 nF/50 V is required in the resonant tank to achieve a 100kHz resonance frequency.
To achieve the 400nF total capacitance in the resonant tank, the bq500212A sensitive demodulation circuitry
allows the use of three (3) lower cost 100nF/X7R type capacitors in parallel with one (1) high quality 100nF/C0G
type, thereby reducing system cost from competitive solutions requiring four C0G types.
The capacitors chosen must be rated for 50 V operation. Use quality capacitors from reputable vendors such as
KEMET, MURATA or TDK.
Dynamic Power Limiting™
Dynamic Power Limiting™ (DPL) allows operation from a 5-V supply with limited current capability (such as a
USB port). When the input voltage is observed drooping, the output power is dynamically limited to reduce the
load and provides margin relative to the supply’s capability.
Anytime the DPL control loop is regulating the operating point of the transmitter, the LED will indicate that DPL is
active. The LED color and flashing pattern are determined by the LED Table. If the receiver sends a Control
Error Packet (CEP) with a negative value, (for example, to reduce power to the load), the WPTX in DPL mode
will respond to this CEP via the normal WPC control loop.
NOTE
The power limit indication depends on the LED_MODE selected.
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Option Select Pins
Several pins on the bq500212A are allocated to programming the FOD and PMOD Loss Threshold and the LED
mode of the device. At power up, a bias current is applied to pins LED_MODE and LOSS_THR and the resulting
voltage measured in order to identify the value of the attached programming resistor. The values of the operating
parameters set by these pins are determined using Table 2. For LED_MODE, the selected bin determines the
LED behavior based on Table 1; for the LOSS_THR, the selected bin sets a threshold used for parasitic metal
object detection (see Parasitic Metal Detection (PMOD) and Foreign Object Detection (FOD) section). Table 1.
bq500212A
LED_MODE
44
Resistors
to set
options
LOSS_THR
To 12-bit ADC
43
FOD
PMOD
FOD_CAL
17
16
15
UDG-13119
Figure 3. Option Select Pin Programming
LED Indication Modes
The bq500212A can directly drive up to three (3) LED outputs (pin 7, pin 8 and pin 18) through a simple current
limit resistor (typically 470 Ω), based on the mode selected. The current limit resistors can be individually
adjusted to tune or match the brightness of the LEDs. Do not exceed the maximum output current rating of the
device. The resistor in Figure 3 connected to pin 44 and GND selects the desired LED indication scheme in
Table 1.
• LED modes permit the use of one to three indicator LED's. Amber in the 2-LED mode is obtained by turning
on both the green and red.
• LEDs can be turned on solid or configured to blink either slow (approx. 1.6s period) or fast (approx. 400ms
period).
• Except in modes 2 and 9, the charge complete state is only maintained for 5 seconds after which it reverts to
idle. This permits the processor to sleep in order to reduce standby power consumption. In other modes,
external logic, such as a flip-flop, may be implemented to maintain the charge complete indication if desired.
12
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Table 1. LED Modes
OPERATIONAL STATES
LED
CONTROL
OPTION
LED
SELECTION
RESISTOR
X
< 36.5 kΩ
DESCRIPTION
STANDBY
POWER
TRANSFER
CHARGE
COMPLETE
FAULT
DYNAMIC
POWER
LIMITING™
FOD Warning
-
-
-
-
-
-
LED1, green
Off
Blink slow
On
Off
Blink slow
Off
LED2, red
Off
Off
Off
On
Blink slow
Blink fast
LED
LED1, green
Reserved, do not use
LED2, red
LED3, amber
1
2
3
4
5
6
7
8
9
10
42.2 kΩ
48.7 kΩ
56.2 kΩ
64.9 kΩ
75 kΩ
86.6 kΩ
100 kΩ
115 kΩ
133 kΩ
154 kΩ
Choice number 1
Choice number 2
Choice number 3
Choice number 4
Choice number 5
Choice number 6
Choice number 7
Choice number 8
Choice number 9
Choice number 10
LED3, amber
-
-
-
-
-
-
LED1, green
On
Blink slow
On
Off
Blink slow
Off
Blink fast
LED2, red
On
Off
Off
On
Blink slow
LED3, amber
-
-
-
-
-
-
LED1, green
Off
On
Off
Blink fast
On
On
-
LED2, red
-
-
-
-
-
LED3, amber
-
-
-
-
-
-
LED1, green
Off
On
Off
Off
Off
Off
Blink fast
LED2, red
Off
Off
Off
On
Blink slow
LED3, amber
-
-
-
-
-
-
LED1, green
Off
Off
On
Off
Off
Off
LED2, red
Off
On
Off
Off
On
On
LED3, amber
Off
Off
Off
Blink slow
Off
Off
LED1, green
Off
Blink slow
On
Off
Off
Off
LED2, red
Off
Off
Off
On
Off
Blink fast
LED3, amber
Off
Off
Off
Off
Blink Slow
Off
LED1, green
Off
Blink slow
Off
Off
Off
Off
LED2, red
Off
Off
On
Off
Off
Off
LED3, amber
Off
Off
Off
On
Blink slow
Blink fast
LED1, green
Off
Off
On
Blink slow
Off
Off
LED2, red
Off
On
Off
Blink slow
On
On
LED3, amber
-
-
-
-
-
-
LED1, green
Off
Blink slow
On
Off
Blink slow
Off
Blink fast
LED2, red
Off
Off
Off
On
Blink slow
LED3, amber
-
-
-
-
-
-
LED1, green
Off
On
Off
Blink fast
Blink slow
On
LED2, red
Off
Off
On
Off
Off
Off
LED3, amber
-
-
-
-
-
-
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13
bq500212A
SLUSBD6B – JULY 2013 – REVISED NOVEMBER 2013
www.ti.com
Parasitic Metal Object Detect (PMOD), Foreign Object Detection (FOD) and FOD Calibration
The bq500212A supports improved FOD (WPC1.1) and enhanced PMOD (WPC 1.0) features. Continuously
monitoring input power, known losses, and the value of power reported by the RX device being charged, the
bq500212A can estimate how much power is unaccounted for and presumed lost due to metal objects placed in
the wireless power transfer path. If this unexpected loss exceeds the threshold set by the FOD or PMOD
resistors, a fault is indicated and power transfer is halted. Whether the FOD or the PMOD algorithm is used is
determined by the ID packet of the receiver being charged.
As the default, both PMOD and FOD resistors should set a threshold of 400 mW (selected by 56.2-kΩ resistors
from FOD (pin 17) and PMOD(pin16) to LOSS_THR (pin43)). 400 mW has been empirically determined using
standard WPC FOD test objects (disc, ring and foil). Some tuning might be required as every system will be
slightly different. This tuning is best done by trial and error, use the set resistor values given in the table to
increase or decrease the loss threshold and retry the system with the standard test objects. The ultimate goal of
the FOD feature is safety; to protect misplaced metal objects from becoming hot. Reducing the loss threshold
and making the system too sensitive will lead to false trips and a bad user experience. Find the balance which
best suits the application.
If the application requires disabling one function or the other (or both), it is possible by leaving the respective
FOD/PMOD pin open. For example, to selectively disable the PMOD function, PMOD (pin16) should be left open.
NOTE
Disabling FOD results in a TX solution that is not WPC compliant.
Resistors of 1% tolerance should be used for a reliable selection of the desired threshold.
The FOD and PMOD resistors (pin17 and pin16) program the permitted power loss for the FOD and PMOD
algorithms respectively. The FOD_CAL resistor (pin15), can be used to compensate for any load dependent
effect on the power loss. Using a calibrated test receiver with no foreign objects present, the FOD_CAL resistor
should be selected such that the calculated loss across the load range is substantially constant (within ~100
mW). After correcting for the load dependence, the FOD and PMOD thresholds should be re-set above the
resulting average by approximately 400 mW in order for the transmitter to satisfy the WPC requirements on
tolerated heating. Please contact TI for more information about setting appropriate FOD, PMOD, and FOD_CAL
resistor values for your design.
Table 2. Option Select Bins
14
BIN NUMBER
RESISTANCE (kΩ)
LOSS THRESHOLD
(mW)
0
<36.5
250
1
42.2
300
2
48.7
350
3
56.2
400
4
64.9
450
5
75.0
500
6
86.6
550
7
100
600
8
115
650
9
133
700
10
154
750
11
178
800
12
205
850
13
>237
Feature Disabled
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SLUSBD6B – JULY 2013 – REVISED NOVEMBER 2013
Shut Down via External Thermal Sensor or Trigger
Typical applications of the bq500212A will not require additional thermal protection. This shutdown feature is
provided for enhanced applications and is not only limited to thermal shutdown. The key parameter is the 1.0 V
threshold on pin 2. Voltage below 1.0 V on pin 2 for longer than 150ms causes the device to shutdown.
The application of thermal monitoring via a Negative Temperature Coefficient (NTC) sensor, for example, is
straightforward. The NTC forms the lower leg of a temperature dependant voltage divider. The NTC leads are
connected to the bq500212A device, pin 2 and GND. The threshold on pin 2 is set to 1.0 V, below which the
system shuts down and a fault is indicated (depending on LED mode chosen).
To implement this feature follow these steps:
1) Consult the NTC datasheet and find the resistence vs temperature curve.
2) Determine the actual temperature where the NTC will be placed by using a thermal probe.
3) Read the NTC resistance at that temperature in the NTC datasheet, that is R_NTC.
4) Use the following formula to determine the upper leg resistor (R_Setpoint):
R _ Setpoint = 2.3 ´ R _ NTC
(1)
The system will restore normal operation after approximately five minutes or if the receiver is removed. If the
feature is not used, this pin must be pulled high.
NOTE
Pin 2 must always be terminated, else erratic behavior may result.
3V3_VCC
Optional
Temperature
Sensor
R_Setpoint
T_SENSE
NTC
2
AGND
AGND
Figure 4. Negative Temperature Coefficient (NTC) Application
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bq500212A
SLUSBD6B – JULY 2013 – REVISED NOVEMBER 2013
www.ti.com
Fault Handling and Indication
The following table provides approximate durations for the time before a retry is attempted for End Power
Transfer (EPT) packets and fault events. Precise timing may be affected by external components, or shortened
by receiver removal. The LED mode selected determines how the LED indicates the condition or fault.
CONDITION
DURATION
(before retry)
EPT-00
Immediate
Unknown
EPT-01
5 seconds
Charge complete
HANDLING
EPT-02
Infinite
Internal fault
EPT-03
5 minutes
Over temperature
EPT-04
Immediate
Over voltage
EPT-05
Immediate
Over current
EPT-06
Infinite
Battery failure
EPT-07
Not applicable
Reconfiguration
EPT-08
Immediate
No response
OC (over current)
1 minute
NTC (external sensor)
5 minutes
PMOD/FOD warning
12 seconds
PMOD/FOD
5 minutes
10 seconds LED only,
2 seconds LED +
buzzer
Power Transfer Start Signal
The bq500212A features two signal outputs to indicate that power transfer has begun. Pin 23 outputs a 400-ms
duration, 4-kHz square wave for driving low cost AC type ceramic buzzers. Pin 24 outputs logic high, also for 400
ms, which is suitable for DC type buzzers with built-in tone generators, or as a trigger for any type of customized
indication scheme. If not used, these pins can be left open.
Power-On Reset
The bq500212A has an integrated Power-On Reset (POR) circuit which monitors the supply voltage and handles
the correct device startup sequence. Additional supply voltage supervisor or reset circuits are not needed.
External Reset, RESET Pin
The bq500212A can be forced into a reset state by an external circuit connected to the RESET pin. A logic low
voltage on this pin holds the device in reset. For normal operation, this pin is pulled up to 3.3 VCC with a 10-kΩ
pull-up resistor.
Low Power Mode
During standby, when nothing is on the transmitter pad, the bq500212A pings the surrounding environment at
fixed intervals. The ping interval can be adjusted; the component values selected for the SNOOZE circuit
determine this interval between pings. The choice of the ping interval effects two quantities: the idle efficiency of
the system, and the time required to detect the presence of a receiver when it is placed on the pad. A trade off
should be made which balances low power (longest ping interval) with good user experience (quick detection
through short ping interval) while still meeting the WPC requirement for detection within 0.5 seconds.
The system power consumption is approximately 300 mW during an active ping, which lasts approximately 90
ms, and 40 mW for the balance of the cycle. A weighted average can thus be used to estimate the overall
system’s idle consumption:
If T_ping is the interval between pings in ms, P_idle in mW is approximately:
(40 x (T_ping – 90) + 300 x 90)/T_ping
16
(2)
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SLUSBD6B – JULY 2013 – REVISED NOVEMBER 2013
Trickle Charge and CS100
The WPC specification provides an End-of-Power Transfer message (EPT–01) to indicate charge complete.
Upon receipt of the charge complete message, the bq500212A will change the LED indication. The exact
indication depends on the LED_MODE chosen.
In some battery charging applications there is a benefit to continue the charging process in trickle-charge mode
to top off the battery. There are several information packets in the WPC specification related to the levels of
battery charge (Charge Status). The bq500212A uses these commands to enable top-off charging. The
bq500212A changes the LED indication to reflect charge complete when a Charge Status message is 100%
received, but unlike the response to an EPT, it will not halt power transfer while the LED is solid green. The
mobile device can use a CS100 packet to enable trickle charge mode.
If the reported charge status drops below 90% normal, charging indication will be resumed.
Current Monitoring Requirements
The bq500212A is WPC1.1 ready. In order to enable the FOD or PMOD features, current monitoring circuitry
must be provided in the application design.
For proper scaling of the current monitor signal, the current sense resistor should be 20 mΩ and the current
shunt amplifier should have a gain of 50, such as the INA199A1. For FOD accuracy, the current sense resistor
must be a quality component with 1% tolerance, at least 1/4-Watt rating, and a temperature stability of ±200
PPM. Proper current sensing techniques in the application hardware should also be observed.
If WPC compliance is not required current monitoring can be omitted. Connect the I_SENSE pin (pin 42) to GND.
All Unused Pins
All unused pins can be left open unless otherwise indicated. Pin 4 can be tied to GND and flooded with copper to
improve ground shielding. Please refer to the pin definition table for further explanations.
Design Checklist for WPC1.1 Compliance with the bq500212A
•
•
•
•
Coil and capacitor selection matches the A5/A11 specification.
Total 400-nF resonant capacitor requirement is composed of: (3 x 100nF/X7R) + (1 x 100nF/C0G) types.
Precision current sense amp used, such as the INA199A1. This is required for accurate FOD operation.
Current shunt resistor 1% and <200 PPM. This is required for accurate FOD operation.
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17
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D4
R12
NoPop
COMM+
N/C
C11
D5-A
A
K
NoPop
K
A
D5-B
R16 475
R8
10k
15.4k
R10
C24
4.7nF
K
A
D9-A
R50
475
LED_B
LED_A
VIN
JP1
D7
10uF
10K
R5
C4
1
523k
RESET
37 COMM_A+
38 COMM_A39 COMM_B+
40 COMM_B-
18 LED_C
21 UNUSED
22 SNOOZE_CHG
46 V_SENSE
45 PWR_UP
42 I_SENSE
6
7 SLEEP
8 LED_A
LED_B
9
SNOOZE
4
3 AIN8
2 SNOOZE_CAP
1 T_SENSE
PEAK_DET
5
41 RESERVED
48 ADCREF
AGND
Q4
R6
22
R18
10.0k
3 EN
1.0uF
C3
JP3
56.2k
R2
LED_MODE44
43
LOSS_THR
UNUSED 26
UNUSED 25
BUZ_DC 24
BUZ_AC 23
12
PWM_A
PMB_B 13
LOAD_FET 14
UNUSED 15
FOD 16
PMOD 17
U1
BQ500212A
RESERVED20
RESERVED19
DATA 11
10
CLK
BPCAP 35
~RESERVED31
RESERVED30
RESERVED29
RESERVED28
RESERVED27
4.7uF
C5
3V3_ADC
C10
R23
56.2k
TP25
TP26
TP23
TP24
TP12
JP2
R24
NoPop
TMS
TDI R43
TDO
TCK 10.0k
R27
NoPop
TP1
R47
10.0
R3
10.0
10.0k 10.0k
R40
R41
C27
0.01uF
3V3_VCC
R26
1.00
3V3_VCC
C78
0.1uF
/TRST
3V3_VCC
R71
1.00k
REF
GND
V+
C69
0.1uF
R20
1.00
R69
0.020
VIN
U17
INA199A1
I_SENSE
C9
4.7uF
1.0uF C20
2.2uF
SNOOZE
NC 4
OUT 5
U5
TLV71333
2 GND
1 IN
SNOOZE_CAP
TP10
523k
R30
C22 BSS138
2.2uF
Parts with no values are not installed
COMM+
COMM-
SNOOZE_CHG
LED_C
TP18
SLEEP
LED_A
LED_B
SNOOZE
PWR_UP
I_SENSE
4.7uF
C1 1.0uF
C19
R25
1.0MEG
R28
3V3_VCC
4.7uF
C12
C32X
10uF
SNOOZE_CAP
R19
10.0k
D6
BAT54SW
5.1MEG
R53
C32
BAT54SW
R52
10.0k
Q7
BSS138
4700pF
LED_C
2.00k
R11
475
R33
SLEEP
Temp Sensor
SNOOZE_CHG
GND
AGND
C6
4.7uF
10V
GND-TIE
IN
R15
475
AGND
5 Vin
V33A 34
DC Jack or USB
C13
4.7uF
V33D 33
47 GND
36 GND
32 GND
49 PAD
18
IN+
OUT
IN-
VIN
DPWM-1A
DATA
CLK
DPWM-1B
R48
3.6k
TP17
AGND
R4
3.6k
TP16
5 VIN
VDD 2
COMM-
COMM+
VSW 4
PGND 3
GND
PGND
9
6 BOOT_R
C29 7
BOOT
3V3_VCC
GND
C21
10uF
25V
50V
0.1uF
SKIP# 1
U2
CSD97376CQ4M
8 PWM
DPWM-1A
R13
10R
R29
10R
C2
1.0uF
16V
GND
VIN
C14
33pF
50V
R14
12.1K
3V3
C17
100nF
C15
100nF
C7
100nF
C16
100nF
AGND AGND
R9
10K
R1
100K
C18
4.7nF
50V
COIL
AGND
D1
BAT54SW
GND
C23
1.0uF
16V
VIN
4 VSW
BOOT 7
PGND
9
VIN 5
BOOT_R 6
GND
3 PGND
2 VDD
PWM 8
C28
GND
C31
10uF
25V
50V
0.1uF
DPWM-1B
U3
CSD97376CQ4M
1 SKIP#
bq500212A
SLUSBD6B – JULY 2013 – REVISED NOVEMBER 2013
www.ti.com
APPLICATION INFORMATION
Overview
The application schematic for the transmitter with reduced standby power is shown in Figure 5.
CAUTION
Please check the bq500212A product page for the most up-to-date application
schematic and list of materials package before starting a new design.
Figure 5. bq500121A Schematic
Copyright © 2013, Texas Instruments Incorporated
bq500212A
www.ti.com
SLUSBD6B – JULY 2013 – REVISED NOVEMBER 2013
Input Regulator
The bq500212A requires 3.3 VDC to operate. A buck regulator or a linear regulator can be used to step down
from the 5-V system input. Either choice is fully WPC compatible, the decision lies in the user's requirements with
respect to cost or efficiency.
For lowest cost the TLV70033 linear regulator is recommended.
Power Train
The bq500212A drives a phase-shifted full bridge. This is essentially twin half bridges and the choice of driver
devices is quite simple; a pair of CSD97376 Integrated Power Stages are used. Other combinations using
discrete driver and MOSFETs can work and system performance with regards to efficiency and EMI emissions
will vary. Any alternate MOSFETs chosen must be fully saturated at the 5-V system gate drive voltage available
and be sure to pay attention whether or not to use gate resistors; some tuning might be required.
PCB Layout
A good PCB layout is critical to proper system operation and due care should be taken. There are many
references on proper PCB layout techniques.
Generally speaking, the system layout will require a 4-layer PCB layout, although a 2-layer PCB layout can be
achieved. A proven and recommended approach to the layer stack-up has been:
• Layer 1, component placement and as much ground plane as possible.
• Layer 2, clean ground.
• Layer 3, finish routing.
• Layer 4, clean ground.
Thus, the circuitry is virtually sandwiched between grounds. This minimizes EMI noise emissions and also
provides a noise free voltage reference plane for device operation.
Keep as much copper as possible. Make sure the bq500212A GND pins and the power pad have a continuous
flood connection to the ground plane. The power pad should also be stitched to the ground plane, which also
acts as a heat sink for the bq500212A. A good GND reference is necessary for proper bq500212A operation,
such as analog-digital conversion, clock stability and best overall EMI performance.
Separate the analog ground plane from the power ground plane and use only one tie point to connect grounds.
Having several tie points defeats the purpose of separating the grounds.
The COMM return signal from the resonant tank should be routed as a differential pair. This is intended to reduce
stray noise induction. The frequencies of concern warrant low-noise analog signaling techniques, such as
differential routing and shielding, but the COMM signal lines do not need to be impedance matched.
Typically a single chip controller solution with integrated power FET and synchronous rectifier will be used. To
create a tight loop, pull in the buck inductor and power loop as close as possible. Likewise, the power-train, fullbridge components should be pulled together as tight as possible. See the bq500212AEVM-550, bqTESLA
Wireless Power TX EVM User's Guide (Texas Instruments Literature Number SLVU536) for layout examples.
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bq500212A
SLUSBD6B – JULY 2013 – REVISED NOVEMBER 2013
www.ti.com
References
1. Building a Wireless Power Transmitter, Application Report, (Texas Instruments Literature Number, SLUA635)
2. Technology, Wireless Power Consortium, www.wirelesspowerconsortium.com
3. An Introduction to the Wireless Power Consortium Standard and TI’s Compliant Solutions, (Johns Bill, Texas
Instruments)
4. Integrated Wireless Power Supply Receiver, Qi (Wireless Power Consortium), BQ51013 Datasheet, (Texas
Instruments Literature Number, SLUSAY6)
REVISION HISTORY
Changes from Original (July) to Revision A
•
Page
Changed marketing status from Product Preview to Production Data. ................................................................................ 1
Changes from Revision A (August, 2013) to Revision B
•
20
Page
Changed WPC1 to WPC1.1 throughout the document. ....................................................................................................... 1
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PACKAGE OPTION ADDENDUM
www.ti.com
4-Nov-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
BQ500212ARGZR
ACTIVE
VQFN
RGZ
48
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 110
BQ500212A
BQ500212ARGZT
ACTIVE
VQFN
RGZ
48
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 110
BQ500212A
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
4-Nov-2013
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Nov-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
BQ500212ARGZR
VQFN
RGZ
48
2500
330.0
16.4
7.3
7.3
1.5
12.0
16.0
Q2
BQ500212ARGZT
VQFN
RGZ
48
250
180.0
16.4
7.3
7.3
1.5
12.0
16.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Nov-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
BQ500212ARGZR
VQFN
RGZ
48
2500
367.0
367.0
38.0
BQ500212ARGZT
VQFN
RGZ
48
250
210.0
185.0
35.0
Pack Materials-Page 2
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