AD ADM234LAQ 5 v powered cmos rs-232 drivers/receiver Datasheet

a
+5 V Powered
CMOS RS-232 Drivers/Receivers
ADM223/ADM230L–ADM241L
ADM232L TYPICAL OPERATING CIRCUIT
FEATURES
Single 5 V Power Supply
Meets All EIA-232-E and V.28 Specifications
120 kB/s Data Rate
On-Board DC-DC Converters
69 V Output Swing with +5 V Supply
Small 1 mF Capacitors
Low Power Shutdown ≤1 mA
Receivers Active in Shutdown (ADM223)
ESD > 2 kV
630 V Receiver Input Levels
Latch-Up FREE
Plug-In Upgrade for MAX223/230-241
Plug-In Upgrade for AD230–AD241
+5V INPUT
1µF
6.3V
1µF
16V
TTL/CMOS
INPUTS*
TTL/CMOS
OUTPUTS
APPLICATIONS
Computers
Peripherals
Modems
Printers
Instruments
1 C1+
3 C1–
+5V TO +10V
VOLTAGE
DOUBLER
4 C2+ +10V TO –10V
VOLTAGE
INVERTER
5 C2–
VCC 16
V+ 2
V– 6
1µF
6.3V
1µF
16V
T1IN
11
T1
14
T1OUT
T2IN
10
T2
7
T2OUT
R1OUT
12
R1
13
R1IN
R2OUT
9
R2
8
R2IN
GND
15
1µF
6.3V
RS-232
OUTPUTS
RS-232
INPUTS**
ADM232L
*INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
**INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
GENERAL DESCRIPTION
The ADM2xx family of line drivers/receivers is intended for all
EIA-232-E and V.28 communications interfaces, especially in
applications where ± 12 V is not available. The ADM223,
ADM230L, ADM235L, ADM236L and ADM241L feature a
low power shutdown mode that reduces power dissipation to
less than 5 µW, making them ideally suited for battery powered
equipment. Two receivers remain enabled during shutdown on
the ADM223. The ADM233L and ADM235L do not require
any external components and are particularly useful in applications where printed circuit board space is critical.
All members of the ADM230L family, except the ADM231L
and the ADM239L, include two internal charge pump voltage
converters that allow operation from a single +5 V supply.
These converters convert the +5 V input power to the ± 10 V
required for RS-232 output levels. The ADM231L and
ADM239L are designed to operate from +5 V and +12 V supplies. An internal +12 V to –12 V charge pump voltage converter generates the –12 V supply.
The ADM2xxL is an enhanced upgrade for the AD2xx family
featuring lower power consumption, faster slew rate and operation with smaller (1 µF) capacitors.
Table I. Selection Table
Part
Number
Power
Supply Voltage
No. of
RS-232
Drivers
No. of
RS-232
Receivers
External
Capacitors
Low Power
Shutdown
(SD)
TTL
Three-State
EN
No. of
Pins
ADM223
ADM230L
ADM231L
ADM232L
ADM233L
ADM234L
ADM235L
ADM236L
ADM237L
ADM238L
ADM239L
ADM241L
+5 V
+5 V
+5 V & +7.5 V to +13.2 V
+5 V
+5 V
+5 V
+5 V
+5 V
+5 V
+5 V
+5 V & +7.5 V to +13.2 V
+5 V
4
5
2
2
2
4
5
4
5
4
3
4
5
0
2
2
2
0
5
3
3
4
5
5
4
4
2
4
None
4
None
4
4
4
2
4
Yes (SD)
Yes
No
No
No
No
Yes
Yes
No
No
No
Yes
Yes (EN)
No
No
No
No
No
Yes
Yes
No
No
Yes
Yes
28
20
14
16
20
16
24
24
24
24
24
28
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
World Wide Web Site: http://www.analog.com
Fax: 617/326-8703
© Analog Devices, Inc., 1997
VCC = +5 V 6 10% (ADM223, 31L,
32L, 34L, 36L, 38L, 39L, 41L);
VCC = +5 V 6 5% (ADM230L, 33L, 35L, 37L); V+ = 7.5 V to 13.2 V (ADM231L & ADM239L); C1–C4 = 1.0 mF Ceramic. All Specifications TMIN to
TMAX unless otherwise noted.)
ADM223/ADM230L–ADM241L–SPECIFICATIONS
Parameter
Output Voltage Swing
VCC Power Supply Current
V+ Power Supply Current
Shutdown Supply Current
Input Logic Threshold Low, VINL
Input Logic Threshold High, VINH
Logic Pull-Up Current
RS-232 Input Voltage Range
RS-232 Input Threshold Low
RS-232 Input Threshold High
RS-232 Input Hysteresis
RS-232 Input Resistance
TTL/CMOS Output Voltage Low, VOL
TTL/CMOS Output Voltage High, VOH
TTL/CMOS Output Leakage Current
Output Enable Time (TEN)
Min
±5
Typ
±9
2
3.5
0.4
1.5
1
2.0
10
–30
0.8
0.2
3
1.2
1.7
0.5
5
3.5
0.05
250
Output Disable Time (TDIS)
50
Propagation Delay
Instantaneous Slew Rate1
Transition Region Slew Rate
0.5
25
5
Output Resistance
RS-232 Output Short Circuit Current
300
Max Units
Volts
3.0
mA
6
mA
1
mA
4
mA
5
µA
0.8
V
V
25
µA
+30 V
V
2.4
V
1.0
V
7
kΩ
0.4
V
V
±5
µA
ns
ns
30
± 10
µs
V/µs
V/µs
Ω
mA
Test Conditions/Comments
All Transmitter Outputs Loaded with 3 kΩ to Ground
No Load, All TINS = VCC (Except ADM223)
No Load, All TINS = GND
ADM231L, ADM239L
No Load, V+ = 12 V ADM231L & ADM239L Only
TIN, EN, SD, EN, SD
TIN, EN, SD, EN, SD
TIN = 0 V
IOUT = –1.0 mA
EN = VCC, 0 V ≤ ROUT ≤ VCC
ADM223, ADM235L, ADM236L, ADM239L, ADM241L
(Figure 25. CL = 150 pF)
ADM223, ADM235L, ADM236L, ADM239L, ADM241L
(Figure 25. RL = 1 kΩ)
RS-232 to TTL
CL = 10 pF, RL = 3-7 kΩ, TA = +25°C
RL = 3 kΩ, CL = 2500 pF
Measured from +3 V to –3 V or –3 V to +3 V
VCC = V+ = V– = 0 V, VOUT = ± 2 V
NOTE
1
Sample tested to ensure compliance.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*
(TA = 25°C unless otherwise noted)
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V
V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . (VCC – 0.3 V) to +14 V
V– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –14 V
Input Voltages
TIN . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (VCC + 0.3 V)
RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 30 V
Output Voltages
TOUT . . . . . . . . . . . . . . . . . . (V+, + 0.3 V) to (V–, – 0.3 V)
ROUT . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (VCC + 0.3 V)
Short Circuit Duration
TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Continuous
Power Dissipation
N-14 DIP (Derate 10 mW/°C above +70°C) . . . . . 800 mW
N-16 DIP (Derate 10.5 mW/°C above +70°C) . . . 840 mW
N-20 DIP (Derate 11 mW/°C above +70°C) . . . . . 890 mW
N-24 DIP (Derate 13.5 mW/°C above +70°C) . . 1000 mW
N-24A DIP (Derate 13.5 mW/°C above +70°C) . . 500 mW
R-16 SOIC (Derate 9 mW/°C above +70°C) . . . . . 760 mW
R-20 SOIC (Derate 9.5 mW/°C above +70°C) . . . 800 mW
R-24 SOIC (Derate 12 mW/°C above +70°C) . . . . 850 mW
R-28 SOIC (Derate 12.5 mW/°C above +70°C) . . 900 mW
RS-28 SSOP (Derate 10 mW/°C above +70°C) . . . 900 mW
Q-14 Cerdip (Derate 10 mW/°C above +70°C) . . . 720 mW
Q-16 Cerdip (Derate 10 mW/°C above +70°C) . . . 800 mW
Q-20 Cerdip (Derate 11.2 mW/°C above +70°C) . . . 890 mW
Q-24 Cerdip (Derate 12.5 mW/°C above +70°C) . . 1000 mW
D-24 Ceramic (Derate 20 mW/°C above +70°C) . . 1000 mW
Thermal Impedance, θJA
N-14 DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140°C/W
N-16 DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135°C/W
N-20 DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125°C/W
N-24 DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W
N-24A DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110°C/W
R-16 SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105°C/W
R-20 SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105°C/W
R-24 SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85°C/W
R-28 SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
RS-28 SSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100°C/W
Q-14 Cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105°C/W
Q-16 Cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100°C/W
Q-20 Cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100°C/W
Q-24 Cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C/W
D-24 Ceramic . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50°C/W
Operating Temperature Range
Commercial (J Version) . . . . . . . . . . . . . . . . . . . 0 to +70°C
Industrial (A Version) . . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . –65°C to + 150°C
Lead Temperature, Soldering . . . . . . . . . . . . . . . . . . +300°C
Vapour Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >2000 V
*This is a stress rating only and functional operation of the device at these or any
other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods of time may affect reliability.
–2–
REV. 0
ADM223/ADM230L–ADM241L
ORDERING GUIDE
Model
Temperature
Range
Package
Option*
ADM223
ADM223AR
ADM223ARS
–40°C to +85°C
–40°C to +85°C
R-28
RS-28
ADM232L
ADM232LJN
ADM232LJR
ADM232LAN
ADM232LAR
ADM232LAQ
0°C to +70°C
0°C to +70°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
N-16
R-16
N-16
R-16
Q-16
ADM235L
ADM235LJN 0°C to +70°C
ADM235LAN –40°C to +85°C
ADM235LAQ –40°C to +85°C
N-24A
N-24A
D-24
ADM238L
ADM238LJN
ADM238LJR
ADM238LAN
ADM238LAR
ADM238LAQ
N-24
R-24
N-24
R-24
Q-24
0°C to +70°C
0°C to +70°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
Model
Temperature
Range
Package
Option*
Model
Temperature
Range
Package
Option*
ADM230L
ADM230LJN
ADM230LJR
ADM230LAN
ADM230LAR
ADM230LAQ
0°C to +70°C
0°C to +70°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
N-20
R-20
N-20
R-20
Q-20
ADM231L
ADM231LJN
ADM231LJR
ADM231LAN
ADM231LAR
ADM231LAQ
0°C to +70°C
0°C to +70°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
N-14
R-16
N-14
R-16
Q-14
ADM233L
ADM233LJN
ADM233LAN
0°C to +70°C
–40°C to +85°C
N-20
N-20
ADM234L
ADM234LJN
ADM234LJR
ADM234LAN
ADM234LAR
ADM234LAQ
0°C to +70°C
0°C to +70°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
N-16
R-16
N-16
R-16
Q-16
ADM236L
ADM236LJN
ADM236LJR
ADM236LAN
ADM236LAR
ADM236LAQ
0°C to +70°C
0°C to +70°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
N-24
R-24
N-24
R-24
Q-24
ADM237L
ADM237LJN
ADM237LJR
ADM237LAN
ADM237LAR
ADM237LAQ
0°C to +70°C
0°C to +70°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
N-24
R-24
N-24
R-24
Q-24
ADM239L
ADM239LJN
ADM239LJR
ADM239LAN
ADM239LAR
ADM239LAQ
0°C to +70°C
0°C to +70°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
N-24
R-24
N-24
R-24
Q-24
ADM241L
ADM241LJR
ADM241LAR
ADM241LJRS
ADM241LARS
0°C to +70°C
–40°C to +85°C
0°C to +70°C
–40°C to +85°C
R-28
R-28
RS-28
RS-28
*D = Ceramic DIP; N = Plastic DIP; Q = Cerdip; R = Small Outline IC (SOIC); RS = Small Shrink Outline Package (SSOP).
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADM223/ADM230L–ADM241L features proprietary ESD protection circuitry, permanent
damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper
ESD precautions are recommended to avoid performance degradation or loss of functionality.
REV. 0
–3–
WARNING!
ESD SENSITIVE DEVICE
ADM223/ADM230L–ADM241L
+5V INPUT
T3OUT
1
20 T4OUT
T1OUT
2
19
T2OUT
3
18 NC
T2IN
4
T5IN
17 SD
T1IN
5
ADM230L
GND
6
TOP VIEW
(Not to Scale)
VCC
7
14
T3IN
C1+
8
13
V–
V+
9
12
C2–
10
11
C2+
C1–
1µF
6.3V
16
T5OUT
15
T4IN
1µF
16V
TTL/CMOS
INPUTS*
NC = NO CONNECT
Figure 1. ADM230L DIP/SOIC Pin Configuration
10 C1–
11 C2+
12 C2–
VCC 7
+5V TO +10V
VOLTAGE
DOUBLER
C1+
8
V+ 9
+10V TO –10V
VOLTAGE
INVERTER
V– 13
1µF
6.3V
1µF
16V
T1IN
5
T1
2
T1OUT
T2IN
4
T2
3
T2OUT
T3IN
14
T3
1
T3OUT
T4IN
15
T4
20
T4OUT
T5IN
19
T5
16
T5OUT
NC
18
ADM230L
17
SD
GND
1µF
RS-232
OUTPUTS
6
*INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
DIP
Figure 2. ADM230L Typical Operating Circuit
C1+
1
14
C1–
2
13 VCC
V–
3
ADM231L
V+
12 GND
11
T1OUT
5
10
R1IN
R2OUT
6
9
R1OUT
T2IN
7
8
T1IN
T2OUT
4
R2IN
TOP VIEW
(Not to Scale)
+5V INPUT
1µF
13
VCC
1 C+
1µF
16V
2 C–
+12V TO –12V
VOLTAGE
CONVERTER
V+ 14
V– 3
SOIC
1
16
T1
11
T1OUT
T2IN
7
T2
4
T2OUT
R1OUT
9
10
R1IN
TTL/CMOS
INPUTS*
V+
C1–
2
15
VCC
V–
3
14
GND
T2OUT
4
ADM231L
13
T1OUT
R2IN
5
TOP VIEW
(Not to Scale)
12 R1IN
R2OUT
6
11
T2IN
7
10
NC
8
9
1µF
16V
8
T1IN
C1+
+7.5V TO 13.2V
R1
RS-232
INPUTS**
TTL/CMOS
OUTPUTS
R2OUT
R2
6
GND
12
R1OUT
RS-232
OUTPUTS
5
R2IN
ADM231L
T1IN
*INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
**INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
NC
NC = NO CONNECT
Figure 4. ADM231L Typical Operating Circuit (DIP Pinout)
Figure 3. ADM231L DIP & SOIC Pin Configurations
–4–
REV. 0
ADM223/ADM230L–ADM241L
+5V INPUT
C1+
1
16 VCC
V+
2
15
GND
C1–
3
14
T1OUT
C2+
4
ADM232L
13
R1IN
C2–
5
TOP VIEW
(Not to Scale)
12
R1OUT
V–
6
11
T1IN
T2OUT
7
10
R2IN
8
9
1µF
6.3V
1µF
16V
1 C1+
+5V TO +10V
VOLTAGE
DOUBLER
C1–
3
4 C2+
5 C2–
+10V TO –10V
VOLTAGE
INVERTER
VCC 16
V+ 2
V–
1µF
6.3V
1µF
6.3V
6
1µF
16V
T1IN
11
T1
14
T1OUT
T2IN
10
T2
7
T2OUT
R1OUT
12
R1
13
R1IN
R2OUT
9
R2
8
R2IN
TTL/CMOS
INPUTS*
RS-232
OUTPUTS
T2IN
R2OUT
RS-232
INPUTS**
TTL/CMOS
OUTPUTS
GND
ADM232L
15
Figure 5. ADM232L DIP/SOIC Pin Configuration
*INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
**INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
Figure 6. ADM232L Typical Operating Circuit
+5V INPUT
7
VCC
T2IN
1
20
R2OUT
T1IN
2
19
R2IN
R1OUT
3
18
T2OUT
R1IN
4
17
V–
16
C2–
15
C2+
14
V+
T1OUT
5
ADM233L
GND
6
TOP VIEW
(Not to Scale)
VCC
7
C1+
8
GND
C2–
9
10
13
12
11
T1IN
2
T1
5
T2IN
1
T2
18
T2OUT
R1OUT
3
4
R1IN
TTL/CMOS
INPUTS*
R1
T1OUT
RS-232
INPUTS**
TTL/CMOS
OUTPUTS
R2OUT
DO NOT MAKE
CONNECTIONS TO
THESE PINS
C1–
INTERNAL
–10V POWER
SUPPLY
V–
C2+
RS-232
OUTPUTS
INTERNAL
+10V POWER
SUPPLY
20
R2
8 C1+
C2+ 15
12 V–
14 V+
R2IN
C2+ 11
13 C1–
17 V–
19
ADM233L
C2– 10
C2– 16
GND
6
GND
9
*INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
**INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
Figure 7. ADM233L DIP Pin Configuration
Figure 8. ADM233L Typical Operating Circuit
REV. 0
–5–
ADM223/ADM230L–ADM241L
+5V INPUT
1µF
6.3V
T1OUT
T2OUT
1
16
T3OUT
2
15
T4OUT
T2IN
3
T1IN
4
GND
5
VCC
14
T4IN
ADM234L
13
T3IN
TOP VIEW
(Not to Scale)
12
V–
6
11
C2–
C1+
7
10
C2+
V+
8
9
C1–
1µF
16V
TTL/CMOS
INPUTS*
7 C1+
+5V TO +10V
VOLTAGE
DOUBLER
9 C1–
10 C2+
11 C2–
+10V TO –10V
VOLTAGE
INVERTER
VCC
6
V+
8
V– 12
1µF
6.3V
1µF
16V
T1IN
4
T1
1
T1OUT
T2IN
3
T2
2
T2OUT
T3IN
13
T3
16
T3OUT
T4IN
14
T4
15
T4OUT
GND
1µF
RS-232
OUTPUTS
ADM234L
5
*INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
Figure 9. ADM234L DIP/SOIC Pin Configuration
Figure 10. ADM234L Typical Operating Circuit
+5V INPUT
1µF
12
VCC
T1IN
8
T1
3
T1OUT
T2IN
7
T2
4
T2OUT
T3IN
15
T3
2
T3OUT
T4IN
16
T4
1
T4OUT
T5IN
22
T5
19
T5OUT
T4OUT
1
24
R3IN
T3OUT
2
23
R3OUT
T1OUT
3
22
T5IN
T2OUT
4
21 SD
R2IN
5
20
EN
R2OUT
6
ADM235L
19
T5OUT
T2IN
7
TOP VIEW
(Not to Scale)
18
R4IN
R1OUT
9
R1
10
R1IN
T1IN
8
17
R4OUT
R2OUT
6
R2
5
R2IN
9
16
T4IN
R1IN 10
15
T3IN
R3OUT
23
R3
24
R3IN
GND 11
14
R5OUT
R4OUT
17
R4
18
R4IN
VCC 12
13
R5IN
R5OUT
14
R5
13
R5IN
21
SD
R1OUT
TTL/CMOS
INPUTS*
TTL/CMOS
OUTPUTS
EN
20
GND
ADM235L
RS-232
OUTPUTS
RS-232
INPUTS**
11
*INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
**INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
Figure 11. ADM235L DIP Pin Configuration
Figure 12. ADM235L Typical Operating Circuit
–6–
REV. 0
ADM223/ADM230L–ADM241L
+5V INPUT
1µF
6.3V
T3OUT
1
24
T1OUT
2
23 R2IN
T2OUT
3
22
R1IN
4
21 SD
R1OUT
5
20
ADM236L
T4OUT
R2OUT
EN
T2IN
6
T1IN
7
GND
8
17
VCC
9
16 R3IN
C1+
10
15
V–
V+ 11
14
C2–
C1– 12
13
C2+
TOP VIEW
(Not to Scale)
19
1µF
16V
TTL/CMOS
INPUTS*
T4IN
10 C1+
+5V TO +10V
VOLTAGE
DOUBLER
12 C1–
13 C2+
14 C2–
+10V TO –10V
VOLTAGE
INVERTER
VCC 9
V+ 11
V– 15
1µF
6.3V
1µF
1µF
16V
T1IN
7
T1
2
T1OUT
T2IN
6
T2
3
T2OUT
T3IN
18
T3
1
T3OUT
T4IN
19
T4
24
T4OUT
R1OUT
5
R1
4
R1IN
R2OUT
22
R2
23
R2IN
R3OUT
17
R3
16
R3IN
EN
20
ADM236L
21
SD
RS-232
OUTPUTS
18 T3IN
R3OUT
TTL/CMOS
OUTPUTS
GND
RS-232
INPUTS**
8
*INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
**INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
Figure 13. ADM236L DIP/SOIC Pin Configuration
Figure 14. ADM236L Typical Operating Circuit
+5V INPUT
1µF
6.3V
T3OUT
24
1
T4OUT
T1OUT
2
T2OUT
3
22
R2OUT
R1IN
4
21
T5IN
R1OUT
5
20
T5OUT
T2IN
6
ADM237L
19
T4IN
T1IN
7
TOP VIEW
(Not to Scale)
18 T3IN
GND
8
17
VCC
9
16 R3IN
C1+
1µF
16V
23 R2IN
TTL/CMOS
INPUTS*
10 C1+
+5V TO +10V
VOLTAGE
DOUBLER
12 C1–
13 C2+
14 C2–
+10V TO –10V
VOLTAGE
INVERTER
VCC 9
V+ 11
V– 15
1µF
6.3V
1µF
1µF
16V
T1IN
7
T1
2
T1OUT
T2IN
6
T2
3
T2OUT
T3IN
18
T3
1
T3OUT
T4IN
19
T4
24
T4OUT
T5IN
21
T5
20
T5OUT
R1OUT
5
R1
4
R1IN
R2OUT
22
R2
23
R2IN
R3OUT
17
R3
16
R3IN
RS-232
OUTPUTS
R3OUT
10
15
V–
V+ 11
14
C2–
C1– 12
13
C2+
TTL/CMOS
OUTPUTS
GND
RS-232
INPUTS**
ADM237L
8
*INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
**INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
Figure 15. ADM237L DIP/SOIC Pin Configuration
Figure 16. ADM237L Typical Operating Circuit
REV. 0
–7–
ADM223/ADM230L–ADM241L
+5V INPUT
1µF
6.3V
24
T3OUT
T2OUT
1
T1OUT
2
23 R3IN
R2IN
3
22
R3OUT
R2OUT
4
21
T4IN
T1IN
5
20
T4OUT
R1OUT
6
ADM238L
19
T3IN
R1IN
7
TOP VIEW
(Not to Scale)
GND
8
17
VCC
9
16 R4IN
C1+
10
15
V–
V+ 11
14
C2–
C1– 12
13
C2+
1µF
16V
TTL/CMOS
INPUTS*
10 C1+
+5V TO +10V
VOLTAGE
DOUBLER
12 C1–
13 C2+
+10V TO –10V
VOLTAGE
INVERTER
14 C2–
VCC 9
V+ 11
V– 15
1µF
6.3V
1µF
1µF
16V
T1IN
5
T1
2
T1OUT
T2IN
18
T2
1
T2OUT
T3IN
19
T3
24
T3OUT
T4IN
21
T4
20
T4OUT
RS-232
OUTPUTS
18 T2IN
R4OUT
R1OUT
6
R1
7
R1IN
R2OUT
4
R2
3
R2IN
TTL/CMOS
OUTPUTS
RS-232
INPUTS**
R3OUT
22
R4OUT
17
GND
8
R3
23
R3IN
R4
16
R4IN
ADM238L
*INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
**INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
Figure 17. ADM238L DIP/SOIC Pin Configuration
Figure 18. ADM238L Typical Operating Circuit
+5V INPUT
1µF
R1OUT
1
24
R1IN
2
23 T2IN
GND
3
22
R2OUT
VCC
4
21
R2IN
V+
5
20
T2OUT
C+
6
ADM239L
19
T1OUT
TOP VIEW
(Not to Scale)
1µF
16V
T1IN
C–
7
18
R3IN
V–
8
17
R3OUT
R5IN
9
16
T3IN
R5OUT
10
15 NC
R4OUT
11
14
EN
R4IN 12
13
T3OUT
6
C1+
7
C1–
+12V TO –12V
VOLTAGE
INVERTER
VCC 4
+7.5V TO +13.2V
INPUT
V+ 5
V– 8
1µF
16V
TTL/CMOS
INPUTS*
TTL/CMOS
OUTPUTS
NC = NO CONNECT
T1IN
24
T1
19
T1OUT
T2IN
23
T2
20
T2OUT
T3IN
16
T3
13
T3OUT
R1OUT
1
R1
2
R1IN
R2OUT
22
R2
21
R2IN
R3OUT
17
R3
18
R3IN
R4OUT
11
R4
12
R4IN
R5OUT
10
R5
9
R5IN
EN
14
15
NC
GND
ADM239L
RS-232
OUTPUTS
RS-232
INPUTS**
3
*INTERNAL 400kΩ PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
**INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
Figure 19. ADM239L DIP/SOIC Pin Configuration
Figure 20. ADM239L Typical Operating Circuit
–8–
REV. 0
ADM223/ADM230L–ADM241L
+5V INPUT
12 C1+
1µF
16V
T3OUT
1
28 T4OUT
T1OUT
2
27 R3IN
T2OUT
3
26
R2IN
4
25 SD
R2OUT
5
24 EN
T2IN
6
23 R4IN
14 C1–
15 C2+
1µF
16V
R3OUT
TTL/CMOS
INPUTS *
16 C2–
+5V TO +10V
VOLTAGE
DOUBLER
V CC 11
+10V TO –10V
VOLTAGE
INVERTER
V– 17
V+ 13
1µF
6.3V
1µF
16V
T1IN
7
T1
2
T1 OUT
T2IN
6
T2
3
T2 OUT
T3IN
20
T3
1
T3 OUT
T4
28
T4 OUT
7
ADM241L
22
R4OUT
R1OUT
8
TOP VIEW
(Not to Scale)
21
T4IN
T4IN
21
R1IN
R1 OUT
8
R1
9
R1 IN
R2 OUT
5
R2
4
R2 IN
R3 OUT
26
R3
27
R3 IN
R4 OUT
22
R4
23
R4 IN
R5 OUT
19
R5
18
R5 IN
EN
24
25
SD
T1IN
9
20
T3IN
GND 10
19
R5OUT
VCC 11
18 R5IN
C1+ 12
17
V+ 13
16 C2–
C1– 14
C2+
15
TTL/CMOS
OUTPUTS
V–
ADM241L
GND
1µF
RS-232
OUTPUTS
RS-232
INPUTS **
10
*INTERNAL 400k Ω PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
**INTERNAL 5k Ω PULL-DOWN RESISTOR ON EACH RS-232 INPUT
Figure 21. ADM241L SOIC/SSOP Pin Configuration
Figure 22. ADM241L Typical Operating Circuit
+5V INPUT
12 C1+
T3OUT
1
T1OUT
2
27 R3IN
T2OUT
3
26
R2IN
4
25 SD
5
24 EN
T2IN
6
23 R4IN
T1IN
7
R1OUT
8
R1IN
ADM223
22
TOP VIEW
(Not to Scale)
21
T4IN
9
20
T3IN
GND 10
19
R5OUT
VCC 11
18 R5IN
C1+ 12
17
C1– 14
TTL/CMOS
INPUTS *
R4OUT
16 C2–
+5V TO +10V
VOLTAGE
DOUBLER
V CC 11
+10V TO –10V
VOLTAGE
INVERTER
V– 17
V+ 13
1µF
6.3V
1µF
1µF
16V
T1IN
7
T1
2
T1 OUT
T2IN
6
T2
3
T2 OUT
T3IN
20
T3
1
T3 OUT
T4IN
21
T4
28
T4 OUT
R1 OUT
8
R1
9
R1IN
R2 OUT
5
R2
4
R2IN
R3 OUT
26
R3
27
R3IN
R4 OUT
22
R4
23
R4IN
R5 OUT
19
R5
18
R5IN
EN
24
ADM223
25
SD
RS-232
OUTPUTS
V–
TTL/CMOS
OUTPUTS
16 C2–
15
14 C1–
15 C2+
1µF
16V
R3OUT
R2OUT
V+ 13
1µF
16V
28 T4OUT
C2+
GND
RS-232
INPUTS **
10
*INTERNAL 400k Ω PULL-UP RESISTOR ON EACH TTL/CMOS INPUT
**INTERNAL 5k Ω PULL-DOWN RESISTOR ON EACH RS-232 INPUT
NOTE: RECEIVERS R4 AND R5 REMAIN ACTIVE IN SHUTDOWN.
Figure 23. ADM223 SOIC/SSOP Pin Configuration
Figure 24. ADM223 Typical Operating Circuit
REV. 0
–9–
ADM223/ADM230L–ADM241L
PIN FUNCTION DESCRIPTION
Mnemonic
Function
VCC
V+
Power Supply Input 5 V ± 10% (+5 V ± 5% ADM233L, ADM235L).
Internally generated positive supply (+10 V nominal) on all parts except ADM231L and ADM239L.
ADM231L, ADM239L requires external 7.5 V to 13.2 V supply.
Internally generated negative supply (–10 V nominal).
Ground pin. Must be connected to 0 V.
(ADM231L and ADM239L only). External capacitor (+ terminal) is connected to this pin.
(ADM231L and ADM239L only). External capacitor (– terminal) is connected to this pin.
(ADM230L, ADM232L, ADM234L, ADM236L, ADM237L, ADM238L, ADM241L) External capacitor (+ terminal)
is connected to this pin.
(ADM233L) The capacitor is connected internally and no external connection to this pin is required.
(ADM230L, ADM232L, ADM234L, ADM236L, ADM237L, ADM238L, ADM241L) External capacitor (– terminal)
is connected to this pin.
(ADM233L) The capacitor is connected internally and no external connection to this pin is required.
(ADM230L, ADM232L, ADM234L, ADM236L, ADM237L, ADM238L, ADM241L) External capacitor (+ terminal)
is connected to this pin.
(ADM233L) Internal capacitor connections, Pins 11 and 15 must be connected together.
(ADM230L, ADM232L, ADM234L, ADM236L, ADM237L, ADM238L, ADM241L) External capacitor (– terminal)
is connected to this pin.
(ADM233L) Internal capacitor connections, Pins 10 and 16 must be connected together.
V–
GND
C+
C–
C1+
C1–
C2+
C2–
TIN
TOUT
RIN
ROUT
EN/EN
SD/SD
NC
Transmitter (Driver) Inputs. These inputs accept TTL/CMOS levels. An internal 400 kΩ pull-up resistor to VCC is
connected on each input.
Transmitter (Driver) Outputs. These are RS-232 levels (typically ± 10 V).
Receiver Inputs. These inputs accept RS-232 signal levels. An internal 5 kΩ pull-down resistor to GND is connected on
each input.
Receiver Outputs. These are TTL/CMOS levels.
Enable Input. Active low on ADM235L, ADM236L, ADM239L, ADM241L. Active high ADM223. This input is used
to enable/disable the receiver outputs. With EN = low (EN = high ADM223), the receiver outputs are enabled. With
EN = high (EN = low ADM223), the outputs are placed in a high impedance state. This facility is useful for
connecting to microprocessor systems.
Shutdown Input. Active high on ADM235L, ADM236L, ADM241L. Active low on ADM223. With SD = high on the
ADM235L, ADM236L, ADM241L, the charge pump is disabled, the receiver outputs are placed in a high impedance
state and the driver outputs are turned off. With SD low on the ADM223, the charge pump is disabled, the driver
outputs are turned off and all receivers except R4 and R5 are placed in a high impedance state. In shutdown, the power
consumption reduces to 5 µW.
No Connect. No connections are required to this pin.
Table I. ADM235L, ADM236L, ADM241L Truth Table
Table II. ADM223 Truth Table
SD
EN
Status
Transmitters
T1–T5
Receivers
R1–R5
0
0
1
0
1
0
Normal Operation
Normal Operation
Shutdown
Enabled
Enabled
Disabled
Enabled
Disabled
Disabled
–10–
SD EN Status
Transmitters
Receivers
T1–T4
R1–R3 R4, R5
0
0
1
1
Disabled
Disabled
Enabled
Enabled
0
1
0
1
Shutdown
Shutdown
Normal Operation
Normal Operation
Disabled
Disabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
REV. 0
ADM223/ADM230L–ADM241L
10
10
8
V+
VOUT (1 O/P LOADED)
VOUT – V
VOUT – V
| V– |
6
8
4
VOUT (ALL O/Ps LOADED)
6
2
4
0
0
10
20
IOUT — mA
30
40
3.0
4.0
5.0
VCC – V
Figure 25. Charge Pump V+, V– vs. Current
Figure 27. Transmitter Output Voltage vs. VCC
12
18
16
10
TOUT HIGH
8
TOUT – V
SLEW RATE – V/µs
14
12
10
6
TOUT LOW
4
8
2
6
0
4
0
500
1000
1500
2000
2
0
2500
CAPACITIVE LOAD – pF
300
V+, V– IMPEDANCE – Ω
V– (UNLOADED)
V– (LOADED)
V+ (UNLOADED)
100
V+ (LOADED)
0
3
4
VCC – V
Figure 29. Charge Pump Impedance vs. VCC
REV. 0
6
8
Figure 28. Transmitter Output Voltage vs. Current
Figure 26. Transmitter Slew Rate vs. Load Capacitance
200
4
IOUT – mA
–11–
5
ADM223/ADM230L–ADM241L
A3
0.8 V
A3
100
100
90
90
10
10
0%
0%
5V
5V
B
Lw
5
1ms
H
O
0.8 V
B
Lw
5V
Figure 30. Charge Pump, V+, V– Exiting Shutdown
A3
5
5µs
H
O
Figure 31. Transmitter Output Loaded Slew Rate
0.8 V
100
90
10
0%
B
Lw
5V
H
O
1µs
5
Figure 32. Transmitter Output Unloaded Slew Rate
GENERAL INFORMATION
CIRCUIT DESCRIPTION
The ADM223/ADM230L–ADM241L family of RS-232 drivers/
receivers are designed to solve interface problems by meeting
the EIA-232-E specifications while using a single digital +5 V
supply. The EIA-232-E standard requires transmitters which
will deliver ± 5 V minimum on the transmission channel and
receivers which can accept signal levels down to ± 3 V. The
ADM223/ADM230L–ADM241L meet these requirements by
integrating step up voltage converters and level shifting transmitters and receivers onto the same chip. CMOS technology is
used to keep the power dissipation to an absolute minimum. A
comprehensive range of transmitter/receiver combinations is
available to cover most communications needs.
The internal circuitry in the ADM230L–ADM241L consists of
three main sections. These are:
The ADM223, ADM230L, ADM235L, ADM236L and
ADM241L are particularly useful in battery powered systems as
they feature a low power shutdown mode which reduces power
dissipation to less than 5 µW.
(a) A charge pump voltage converter
(b) RS-232 to TTL/CMOS receivers
(c) TTL/CMOS to RS-232 transmitters
Charge Pump DC-DC Voltage Converter
The charge pump voltage converter consists of an oscillator and
a switching matrix. The converter generates a ± 10 V supply
from the input 5 V level. This is done in two stages using a
switched capacitor technique as illustrated in Figures 33 and 34.
First, the 5 V input supply is doubled to 10 V using capacitor
C1 as the charge storage element. The 10 V level is then inverted to generate –10 V using C2 as the storage element.
S1
S3
VCC
V+ = 2VCC
C1
The ADM233L and ADM235L are designed for applications
where space saving is important as the charge pump capacitors
are molded into the package.
S2
GND
The ADM231L and ADM239L include only a negative charge
pump converter and are intended for applications where a positive 12 V is available.
C3
S4
VCC
INTERNAL
OSCILLATOR
To facilitate sharing a common line or for connection to a microprocessor data bus the ADM235L, ADM236L, ADM239L and
ADM241L feature an enable (EN, EN) function. When disabled,
the receiver outputs are placed in a high impedance state.
–12–
Figure 33. Charge-Pump Voltage Doubler
REV. 0
ADM223/ADM230L–ADM241L
S1
S3
GND
V+
FROM
VOLTAGE
DOUBLER
C2
S2
C4
S4
GND
V– = – (V+)
INTERNAL
OSCILLATOR
Figure 34. Charge-Pump Voltage Inverter
Capacitors C3 and C4 are used to reduce the output ripple.
Their values are not critical and can be reduced if higher levels
of ripple are acceptable. The charge pump capacitors C1 and
C2 may also be reduced at the expense of higher output impedance on the V+ and V– supplies.
Enable Input
The ADM235, ADM239, ADM241L and ADM223 feature an
enable input used to enable or disable the receiver outputs. The
enable input is active low on the ADM235L, ADM239L,
ADM241L and active high on the ADM223. Refer to Tables I
and II. When disabled, all receiver outputs are placed in a high
impedance state. This function allows the outputs to be connected directly to a microprocessor data bus. It can also be used
to allow receivers from different devices to share a common data
line. The timing diagram for the enable function is shown in
Figure 35.
3V
EN*
0V
The V+ and V– supplies may also be used to power external circuitry if the current requirements are small.
TEN
Transmitter (Driver) Section
ROUT
The drivers convert TTL/CMOS input levels into EIA-232-E
output levels. With VCC = +5 V and driving a typical EIA-232-E
load, the output voltage swing is ± 9 V. Even under worst case
conditions the drivers are guaranteed to meet the ± 5 V
EIA-232-E minimum requirement.
The input threshold levels are both TTL and CMOS compatible with the switching threshold set at VCC/4. With a nominal
VCC = 5 V the switching threshold is 1.25 V typical. Unused inputs may be left unconnected, as an internal 400 kΩ pull-up resistor pulls them high forcing the outputs into a low state.
As required by the EIA-232-E standard, the slew rate is limited
to less than 30 V/µs without the need for an external slew limiting capacitor and the output impedance in the power-off state is
greater than 300 Ω.
Receiver Section
The receivers are inverting level shifters which accept EIA232-E input levels (± 5 V to ± 15 V) and translate them into 5 V
TTL/CMOS levels. The inputs have internal 5 kΩ pull-down
resistors to ground and are also protected against overvoltages of
up to ± 30 V. The guaranteed switching thresholds are 0.8 V
minimum and 2.4 V maximum which are well within the ± 3 V
EIA-232-E requirement. The low level threshold is deliberately
positive as it ensures that an unconnected input will be interpreted as a low level.
The receivers have Schmitt trigger inputs with a hysteresis level
of 0.5 V. This ensures error-free reception for both noisy inputs
and for inputs with slow transition times.
3.5V
VOH – 0.1V
0.8V
VVOL + 0.1V
*POLARITY OF EN IS REVERSED FOR ADM223.
Figure 35. Enable Timing
APPLICATION HINTS
Driving Long Cables
In accordance with the EIA-232-E standard, long cables are permissible provided that the total load capacitance does not exceed
2500 pF. For longer cables which do exceed this, then it is possible to trade off baud rate vs. cable length. Large load capacitances cause a reduction in slew rate, and hence the maximum
transmission baud rate is decreased. The ADM230L-ADM241L
are designed so that the slew rate reduction with increasing load
capacitance is minimized.
For the receivers, it is important that a high level of noise immunity be inbuilt so that slow rise and fall times do not cause multiple output transitions as the signal passes slowly through the
transition region. The ADM230L-ADM241L have 0.5 V of hysteresis to guard against this. This ensures that, even in noisy environments, error-free reception can be achieved.
High Baud Rate Operation
The ADM230L-ADM241L feature high slew rates permitting
data transmission at rates well in excess of the EIA-232-E specification. The drivers maintain ± 5 V signal levels at data rates up
to 100-kB/s under worst-case loading conditions.
Shutdown (SD)
The ADM223, ADM230L, ADM235L, ADM236L and
ADM241L feature a control input that may be used to disable
the part and reduce the power consumption to less than 5 µW.
This is very useful in battery operated systems. During shutdown the charge pump is turned off, the transmitters are disabled and all receivers except R4 and R5 on the ADM223 are
put into a high-impedance disabled state. Receivers R4 and R5
on the ADM223 remain enabled during shutdown. This feature
allows monitoring external activity such as ring indicator monitoring while the device is in a low power shutdown mode.
The shutdown control input is active high on all parts except the
ADM223 where it is active low. Refer to Tables I and II.
REV. 0
TDIS
–13–
ADM223/ADM230L–ADM241L
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
14-Lead Plastic DIP (N-14)
14
14-Lead Cerdip (Q-14)
8
1
8
14
0.280 (7.11)
0.240 (6.10)
PIN 1
0.271 (6.89)
0.240 (6.09)
PIN 1
7
7
1
0.325 (8.25)
0.300 (7.62)
0.795 (20.19)
0.725 (18.42)
0.060 (1.52)
0.015 (0.38)
0.210
(5.33)
0.150
(3.81)
0.200 (5.05)
0.125 (3.18)
0.100
(2.54)
BSC
0.022 (0.558)
0.014 (0.356)
0.195 (4.95)
0.115 (2.93)
0.163 (4.14)
0.133 (3.378)
0.21 (5.33)
0.15 (3.81)
0.125
(3.17)
MIN
0.015 (0.381)
0.008 (0.204)
SEATING
PLANE
0.070 (1.77)
0.045 (1.15)
0.300 (7.62)
REF
0.780 (19.81)
0.012 (0.305)
0.008 (0.203)
15 °
0.02 (0.5)
0.016 (0.406)
0.11 (2.79)
0.099 (2.28)
0.06 (1.52)
0.05 (1.27)
SEATING
PLANE
0°
16-Lead Plastic DIP (N-16)
16-Lead Cerdip (Q-16)
16
9
0.280 (7.11)
0.240 (6.10)
PIN 1
1
16
0.150
(3.81)
0.200 (5.05)
0.125 (3.18)
0.070 (1.77)
0.045 (1.15)
0.100
(2.54)
BSC
8
0.300 (7.62)
REF
0.780 (19.81)
0.060 (1.52)
0.015 (0.38)
0.022 (0.558)
0.014 (0.356)
0.271 (6.89)
0.240 (6.09)
1
0.325 (8.25)
0.300 (7.62)
0.840 (21.33)
0.745 (18.93)
0.210
(5.33)
9
PIN 1
8
0.195 (4.95)
0.115 (2.93)
0.163 (4.14)
0.133 (3.378)
0.015 (0.381)
0.008 (0.204)
0.125
(3.17)
MIN
SEATING
PLANE
0.02 (0.5)
0.016 (0.406)
0.21 (5.33)
0.15 (3.81)
0.012 (0.305)
0.008 (0.203)
15 °
0.11 (2.79)
0.099 (2.28)
0.06 (1.52)
0.05 (1.27)
SEATING
PLANE
0°
16-Lead SOIC (R-16)
9
16
0.299 (7.60)
0.291 (7.40)
0.419 (10.65)
0.404 (10.26)
PIN 1
8
1
0.413 (10.50)
0.348 (10.10)
0.010 (0.25)
0.004 (0.10)
0.050 (1.27)
BSC
0.018 (0.46)
0.014 (0.36)
0.107 (2.72)
0.089 (2.26)
0.015 (0.38)
0.007 (1.18)
0.364 (9.246)
0.344 (8.738)
0.045 (1.15)
0.020 (0.50)
–14–
REV. 0
ADM223/ADM230L–ADM241L
20-Lead Plastic DIP (N-20)
20
20-Lead Cerdip (Q-20)
11
0.280 (7.11)
0.240 (6.10)
PIN 1
20
11
1
10
0.28 (7.11)
0.24 (6.1)
PIN 1
10
1
1.060 (26.90)
0.925 (23.50)
0.060 (1.52)
0.015 (0.38)
0.210
(5.33)
0.100
(2.54)
BSC
0.29 (7.366)
0.18 (4.57)
0.125 (3.18)
0.20 (5.0)
0.14 (3.56)
0.015 (0.381)
0.008 (0.204)
0.011 (0.28)
0.15 (3.8)
0.125 (3.18)
SEATING
PLANE
0.070 (1.78)
0.045 (1.15)
0.32 (8.128)
0.935 (23.75)
0.195 (4.95)
0.115 (2.93)
0.150
(3.81)
0.200 (5.05)
0.125 (3.18)
0.022 (0.558)
0.014 (0.356)
0.97 (24.64)
0.325 (8.25)
0.300 (7.62)
0.009 (0.23)
0.02 (0.5)
0.016 (0.41)
0.07 (1.78)
0.05 (1.27)
0.11 (2.79)
0.09 (2.28)
15 °
SEATING
PLANE
0°
LEAD NO. 1 IDENTIFIED BY DOT OR NOTCH
24-Lead Ceramic DIP (D-24)
20-Lead SOIC (R-20)
0.005 (0.13)
20
11
0.098 (2.49)
24
13
0.2992 (7.60)
0.2914 (7.40)
0.610 (15.49)
0.500 (12.70)
PIN 1
0.4193 (10.65)
0.3937 (10.00)
PIN 1
1
1
12
0.075 (1.91)
0.015 (0.38)
1.290 (32.77)
0.0118 (0.30)
0.0040 (0.10)
0.0500
(1.27)
BSC
0.225
(5.72)
0.1043 (2.65)
0.0926 (2.35)
0.5118 (13.00)
0.4961 (12.60)
0.0192 (0.49)
0.0138 (0.35)
0.0125 (0.32)
0.0091 (0.23)
8°
0°
0.023 (0.58)
0.014 (0.36)
0.0500 (1.27)
0.0157 (0.40)
12
1
0.55 (13.97)
0.53 (13.47)
PIN 1
SEATING
PLANE
12
1
0.32 (8.128)
0.30 (7.62)
0.07 (1.78)
0.05 (1.27)
SEATING
PLANE
13
24
1.25 (31.75)
1.24 (31.5)
0.130 (3.30)
0.128 (3.25)
0.11 (2.79)
0.09 (2.28)
0.070 (1.78)
0.030 (0.76)
0.260 ± 0.001
(6.61 ± 0.03)
1.228 (31.19)
1.226 (31.14)
0.02 (0.5)
0.016 (0.41)
0.110 (2.79)
0.090 (2.29)
24-Lead Plastic DIP (N-24A)
13
24
PIN 1
0.015 (0.38)
0.008 (0.20)
0.150
(3.81)
0.200 (5.08)
0.120 (3.05)
0.0291 (0.74)
x 45 °
0.0098 (0.25)
24-Lead Plastic DIP (N-24)
15°
0
0.2
(5.08)
MAX
0.175
(4.45)
0.12 (3.05)
0.02 (0.508)
0.015 (0.381)
0.011 (0.28)
0.009 (0.23)
NOTES
1. LEAD NO. 1 IDENTIFIED BY DOT OR NOTCH
2. PLASTIC LEADS WILL BE EITHER SOLDER DIPPED OR TIN PLATED
IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS.
REV. 0
0.620 (15.75)
0.590 (14.99)
10
–15–
0.606 (15.4)
0.594 (15.09)
0.16 (4.07)
0.14 (3.56)
0.105 (2.67)
0.095 (2.42)
0.065 (1.66)
0.045 (1.15)
SEATING
PLANE
15°
0°
0.012 (0.305)
0.008 (0.203)
24-Lead Cerdip (Q-24)
13
1
12
0.295 (7.493)
MAX
0.299 (7.6)
0.291 (7.39)
0.320 (8.128)
0.290 (7.366)
1.290 (32.77) MAX
0.414 (10.52)
0.398 (10.10)
PIN 1
0.180
(4.572)
MAX
0.225
(5.715)
MAX
0.125
(3.175)
MIN
15
28
14
1
SEATING
PLANE
0.070 (1.778)
15°
0.021 (0.533) 0.110 (2.794)
0.065 (1.651) 0.020 (0.508)
0.015 (0.381) 0.090 (2.286)
0.055 (1.397)
0°
TYP
TYP
TYP
1. LEAD NO. 1 IDENTIFIED BY DOT OR NOTCH.
2. CERDIP LEADS WILL BE EITHER TIN PLATED OR SOLDER DIPPED
IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS.
0.096 (2.44)
0.089 (2.26)
0.708 (18.02)
0.696 (17.67)
0.012 (0.305)
0.008 (0.203)
TYP
0.01 (0.254)
0.006 (0.15)
0.05 (1.27)
BSC
0.03 (0.76)
0.02 (0.51)
0.019 (0.49)
0.014 (0.35)
0.013 (0.32)
0.009 (0.23)
6°
0°
C1900–18–4/94
24
PIN 1
28-Lead SOIC (R-28)
0.042 (1.067)
0.018 (0.457)
1. LEAD NO. IDENTIFIED BY A DOT.
2. SOICLEADS WILL BE EITHER TIN PLATED OR SOLDER DIPPED
IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS.
24-Lead SOIC (R-24)
24
28-Lead SSOP (RS-28)
13
28
15
0.299 (7.6)
0.291 (7.39)
PIN 1
12
1
0.212 (5.38)
0.205 (5.207)
0.414 (10.52)
0.398 (10.10)
0.311 (7.9)
0.301 (7.64)
PIN 1
1
0.096 (2.44)
0.089 (2.26)
0.608 (15.45)
0.596 (15.13)
0.05 (1.27)
BSC
0.019 (0.49)
0.014 (0.35)
0.013 (0.32)
0.009 (0.23)
0.407 (10.34)
0.397 (10.08)
0.03 (0.76)
0.02 (0.51)
6°
0°
0.042 (1.067)
0.018 (0.447)
0.008 (0.203)
0.002 (0.050)
0.0256 (0.65)
BSC
0.07 (1.78)
0.066 (1.67)
0.009 (0.229)
0.005 (0.127)
8°
0°
0.037 (0.94)
0.022 (0.559)
1. LEAD NO. 1 IDENTIFIED BY A DOT.
2. LEADS WILL BE EITHER TIN PLATED OR SOLDER DIPPED
IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS
1. LEAD NO. 1 IDENTIFIED BY A DOT.
2. SOIC LEADS WILL BE EITHER TIN PLATED OR SOLDER DIPPED
IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS
PRINTED IN U.S.A.
0.01 (0.254)
0.006 (0.15)
14
–16–