ATMEL AT79C1020 4-port layer 2 10/100/1000mbps unmanaged switched ethernet controller Datasheet

Features
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Supports Four 10/100/1000 Mbps Ethernet Ports with GMII/MII Interface
IEEE 802.3ab CSMA/CD Compliant
Full and Half Duplex Mode of Operation
Speed and Duplex Mode Auto-negotiation Through MDIO
Self-address Learning Mechanism Supports 512-MAC Addresses
Automatic Address Aging with 300 seconds Default
512-kbit Packet Buffer Memory Embedded
Serial Port Interface Employed to Communicate with MCU
IEEE 802.3ab Flow Control for Full Duplex Operation
Supports Store-and-Forward Mode of Operation
0.18 Micron, 1.8V CMOS Technology Packaged in 160-pin PQFP
3.3V I/O
Available in a Variety of Packages Depending on Customer Requirements
Description
This Layer 2 Switch provides an ideal solution for the design of unmanaged full wirespeed multi-port Gigabit Ethernet (GbE) switches. Each port suppor ts either
10/100/1000 Mbps data rate. Flow controls, back pressure in half-duplex mode and
PAUSE frame in full-duplex mode are employed to solve the HOL (Head of Line)
blocking.
This Layer 2 Switch integrates four half/full duplex mode 1000 BASE Gigabit Ethernet
MACs, wire speed switching engines, MAC address based address parsing algorithms
and packet buffer memory.
4-port Layer 2
10/100/1000Mbps
Unmanaged
Switched Ethernet
Controller
AT79C1020
Summary
Figure 1. Ethernet Level 2 Switch Block Diagram
Request
GMI
Address
RXD
(RX_CLK)
FIFO
Port Num
Address Parse
Module
Ack
Packet In
MII
Switch
Fabric
TXD_nG
(TX_CLK)
Mux
GMII
Packet Buffer
(48 kByte)
Packet Out
Control
Signals
Management
Interface
(SPI, MDIO)
TXD_G
(SYSCLK)
SPI/MDIO
DataRate
MAC0, 1, 2 & 3
Switch Core
3434BS–NETST–3/04
Note: This is a summary document. A complete document
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3434BS–NETST–3/04
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