EB-2100x DDX All-Digital, High Efficiency Evaluation Amplifier GENERAL DESCRIPTION FEATURES The EB-2100x is an evaluation amplifier that showcases Apogee’s all-digital, high efficiency Direct Digital Amplification (DDX) technology. The board features a DDX-2000 Controller and DDX-2100 Power Device which provide full digital audio preamplifier functions and power amplification. The board includes both coaxial and optical S/PDIF interfaces, digital volume and balance controls and local power regulation to operate from a single supply voltage. DDX-2000/2100 CHIP SET • OPERATION 9 to 36 VDC • 2x50W into 8Ω @ 1% THD • 1x100W into 4Ω @ 1% THD TYPICAL PERFORMANCE • 0.07% THD+N (1W, 1kHz) • 90 dB SNR (50Wrms, A-weighted) • 88% EFFICIENCY DIGITAL INPUT • S/PDIF COAX/OPTICAL • I2S LOOP THROUGH The EB-2100x is available in both a stereo 50W (EB2100S) and a mono 100W version (EB-2100M). DIGITAL PREAMP FEATURES • VOLUME • BALANCE • ANTICLIPPING • AUTOMATIC MUTE ORDERING INFO EB-2100S – DDX stereo amplifier board EB-2100M – DDX mono amplifier board EB-2100x BLOCK DIAGRAM V+ I2 S Serial PCM PWM1 S/PDIF Receiver Coax or Optical Digital Audio 3 LP Filter 2 Volume 3 Mute DDX-2000 Controller PWM2 2 Left DDX-2100 Power Device +VL LP Filter Reset Power Down Right Clock 129 Morgan Drive, Norwood MA 02062 1 voice: (781) 551-9450 fax: (781) 440-9528 email: [email protected] Copyright Apogee Technology, Inc 2000 (All Rights Reserved) Doc# 11010006-01 February 2002 _______________ __ EB-2100x DESIGN OVERVIEW The EB-2100x is an all-digital amplifier evaluation board that demonstrates Apogee’s DDX-2000/2100 chip set solution. The board features coaxial and optical S/PDIF digital interfaces, volume and balance controls, expansion headers for off-board processing, and local power regulation enabling single supply operation from 10 to 36VDC. The all-digital amplifier board may be configured as either 2 x 50W into 8Ω or 1 x 100W into 4Ω. INL[1:2] INR[1:2] VL OUTPL Logic I/F and Decode Left H-Bridge PWRDN OUTNL TRI-STATE FAULT TWARN Protection Circuitry OUTPR Right H-Bridge Regulators OUTNR DDX-2000/2100 OVERVIEW The DDX-2000 Controller is a 3.3V digital integrated circuit that converts serial PCM digital audio signals into Apogee's patented damped ternary outputs. The device supports two modes of digital volume control, muting and anticlipping functions. A block diagram of the device is shown in Figure 1. ACE SCLK SDATA SERIAL INTERFACE LRCLK MUTE OUTL[1:2] ANTICLIPPING PWM GENERATION VMODE VCLK/UP VDATA/DN VOLUME/ GAIN SYSTEM CLOCKING OUTR[1:2] XI XO LPIN LPOUT Figure 1 - DDX-2000 Functional Diagram The DDX-2100 Power Device is a dual channel H-Bridge that can deliver over 50 watts per channel of audio output power. The DDX-2100 includes; a logic interface, integrated bridge drivers, high efficiency MOSFET outputs and protection circuitry. Two logic level signals per channel are used to control high-speed MOSFET switches to connect the speaker load to the input supply or to ground in a bridge configuration, according to Apogee's patented damped ternary PWM. The DDX-2100 includes over-current and thermal protection, and undervoltage lockout with automatic recovery. A thermal warning status is also provided. Figure 2 - DDX-2100 Block Diagram SCHEMATIC DESCRIPTION S/PDIF INPUT INTERFACE (FIG. 3A) The EB-2100x accommodates either a coaxial or an optical S/PDIF digital audio interface. Either input may be selected by moving jumper J2. Connect J2 pins 1-2 for coaxial or J2 pins 23 for optical S/PDIF. A Crystal CS8415A digital audio interface receiver is utilized to convert the incoming S/PDIF signal to serial I2S used by the DDX-2000. The receiver also recovers a 256*Fs clock synchronized to the incoming signal which is used as the master clock to the DDX-2000. The design will support sample rates from below 32kHz to above 48kHz. The receiver PLL outof-lock signal is used to mute the amplifier’s output when a valid S/PDIF signal is not present. Zero ohm jumpers R6,R9,R10,R11,R42 are provided to disconnect the outputs of the S/PDIF receiver from the inputs to the DDX-2000 so that external signals may be applied via the expansion header J7 (see Fig. 3D). DIGITAL SIGNAL PROCESSING (FIG. 3B) The DDX-2000 converts serial I2S digital audio signals into pulse-width-modulated digital signals output at 8*Fs, according to Apogee’s patented damped ternary architecture. Signals from the S/PDIF receiver are applied as inputs to the DDX processor and signals from the DDX processor are applied to the inputs of the DDX power stage. A low-cost microcontroller with an ADC is used to implement the volume and balance controls. The amplifier’s volume and balance levels are 2 Details are subject to change without notice. _______________ adjusted using two potentiometers. The DC voltage set by the potentiometers is read by the microcontroller that interfaces to the volume serial port of the DDX-2000. The DDX-2000 has independent volume control registers that have an adjustment range from –82.5dB to +12.0dB in 0.75dB increments. A 0dB switch setting is included to signal the microcontroller to set the volume level for both channels to be unity gain. This setting is particularly useful for audio measurements. The EB-2100x permits three separate methods for clocking the DDX-2000. The default is via the 256*Fs recovered clock output from the S/PDIF receiver IC. The second is via the expansion header J7 used to apply an external clock source to synchronize, for example, multiple DDX-2000 ICs to the same clock. Zeroohm jumper R35 is installed to pass either of these clock sources to the DDX-2000 master clock input. The last method is asynchronous from an external crystal. The DDX-2000 contains a crystal oscillator which may be used for single sample-rate applications. Oscillator circuit Y1, C30, C37, R24, R26 may be populated and jumper R35 removed for applications where a 256*Fs clock source is not convenient. The DDX-2000 tolerates a sample rate mismatch of +/-0.2% about the crystal frequency without performance degradation. The crystal footprint is a surface mount Epson MA-506. There are additional provisions for demonstrating DDX-2000 functionality. The GCEN flag is used to disable the anticlipping function and is controlled by DIP rocker switch SW1. Jumper R29 is provided to change the 2 serial port mode on the DDX-2000 from I S to left-justified to accommodate an external set of signals. Jumpers R13, R14, R30 are provided for test modes and must not be changed. A channel reverse flag is provided which inverts LRCLK causing left channel data to be output on the right channel and vice versa. This function is intended to be used for multiple amplifiers configured as mono when used in a multichannel audio demonstration. POWER OUTPUT (FIG. 3C) The DDX-2100 provides power amplification by translating logic level PWM signals into power level signals. These power level signals are applied to a passive two-pole lowpass filter to reconstruct the audio signal providing power to __ EB-2100x the load. The output filter functions to attenuate unwanted high frequency signals from reaching the load. A filter design for 8Ω loads is shown in the Fig. 3C schematic for reference. The DDX-2100 is designed for stereo operation as either two independent full-bridges or for mono operation as one full-bridge with twice the current capability, enabling higher output power. The EB-2100x is designed to demonstrate both configurations via component substitutions. The schematic notes in Fig. 3C detail component changes to convert from stereo to mono operation. Evaluation boards configured as either stereo or mono may be ordered with the appropriate part number designations. Jumpers R19, R22, R25, R33 are used to configure PWM inputs for stereo operation. Jumpers R17, R23, R27, R36 are used to configure PWM inputs for mono operation. Jumpers JP1 and JP3 parallel the output bridges enabling higher output current. Jumpers JP2 and JP4 parallel the output filter sections to a 4Ω load. Capacitor C29 is the differential capacitor required for the 4Ω filter only. In applications where only mono 100W / 4Ω operation is desired, e.g. subwoofer, the output filter may be simplified. Two filter sections may be employed in lieu of sections in parallel. Inductors may be ½ the value with twice the current rating. Capacitors are double the value and resistors are ½ the value at twice the power rating. Snubbers are employed to protect the output MOSFETs from inductive transients. Peak voltage on the DDX-2100 output and power pins must not exceed 40V. Output snubbers for the stereo implementation are R15,C23 and R31,C40 and the snubber for the mono implementation is R21,C32. Input protection is provided for the amplifier by diode D1. D1 will protect from overvoltage and reverse power applications by shunting the power supply. A thermal warning indicator is activated by the DDX-2100 when its junction temperature exceeds +130oC. The thermal warning output is used to force the power LED to change color from green to red forecasting the potential of an overtemperature shutdown. 3 Details are subject to change without notice. _______________ HEADERS / REGULATORS (FIG. 3D) The EB-2100x features local power regulation to facilitate operation from a unipolar +10 to +36 VDC supply. Alternatively, auxiliary power may be applied at J8 (removing bead L7) separating logic and output power supplies. Output from the onboard +5V regulator is available on the J6 test header. Output from the onboard +3.3V regulator is available on the J7 expansion header. There is capability available to power external circuits from either the +5V or the +3.3V supplies or a combination not to exceed a total current of 0.33A. Expansion header J7 is provided to monitor or apply input signals to the DDX-2000. Jumper R42 may be removed to pass serial data provided by an external processor. Test header J6 is provided to monitor signals output from the DDX-2000. Signals INLC, INLD, INRC, INRD are driven low by the DDX-2000 and are used for test purposes only. DIP switch SW1 is used for control functions: POS1 reverses data channels when open, normal when closed; POS2 sets unity gain for test when closed, normal when open; POS3 forces the DDX-2100 into low power mode when closed, normal when open; POS4 disables the anticlipping function when closed, normal when open. Supervisor U8 is used for power-on-reset, power-off sequencing, and as a convenient means of commanded reset via pushbutton. ADDITIONAL INFORMATION Bill of Materials A bill of materials for the evaluation board is provided in Table 1 for reference. Note equivalent components from alternate manufacturers may be substituted. No warranty of system performance is implied by Apogee through use of the reference bill of materials. Power Dissipation/Heat Sink Requirements __ EB-2100x state duty rating of 50W RMS per channel with both channels driven into 8Ω. The DDX-2100 surface mount package includes an exposed thermal pad on the top of the device to provide a direct thermal path from the integrated circuit to the heat sink. For continuous duty rated applications, careful consideration must be made to the overall thermal design. Performance Measurements Typical performance measurements for the evaluation board are shown in Figs 4 through 11. Class D amplifiers produce measurable switching distortion outside the audio bandwidth. Apogee's DDX amplifier uses a patented PWM modulation scheme that significantly reduces the size of these products compared to typical Class D designs. However, in order to obtain accurate performance measurements in the audio bandwidth (i.e., 20Hz to 20kHz) additional filtering is required. The Typical Performance data in was taken using a brick wall filter with a break frequency of 22kHz. This type of filter is often provided as part of audio measurement systems. OPERATING INSTRUCTIONS Refer to Fig. 12 evaluation amplifier assembly drawing. Attach a regulated power supply at J3 set between +10V and +36VDC. At +36V, the power supply must be capable of delivering 4A minimum for two channels. Attach a digital audio input source at either the coaxial or optical S/PDIF connectors. Select the digital input source via J2. Connect 8 Ohm speakers to J4 (left speaker) and J5 (right speaker). Configure SW1 as POS1 closed, POS2,3,4 open. Note, the speaker outputs are bridged. Do not ground any speaker connections, e.g. through an oscilloscope. Apply power, digital source material and enjoy! The DDX-2100 is a high efficiency dual channel design intended for audio applications needs up to 50 Watts RMS per channel. The power dissipation of the device will depend primarily on the supply voltage, load impedance, and output modulation level. The thermal performance of the evaluation board is consistent with a steady- 4 Details are subject to change without notice. ________________ __ EB-2100x FIG. 3A - DDX EVAL AMPLIFIER SCHEMATIC: S/PDIF INPUT INTERFACE 5 Details are subject to change without notice. ________________ __ EB-2100x FIG. 3B - DDX EVAL AMPLIFIER SCHEMATIC: DIGITAL SIGNAL PROCESSING 6 Details are subject to change without notice. ________________ __ EB-2100x FIG. 3C - DDX EVAL AMPLIFIER SCHEMATIC: POWER OUTPUT 2 1 J3 PWR L3 LSPKR+ D1 22uH C15 100nF FILM 36V 1.5kW C20 C18 100nF 21 V5 R17 0 22 100nF +3.3V R19 23 CONFG IN1B 24 R20 nPWRDN 0 R22 0 R23 25 10k 26 IN1A 27 0 C28 100nF THWARN 28 IN1A 29 30 R25 IN2A 31 0 32 R27 IN1B 33 C35 0 34 R33 35 IN2B 100nF 36 0 R36 C52 100nF IN1B NC GNDR1 OUTPL VREG1 OUTPL VREG1 VCC1P VL PGND1P CONFIG PGND1N PWRDN VCC1N TRI-STATE OUTNL FAULT OUTNL TWARN OUTPR INLA OUTPR INLB VCC2P INRA PGND2P INRB PGND2N VREG2 VCC2N VREG2 OUTNR VSIG OUTNR VSIG GNDS 18 +36V 2200uF 50V R15 20 1/4W 17 R16 6.2 1/4W C17 100nF LEFT C53 16 JP1 OJMP + V5 C16 GNDREF 1uF 50V C19 470nF FILM 15 14 C23 330pF C22 R18 6.2 1/4W 100nF 13 1 2 JP2 OJMP J4 C25 100nF R21 12 C26 100nF 11 10 1/4W C27 100nF FILM L4 10 LSPKR- 9 C29 22uH 8 C32 C31 L5 1uF RSPKR+ 7 6 100nF 680pF +36V 5 C33 100nF FILM 22uH C34 4 100nF 3 R31 20 1/4W 2 1 C54 DDX2100 1uF R32 6.2 1/4W C36 100nF RIGHT JP3 OJMP + 20 + U6 19 C38 470nF FILM 50V C40 330pF R37 6.2 1/4W 1 2 JP4 OJMP J5 C41 100nF 0 Note: For Mono: Install C32, R21, R23, R27, R36, R17, JP1,2,3,4. Remove R19,R25, R33, R22. C43 100nF FILM L6 RSPKR22uH FIG. 3D - DDX EVAL AMPLIFIER SCHEMATIC: HEADERS / REGULATORS U7 LM2937IMP-3.3 U9 2 3 TAB +3.3V + C44 100uF 16V C46 100nF L8 8 18K 220uH + 5 C50 100nF 6 D3 B140 1A 40V J8 1 2 C49 100uF 16V D2 GRN/RED C51 100nF Q2 2N3904 Q1 2N3904 THWARN SW1 2 C48 100uF 50V OUT 4 LM2594M-5.0 + C45 100nF 3 FBK OUT 1 Ferrite 600 @100MHz nON/OFF VIN GND 7 R40 18k R44 L7 +36V R39 300 GND R38 300 IN 4 1 +5V 1 2 3 4 Logic Pwr +3r3V 8 7 6 5 SWAP 0dB nPWRDN GCEN SW DIP-4 3 R43 R42 J6 300 IN1A IN1B IN1C IN1D 1 3 5 7 9 2 4 6 8 10 IN2D IN2C IN2B IN2A R41 TSW-105-07-S-D-LL 2 nRESET 2.2k GND +5V nRESET GND 1 2 4 3 6 5 7 8 9 10 11 12 TSW-106-07-S-D-LL U8 DS1233A-10 C47 SW2 10nF RESET 4 SDOUT VDATA VCLK VMODE 1 +3r3V MCLK SCLK SDATA LRCLK nRESET MUTE Vcc J7 0 7 Details are subject to change without notice. ________________ __ EB-2100x TABLE 1 - DDX EVALUATION AMPLIFIER BOM Item Quantity 1 13 2 3 3 2 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 5 4 9 1 1 1 2 1 2 1 1 2 1 3 1 1 1 4 1 1 3 1 1 3 4 29 30 31 32 33 34 35 1 2 1 1 1 3 18 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 1 3 2 4 1 1 1 1 3 2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 60 1 Reference Description Mfr. Part No. Mfr. C1,C2,C6,C7,C9,C18,C20, Capacitor, Ceramic, Y5V, 100nF, 25V, +80/ -20% ECJ-2VF1E104Z C28,C35,C39,C45,C46,C51 C26,C31,C50 Capacitor, Ceramic, Y5V, 100nF, 50V, +80/ -20% ECJ-2VF1H104Z C53,C54 Capacitor, Tantalum, 1uF, 35V, 20% ECS-TIVX105R Capacitor, Ceramic, X7R, 100nF, 50V, C22,C34 C17,C25,C36,C41,C52 10% Capacitor, Ceramic, X7R, 100nF, 50V, 10% ECJ-3VB1H104K C34 C15,C27,C33,C43 Capacitor, Polyester Film, 100nF, 100V, 5% ECJ-2VF1H103Z C3,C4,C5,C11,C12,C14,C21,C24,C47 Capacitor, Ceramic, Y5V, 10nF, 50V, +80/ -20% ECJ-2VF1H103Z C42 Capacitor, Ceramic, X7R, 10nF, 50V, 10% ECU-V1H103KBG C8 Capacitor, Ceramic, X7R, 82nF, 25V, 10% ECJ-2VB1E823K C10 Capacitor, Ceramic, X7R, 2.2nF, 50V, 10% ECU-V1H222KBN C19,C38 Capacitor, Polyester Film, 470nF, 63V, 5% 2222 370 12474 C16 Capacitor, Aluminum Electrolytic, M-Series, 2200uF, 50V, 20% ECA-1HM222 C23,C40 Capacitor, Ceramic, X7R, 330pF, 50V, 10% ECJ-2VC1H331J C32 Capacitor, Ceramic, X7R, 680pF, 50V, 10% ECJ-2VC1H681J C29 Capacitor, Polyester Film, 1uF, 63V, 5% 2222 370 12105 C30,C37 Capacitor, Ceramic, NPO, 10pF, 50V, 10% ECU-V1H100DCN C48 Capacitor, Aluminum Electrolytic, HFS-Series, 100uF, 50V, 20% ECE-A1HFS101 C13,C44,C49 Capacitor, Aluminum Electrolytic, HFS-Series, 100uF, 10V, 20% ECE-A1AFS101 D1 Diode, TVS, 1.5KW, Uni-Directional, 30V Standoff, 35.8VBR, 7%, SMCJ SMCJ30A D2 LED, T1 3/4, Green/Red, White Diffused LN11WP23 D3 Diode, Schottkey Barrier, SMD, 1A, 40V B140 JP1,JP2,JP3,JP4 Buss Wire Jumper, 22 AWG, 0.1" J1 RCA Phono connector, Right Angle PCB, Tin Plate 901 J2 Header, 3-pin, 1X3, 0.10 spacing. TSW-103-07-S-S-LL J3,J4,J5 Connector, Terminal Block Plug, 5.08mm, 12-30 AWG, Two-position EMKDS 2.5/2-5.08 J6 Header, 10-pin, 2X10, 0.10 spacing. TSW-105-07-S-D-LL J7 Header, 12-pin, 2X10, 0.10 spacing. TSW-106-07-S-D-LL L1,L2,L7 Ferrite Chip, EMI Supression, SMD, 600 Ohm @100MHz, 0.5A HZ0805E601R-00 L3,L4,L5,L6 Inductor, 22uH, 2.6A, .046 DCR RL-5480-4-22 ALTERNATE Inductor, 22uH, 3.5A, .047 DCR CTDO5022P-223 Panasonic L8 Q1, Q2 R1 R2 R8 R3,R4,R5 R6,R9,R10,R11,R13,R14, R17,R19,R22,R23,R25,R27, R29,R30,R33,R35,R36,R42 R7 R12,R20,R45 R15,R31 R16,R18,R32,R37 R24 R26 R28 R34 R38,R39,R43 R40, R44 R41 R21 SW1 SW2 U1 U2 U3 U4 U5 U6 U7 U8 U9 Y1 ALTERNATE J8 Inductor, 220uH, 10%, .64A, .68DCR CT622LY-221K Transistor, NPN, 330mW, 40V CEO FMMT3904 Resistor, Chip, Thk Film, 75, 5%, 1/10W, 200ppm ERJ-6GEYJ750V Potentiometer, 10k, 9mm Audio, Linear taper, Right angle EVU-E2AF25B14 Potentiometer, 10k, 9mm Audio, Linear taper, Right angle, Center Detent EVU-E3AF25B14 Resistor, Chip, Thk Film, 47k, 5%, 1/10W, 200ppm ERJ-6GEYJ473V Zero Ohm Jumper, SMD 0805 ERJ-6GEYJ000V Central Technologies Zetex Panasonic Panasonic Panasonic Panasonic Panasonic Resistor, Chip, Thk Film, 4.99K, 1%, 1/10W, 100ppm Resistor, Chip, Thk Film, 10K, 5%, 1/10W, 200ppm Resistor, Chip, Thk Film, 20, 5%, 1/4W, 200ppm Resistor, Chip, Thk Film, 6.2, 5%, 1/4W, 200ppm Resistor, Chip, Thk Film, 470, 5%, 1/10W, 200ppm Resistor, Chip, Thk Film, 1Meg, 5%, 1/10W, 200ppm Resistor, Chip, Thk Film, 12.1k, 1%, 1/10W, 100ppm Resistor, Chip, Thk Film, 49.9, 1%, 1/10W, 100ppm Resistor, Chip, Thk Film, 300, 5%, 1/10W, 200ppm Resistor, Chip, Thk Film, 18k, 5%, 1/10W, 200ppm Resistor, Chip, Thk Film, 2.2k, 5%, 1/10W, 200ppm Resistor, Chip, Thk Film, 10, 5%, 1/4W, 200ppm DIP Switch, 4-position, Raised-rocker, sealed Switch, Momentary Tact, SMD, 230gf Digital Audio Interface Receiver IC Microcontroller, 8-Bit, 8-Pin, w/ADC Toslink Light Receiving Unit TinyLogic CMOS XOR gate DDX Digital Processing ASIC DDX Power IC Regulator, Linear, 3.3V, .5A Supervisor, 3.3V Econoreset Switching Regulator, Step Down, 45V, 0.5A, Fixed +5V, 150KHz Crystal, 11.2896 MHz, 50ppm, Fundamental Mode, SMD Crystal, 12.288 MHz, 50ppm, Fundamental Mode, SMD Header, 2 pin, 1x2, .100 spacing, w/Locking ramp. Panasonic Panasonic Panasonic Panasonic Panasonic Panasonic Panasonic Panasonic Panasonic Panasonic Panasonic Panasonic Grayhill Omron Crystal/Cirrus logic Microchip Sharp Fairchild Apogee Apogee NSC Dallas NSC EPSON EPSON Molex ERJ-6ENF4991V ERJ-6GEYJ103V ERJ-14YJ200U ERJ-14YJ6R2U ERJ-6GEYJ471V ERJ-6GEYJ105V ERJ-6ENF1212V ERJ-6ENF49R9V ERJ-6GEYJ301V ERJ-6GEYJ183V ERJ-6GEYJ222V ERJ-14YJ100U 76SB04S B3S-1002 CS8415A-CS PIC12C671-04/SM GP1F32R NC7SZ86M5 DDX2000 DDX2100 LM2937IMP-3.3 DS1233A-10/SM LM2594M-5.0 MA-506-11.2896M-C2 MA-506-12.288M-C2 22-01-2027 Panasonic Panasonic Panasonic Centralab Panasonic Panasonic Panasonic Panasonic Centralab Panasonic Panasonic Panasonic Centralab Panasonic Panasonic Panasonic Diodes Inc. Panasonic Diodes Inc. Keystone Samtec Phoenix Contact Samtec Samtec Steward Renco Central Technologies . 8 Details are subject to change without notice. ________________ __ EB-2100x Typical Performance Characteristics at Vcc = 36V, 8 Ohm loads, two Channels driven. Fig 4: Efficiency vs Output Power Fig 5: Frequency response +3 100 90 80 +1.5 Efficiency (%) 70 60 d 50 B 40 A -0 r 30 20 -1.5 10 0 0 10 20 30 40 50 60 70 80 90 100 110 120 -3 20 Total Output Power for 2 Channels (Watts) 50 100 200 500 1k 2k 5k 10k 20k Hz Fig 6: THD+N vs Frequency Fig 7: THD+N vs Outpwr at 1 KHz (left and right channels) 20 1 10 0.5 5 2 0.2 1 1W % % 0.1 0.5 0.2 0.05 0.1 10W 0.05 0.02 0.02 0.01 20 50 100 200 500 1k Hz 2k 5k 10k 20k 0.01 100m 200m 500m 1 2 5 10 20 50 80 W 9 Details are subject to change without notice. ________________ __ EB-2100x Typical Performance Characteristics at Vcc = 36V, 4 Ohm load, configured for Mono. Fig 10: THD+N vs. Frequency Fig 11: THD+N vs. Outpwr at 1 KHz (w/ ANTICLIPPING DISABLED) 1 20 10 0.5 5 1W 2 0.2 1 % 0.1 % 10W 0.5 0.2 0.05 0.1 0.05 0.02 0.02 0.01 20 50 100 200 500 1k Hz 2k 5k 10k 20k 0.01 100m 200m 500m 1 2 5 10 20 50 100 W rms 10 Details are subject to change without notice. ________________ __ EB-2100x RIGHT SPEAKER (MONO -) INPUT SELECT S/PDIF COAXIAL BALANCE VOLUME CONTROL DIP SWITCH S/PDIF OPTICAL EXPANSION HEADER RESET SWITCH + C52 POWER LED ALTERNATE LOGIC POWER INPUT POWER LEFT SPEAKER (MONO +) FIGURE 12 - DDX EVALUATION AMPLIFIER ASSEMBLY DRAWING Information furnished in this publication is believed to be accurate and reliable. However, Apogee Technology, Inc. assumes no responsibility for its use, or for any infringements of patents or other rights of third parties that may result form its use. Specifications in this publication are subject to change without notice. This publication supersedes and replaces all information previous supplied. Apogee Technology, Inc. All Rights Reserved November 2001 11 Details are subject to change without notice.