ANSALDO Via N. Lorenzi 8 - I 16152 GENOVA - ITALY Tel. int. +39/(0)10 6556549 - (0)10 6556488 Fax Int. +39/(0)10 6442510 Tx 270318 ANSUSE I - Ansaldo Trasporti s.p.a. Unita' Semiconduttori PHASE CONTROL THYRISTOR AT738 Repetitive voltage up to Mean on-state current Surge current 2200 V 3670 A 60 kA FINAL SPECIFICATION feb 97 - ISSUE : 02 Symbol Characteristic Tj [°C] Conditions Value Unit BLOCKING V RRM Repetitive peak reverse voltage 125 2200 V V V RSM Non-repetitive peak reverse voltage 125 2300 V DRM Repetitive peak off-state voltage 125 2200 V I RRM Repetitive peak reverse current V=VRRM 125 200 mA I DRM Repetitive peak off-state current V=VDRM 125 200 mA I T (AV) Mean on-state current 180° sin, 50 Hz, Th=55°C, double side cooled 3670 A I T (AV) Mean on-state current 180° sin, 50 Hz, Tc=85°C, double side cooled I TSM Surge on-state current sine wave, 10 ms I² t I² t without reverse voltage V T On-state voltage On-state current = V T(TO) Threshold voltage 125 0.92 V T On-state slope resistance 125 0.090 mohm CONDUCTING r 125 2000 A 2860 A 60 kA 18000 x1E3 25 1.1 A²s V SWITCHING di/dt Critical rate of rise of on-state current, min. From 75% VDRM up to 3000 A, gate 10V 5ohm 125 200 A/µs dv/dt Critical rate of rise of off-state voltage, min. Linear ramp up to 75% of VDRM 125 500 V/µs td Gate controlled delay time, typical VD=100V, gate source 25V, 10 ohm , tr=.5 µs 25 3 tq Circuit commutated turn-off time, typical dV/dt = 20 V/µs linear up to 80% VDRM Q rr Reverse recovery charge di/dt=-20 A/µs, I= 2000 A I rr Peak reverse recovery current VR= 50 V I H Holding current, typical VD=5V, gate open circuit 25 300 mA I L Latching current, typical VD=5V, tp=30µs 25 700 mA 320 125 µs µs µC A GATE V GT Gate trigger voltage VD=5V 25 3.5 V I GT Gate trigger current VD=5V 25 350 mA VD=VDRM 125 V GD Non-trigger gate voltage, min. 0.25 V V FGM Peak gate voltage (forward) 30 V I FGM Peak gate current 10 A V RGM Peak gate voltage (reverse) 5 V P GM Peak gate power dissipation 150 W P G Average gate power dissipation 2 W R th(j-h) Thermal impedance, DC Junction to heatsink, double side cooled 11 °C/kW R th(c-h) Thermal impedance Case to heatsink, double side cooled 2 °C/kW T F j Operating junction temperature Mounting force Mass -30 / 125 40.0 / 50.0 1700 °C kN g Pulse width 100 µs MOUNTING ORDERING INFORMATION : AT738 S 22 standard specification VDRM&VRRM/100 ANSALDO AT738 PHASE CONTROL THYRISTOR FINAL SPECIFICATION feb 97 - ISSUE : 02 DISSIPATION CHARACTERISTICS SQUARE WAVE Th [°C] 130 120 110 100 90 30° 80 60° 90° 70 120° 60 180° DC 50 0 1000 2000 3000 4000 5000 IF(AV) [A] PF(AV) [W] 7000 DC 6000 90° 5000 120° 180° 60° 4000 30° 3000 2000 1000 0 0 1000 2000 3000 IF(AV) [A] 4000 5000 ANSALDO AT738 PHASE CONTROL THYRISTOR FINAL SPECIFICATION feb 97 - ISSUE : 02 DISSIPATION CHARACTERISTICS SINE WAVE Th [°C] 130 120 110 100 90 30° 60° 80 90° 70 120° 60 180° 50 0 1000 2000 3000 4000 5000 IF(AV) [A] PF(AV) [W] 7000 180° 6000 120° 90° 5000 60° 4000 30° 3000 2000 1000 0 0 1000 2000 3000 IF(AV) [A] 4000 5000 ANSALDO AT738 PHASE CONTROL THYRISTOR FINAL SPECIFICATION feb 97 - ISSUE : 02 ON-STATE CHARACTERISTIC Tj = 125 °C SURGE CHARACTERISTIC Tj = 125 °C 10000 50 8000 40 ITSM [kA] 60 On-state Current [A] 12000 6000 30 4000 20 2000 10 0 0 0.6 1.1 1.6 1 10 On-state Voltage [V] n° cycles TRANSIENT THERMAL IMPEDANCE DOUBLE SIDE COOLED 12.0 Zth j-h [°C/kW] 10.0 8.0 6.0 4.0 2.0 0.0 0.001 0.01 0.1 1 t[s] 10 100 Cathode terminal type DIN 46244 - A 4.8 - 0.8 Gate terminal type AMP 60598 - 1 Distributed by All the characteristics given in this data sheet are guaranteed only with uniform clamping force, cleaned and lubricated heatsink, surfaces with flatness < .03 mm and roughness < 2 µm. In the interest of product improvement ANSALDO reserves the right to change any data given in this data sheet at any time without previous notice. If not stated otherwise the maximum value of ratings (simbols over shaded background) and characteristics is reported. 100