www.fairchildsemi.com FAN7554 Versatile PWM Controller Features Description • • • • • • • • • • • • • • • The FAN7554 is a fixed frequency current mode PWM controller. It is specially designed for off-line and DC to DC converter applications with minimal external components. These integrated circuits feature a trimmed oscillator for precise duty cycle control, a temperature compensated reference, an ON/OFF control, a high gain error amplifier, a current sensing comparator, and a high current totem-pole output. The FAN7554 has various protection functions such as an over load protection, an over current protection, and the over voltage protection, which include built-in auto restart circuit. The FAN7554 is available in the 8-DIP package as well as the 8-SOP package. Current mode control Pulse by pulse current limiting Low external components Under voltage lockout(UVLO): 9V/15V Stand-by current: typ. 100uA Power saving mode current: typ. 200uA Operating current: typ. 7mA Soft start On/off control Over load protection(OLP) Over voltage protection(OVP) Over current protection(OCP) Over current limit(OCL) Operating frequency up to 500kHz 1A totem-pole output current 8-DIP Applications • Off-Line & DC-DC converter 1 8-SOP 1 Rev. 1.0.3 ©2003 Fairchild Semiconductor Corporation FAN7554 Internal Block Diagram Vref 4 8 OVP 3.5V R off 2 15V/9V OSC CLK _ PWM MAX. 1V 1 + _ FB Vref 1.5V + 0.3V + _ 1k on PWR / SAVE _ + _ 100uA 34V UVLO + Q _ S Vref S/S Vcc 7 + Rt/Ct 2R 1mA 14V 6 OUT 3 IS S Q R R Vref Vcc Offset(0.1V) 5uA OLP S R Q _ OVP-out OCL-out + + _ 6V OCL UVLO-out 2V 5 GND Absolute Maximum Ratings ( Ta = 25°C, unless otherwise specified ) Parameter Symbol Value Unit Supply voltage Vcc 30 V Output current IO ±1 A Input voltage to FB pin VFB -0.3 to VSD V Input voltage to IS pin VIS -0.3 to VOC V Power dissipation at TA ≤ 25°C 8-DIP 8-SOP PD 0.85 0.42 W Operating temperature TOPR -25 to +85 °C Storage temperature TSTG -55 to +150 °C Thermal resistance, junction-to-air (Note1) 8-DIP 8-SOP Rθja 147.8 291.4 °C/W Note: 1. Junction -to -air thermal resistance test environments. - JESD51-2 : Integrated circuits thermal test method environmental conditions-natural convection (still air). - JESD51-3 : Low effective thermal conductivity test board for leaded surface mount packages. - JESD51-10 : Test boards for through-hole perimeter leaded package thermal measurements. 2 FAN7554 Temperature Characteristics ( -25°C ≤ Ta ≤ 85°C ) Parameter Symbol Value Unit Vref temperature stability ∆VREF3 ±0.5 % Fosc temperature stability ∆FOSC2 ±5 % PIN Array Vref Vcc OUT GND 8 7 6 5 YWW FA N7554 1 2 3 4 FB S/S IS Rt/Ct PIN Definitions Pin Number Pin Name Pin Function Description 1 FB Inverting(-) input of pwm comparator, on/off control & OLP sensing terminal. 2 S/S Soft start 3 IS 4 Rt/Ct Oscillator time constant(Rt/Ct) 5 GND Ground 6 OUT Output of gate driver 7 Vcc Power supply 8 Vref Output of 5V reference Non-inverting(+) input of PWM comparator, OCL sensing terminal 3 FAN7554 Electrical Characteristics (Ta = 25°C, Vcc=16V, Rt=10kΩ, Ct=3.3nF unless otherwise specified) Parameter Symbol Conditions Min. Typ. Max. Unit Tj =25°C , Iref =1mA 4.90 5.00 5.10 V 6 20 mV < REFERENCE SECTION > Reference output voltage VREF Line regulation ∆VREF1 Vcc =12V ~ 25V - Load regulation ∆VREF2 Short circuit output current Iref =1mA ~ 20mA - 6 25 mV ISC Tj = 25°C - 0.1 0.18 A FOSC Tj = 25°C 45 50 55 kHz - 0.05 1.0 % < OSCILLATOR SECTION > Oscillation frequency Frequency change with Vcc ∆FOSC1 Vcc = 12V ~ 25V Ramp high voltage VRH - - 2.8 - V Ramp low voltage VRL - - 1.2 - V Discharge current Idisch VRT/CT = 3.3V 6.1 - 9.4 mA V < PWM SECTION > Sense threshold voltage VTH(IS) VFB = 5V 0.8 1.0 1.2 Feedback threshold voltage VTH(FB) VIS = 0V 0.2 0.3 0.4 V - 1.0 - mA Feedback source current IFB VFB = 0V, VS/S = 5V Max. duty cycle D(MAX) - 92 95 98 % Min. duty cycle D(MIN) - - - 0 % < PROTECTION SECTION > Shutdown delay current ISD 4V ≤ VFB ≤ VSD 3.5 5 6.5 uA Shutdown feedback voltage VSD VFB > 5V 5.4 6 6.6 V Over current protection VOC VIS > 1.5V, ton > 500nS 1.6 2 2.4 V Over voltage protection VOVP 30 34 38 V - < ON/OFF CONTROL SECTION > Off mode sink current ISINK VFB < VTH(FB), VS/S = 5V Off threshold voltage VOFF VFB < VTH(FB) - 4 - mA 1.2 1.5 1.8 V VFB = 5V, VS/S = 0V - 1.1 - mA Vcc = 16V - 5.2 - V < SOFT-START SECTION > Soft start current Soft start limit voltage IS/S VLIM(S/S) <OUTPUT SECTION> Low output voltage1 VOL1 VCC = 18V, IO = 50mA - 0.15 0.4 V High output voltage1 VOH1 VCC = 18V, IO = -50mA 13 15 17 V Low output voltage2 VOL2 VCC = 18V, IO = 200mA - 1.5 2.5 V High output voltage2 VOH2 Vcc = 18V, Io = -200mA 12 14 16 V Rising time (Note1) tR Tj = 25°C, CL = 1nF - 80 - ns Falling time (Note1) tF Tj = 25°C, CL = 1nF - 40 - ns <UVLO SECTION> 4 Start threshold voltage VTH(ST) - 13.2 15 16.2 V Min. operating voltage VOPR(M) - 8.2 9 10.2 V FAN7554 Electrical Characteristics (Continued) (Ta = 25°C, Vcc=16V, Rt =10kΩ, Ct = 3.3nF unless otherwise specified) Parameter Symbol Conditions Min. Typ. Max. Unit <TOTAL STAND-BY CURRENT SECTION> Start-up current IST - - 0.1 0.2 mA Operating supply current IOP - - 7 10 mA Off State current IOFF - 0.2 0.4 mA VFB<VTH(FB),VS/S<VOFF Note: 1. These parameters, although guaranteed, are not 100% tested in production. 5 FAN7554 Typical Perfomance Characteristics [ Ct vs Dead time ] [ Rt vs. Freqency ] 100.000 10000.0 0.33n 1.1n 3.3n 11n 33n 100.0 10.0 Dead Time [usec] Frequency[kHz] 1000.0 10.000 1K 2K 5K 10K 20K 50K 100K 1.000 1.0 0.1 0.100 1 10 100 0.1 Rt[Kohm] 1 10 100 Ct[nF] Figure 1. Rt vs. Frequency Figure 2. Ct vs. Dead Time [ Cload vs Tr & Tf ] 50Khz,95% duty [ Ct vs Duty ] 800 95.0 700 85.0 Duty [%] 65.0 55.0 45.0 35.0 25.0 500 Tr Tf 400 300 200 100 15.0 0 0.1 1 10 Ct [nF] Figure 3. Ct vs. Duty 6 600 Time [nsec] 1K 2K 5K 10K 20K 50K 100K 75.0 100 1 10 Cload [ nF] Figure 4. Cload vs. Tr & Tf 100 FAN7554 Typical Performance Characteristics(Continued) Figure 5. Temperature vs. Start-up Current Figure 7. Temperature vs. Reference Voltage Figure 9. Temperature vs. Start Threshold Voltage 7 Figure 6. Temperature vs. Operating Supply Current Figure 8. Temperature vs. Oscillation frequency Figure 10. Temperature vs. Min. Operating Voltage FAN7554 Operation Description The FAN7554 has all the basic features of the current mode SMPS control IC. Its basic configuration includes the UVLO with 6V hysteresis, a band gap reference, the oscillator that can oscillate up to 500kHz according to Rt/Ct (connected externally), a PWM logic circuit , a gate driver, and the feedback circuit that has the current source and soft start function. The FAN7554 has various functions such as an over load protection, an over current protection, and an over voltage protection. The over load protection forces the FAN7554 to stop its operation if the load current is higher than the preset value. The protection circuit can also be prevented from operating during transient states by ensuring that a certain amount of the time passes before the protection circuit operates. The shutdown circuit is configured for an auto-restart, so the FAN7554 automatically restarts when Vcc drops to 9V (stop voltage). Start-Up The start-up circuit is made up of an under voltage lock out (UVLO), the protection for low voltage conditions, and the 5V reference (Vref), which supplies bias voltage to the control circuit after start-up. The start voltage of the UVLO is 15V , and the stop voltage after turn on is 9V. It has a 6V hysteresis. The minimum operating current for start-up threshold is typically 100uA, and this can reduce the power dissipation on the start-up resistor. The Vref is composed of the band gap reference circuit with its superior temperature characteristics and supplies power to all the FAN7554 circuits and Rt/Ct, with the exceptions of the ULVO circuit and ON/OFF control circuit. DC Link Icc(mA) 7 7.0 VCC UVLO 5V Internal bias Vref Good logic 0.01 15V/9V FAN7554 Figure 11. Low Current Start-Up & Bandgap Reference Circuit Vcc (V) 9 15 Figure 12. Start-Up & Circuit Characteristics Soft Start The SMPS output load usually contains a capacitive load component. During initial start-up, the output voltage increases at a fixed time constant because of this component. If the feedback loop, which controls the output voltage, was to start without the soft start circuit, the feedback loop would appear to be open during initial start-up , so, at start-up, the feedback voltage applied to the PWM comparator’s inverting input (-) reaches its maximum value(1V). During this time, the peak value of the drain current would stay at the maximum value, and the maximum power would be delivered to the secondary load side from the start. When the maximum power is delivered to the secondary side for this initial fixed time, the entire circuit is seriously stressed. The use of a soft start can avoid such stresses. At start-up, the soft start capacitor Cs is charged by 1mA and 100uA current sources. The voltage of the inverting terminal of the PWM comparator increases to 1/3 of the Cs voltage at a fixed time constant. Subsequently, the drain peak current is limited by the gradual increase in the Cs voltage and this causes the output voltage to increase smoothly. When the Cs voltage becomes greater than 3V, the diode Ds turns off consequently, the feedback capacitor Cfb is charged by 1mA and 5uA current sources. This charge voltage determines the comparator’s inverting voltage. Then, Cs voltage charges to 5V by 100uA current source. The soft start capacitor Cs is discharged when the UVLO good logic starts, so the soft start is repeated at re-start. 8 FAN7554 S/S 2 100uA 5V Ds 2R Output drive R 1mA Cfb Cs 5uA 5V Vcc FAN7554 1 FB Figure 13. Soft Start Circuit & Circuit Flow Oscillator As shown in figure14, the oscillator frequency is programmed by values selected for timing components Rt and Ct. Capacitor Ct is charged to almost 2.8V through resistor Rt from the 5V reference and discharged to 1.2V by an internal current source. The oscillator generates the clock signal while the timing capacitor Ct is discharged. The gate drive output becomes low during the clock time. Rt and Ct selection determine the oscillator frequency and maximum duty cycle. Charge and discharge times can be calculated through the equations below. Charging time : tc = 0.55×Rt×Ct Discharging time : td = Rt×Ct×ln[(0.0063×Rt - 2.8) / (0.0063×Rt - 3.8)] where the oscillator frequency : fosc = (tc + td)-1 (±10%) When Rt > 5kΩ, fosc = 1 / (0.55×Rt×Ct) = 1.8 / (Rt×Ct) Vhigh(2.8V) Vref Sawtooth waveform 8 Rt Ct + CT Ct 4 Discharge Clock [ Rt > 5kΩ] Vlow(1.2V) tc td Gate Drive Discharge Internal clock Vhigh(2.8V) 2.8V /1.2V Sawtooth waveform [ Rt < 5kΩ] Vlow(1.2V) tc td FAN7554 Internal clock Figure 14. Oscillator Circuit Figure 15. Sawtooth & Clock Waveform 9 FAN7554 Feedback As shown in figure16, the internal oscillator clock turns on the MOSFET. The feedback comparator operates to turn it off again, when the MOSFET current reaches a set value proportional to Vfb. The feedback capacitor Cfb is charged by the internal current sources , 1mA and 5uA, and is discharged by the secondary side photo-coupler to control the output voltage. DRIN OUT 6 OSC 2R Vfb/3 Vfb Q S R R 1mA Cfb IS 3 5uA 5V Vsense Vcc Rs FAN7554 1 FB Figure 16. Feedback & PWM Circuit Delayed Shutdown During the normal operation, the feedback voltage is between 0~3V. If the output terminal overloads or an error happens to the feedback loop, the delayed shutdown circuit operates. When the feedback voltage is less than 3V, the feedback capacitor is charged by current sources, 1mA and 5uA; when the feedback voltage becomes greater than 3V, the capacitor is charged by the 5uA current source because diode D1 turns off. When the feedback voltage is less than 3V, the charge slope becomes an exponential function and, when it is greater than 3V, the charge slope becomes linear. When the feedback voltage reaches almost 6V, the FAN7554 shuts down. The shut down circuit is configured for auto-restart, so it automatically restarts when Vcc reaches the under voltage 9V. FB 1 DRIN 5uA OUT 6 OSC Vcc 2R S D1 Q R R 1mA Cfb IS 3 5V Rs Over Current Comparator S Q Shutdown R 6V UVLO - out Figure 17-A . Delayed Shutdown & Feedback Circuit 10 FAN7554 FAN7554 Vfb 6V Slope (dv/dt) = 5uA / Cfb Shutdown start point 3V t1 t t2 Figure 17-B . Delayed Shutdown & Feedback Waveform Gate Driver The gate drive circuit has the totem-pole output configuration. The output has 1A peak current and 200mA average current drive ability. 7 DRAIN Clock OUT 6 Q Shutdown FAN7554 Figure 18. Gate Drive Circuit ON/OFF Control The FAN7554 is able to use the feedback pin for ON/OFF control by placing NPN transistor between the cathode of the KA431 and ground as shown in figure 19. When the transistor turns on, the current flows through the photo diode and saturates the photo transistor. As a result, the feedback voltage is dropped to zero. When the feedback voltage is below 0.3V, the soft start voltage starts to discharge by connecting the internal resistor 1kΩ in parallel with the external capacitor Cs. When the soft start voltage becomes less than 1.5V, all the blocks in the FAN7554 are turned off , with the exceptions of the UVLO block and ON/OFF control block. The operation current is about 200uA. So the stand-by power is reduced and SMPS efficiency is improved. When the feedback voltage exceeds 0.3V, the FAN7554 normally operates by turning on Vref block. 11 FAN7554 VCC 7 Vref 3.5V R S Q 100uA OFF S/S 2 ON 1K Ω 1.5V UVLO PWR / SAVE 5V Vref 15V/9V 0.3V Vo FB Cs Good logic 1 Internal bias Cfb 5uA FAN7554 Vcc Remote control Figure 19. ON/OFF Control Circuit Vref Icc 5V 4.5mA 0.2mA t VS/S Slope (dv/dt) = 100uA / Cs 5V Slope (dv/dt) = 1kΩ * Cs 3V Slope (dv/dt) = (1mA +100uA) / Cs 1.5V t Vfb Slope (dv/dt) = (1mA +5A) / Cfb 0.3~3V OFF Signal Slope (dv/dt) = (5uA) / Cfb ON Signal 0.3V Normal State OFF State Figure 20. ON-OFF Control Circuit Waveforms 12 Normal State t FAN7554 Protection Circuits The FAN7554 has many built-in protection circuits that do not need additional components, providing reliability without cost increase. These protection circuits have the auto-restart configuration. In this configuration, the protection circuits reset when Vcc is below UVLO stop threshold (9V) and restarts when Vcc is above UVLO start threshold voltage (15V) Over Voltage Protection Abnormalities may occur in the SMPS secondary side feedback circuit. First, when the feedback pin is short to the ground, the feedback voltage is zero and the FAN7554 is unable to start switching. Second, when the feedback circuit is open, the secondary voltage generally becomes much greater than the rated voltage as the primary side continues to switch at the maximum current level. This may cause the blowing off the fuse or, in serious cases, fires. It is possible that the devices directly connected to the secondary output without a regulator could be destroyed. Even in these cases, the over voltage protection circuit operates. Since Vcc is proportional to the output , in an over voltage situation, it also will increase. In the FAN7554, the protection circuit operates when Vcc exceeds 34V. Therefore ,in normal operation, Vcc must be set below 34V. Over Load Protection An overload is the state in which the load is operating normally but in excess of the preset load. The overload protection circuit can force the FAN7554 to stop its operation . The protection can also operate in transient states such as initial SMPS operation. Because the transient state returns to the normal state after a fixed time, the protection circuit need not to operate during this time. That is, the FAN7554 needs the time to detect and decide whether it is an overload condition or not. The protection circuit can be prevented from operating during transient states by ensuring that a certain amount of time passes before the protection circuit operates. The above operations are executed as follows: Since the FAN7554 adopts a current mode, it is impossible for current to flow above a maximum level. For a fixed input voltage, this limits power. Therefore, if the power at the output exceeds this maximum, Vo, shown in figure21, becomes less than the set voltage, and the KA431pulls in only the given minimum current. As a result, the photo-coupler’s secondary side current becomes zero. The same goes for the photo-coupler’s primary side current. Consequently, when the full current 1mA flows through the internal resistor (2R + R = 3R), Vfb becomes approximately 3V and from that time, the 5uA current source begins to charge Cfb, the photo-coupler’s secondary current is almost zero. The FAN7554 shuts down when Vfb reaches 6V. S 6V Shutdown Q R UVLO out Vfb Vo OSC 2R 1mA Cfb S 5uA 5V Vcc Q R R FAN7554 KA431 1 FB V 6V Shutdown start point 3V t1 Time Constant = 3R * Cfb t2 5uA = (Cfb *3V)/t2 t Figure 21. Delayed Shutdown 13 FAN7554 FAN7554 Flyback Converter Demo Circuit (Fsw:100kHz) BD T101 NTC 12V/3.5A L201 D201 R103 C102 R104 C104 R101 R203 C201 R102 C202 D101 R204 C103 C301 C302 LF101 R202 R201 C101 Q101 D102 IC301 R106 R105 R205 C203 TNR FUSE IC201 D103 7 8 6 R108 5 Vref Vcc OUT GND FAN7554 R107 Input:85 ~ 265VAC 50/60Hz FB S/S 1 2 3 14 C109 4 R109 R110 C105 IC301 IC101 IS Rt/Ct C108 C106 C107 R111 FAN7554 Part List For FAN7554 Flyback Converter Demo Board Part Value Note Part FUSE FUSE 250 2A NTC 5D-11 Value Note CAPACITOR - NTC - RESISTOR C101 100nF/ 275V Box Capacitor C102 100nF/ 275V Box Capacitor C103 470nF/ 400WV Electrolytic C104 103/ 1kV Film Capacitor R101 330kΩ 1W C105 104 Ceramic R102 - - C106 1uF/ 10V Electrolytic R103, R104 100kΩ 1W C107 101 Ceramic R105 22Ω - C108 122 Ceramic R106 4.7kΩ - C109 22uF/ 50V Electrolytic R107 12kΩ - C201 330uF Electrolytic R108 10Ω - C202 330uF Electrolytic R109 1kΩ - C203 104 Ceramic R110 0.5Ω 2W C301 - - R201 1kΩ - C302 - - R202 1kΩ - R203 4.7kΩ - R204 1.2kΩ - LF101 30mH - R205 - - L201 6.4uH - INDUCTOR MOSFET Q101 FQP6N70 DIODE Fairchild IC D201 MBRF10100CT - D101 UF4007 Fairchild IC101 FAN7554 Fairchild D102 1N4148 - IC201 KA431 Fairchild D103 UF4004 Fairchild IC301 Opto-coupler Fairchild BD G3SBA60 - 15 FAN7554 Transformer Specification Schematic Diagram (Top view) 3mm 6mm 2mm 12 1 10 NP 9 3 NB 8 11 NP N12V 4 N12V 7 NB NP 6 5 bottom top Winding Specification No. Pin(S → F) Wire Turns Winding Method NP 1→3 0.35φ × 1 44 - N12V 7 → 11 0.35φ × 4 12 - NP 1→3 0.35φ × 1 44 - NB 5→4 0.35φ × 1 13 - Electrical Characteristic Closure Pin Spec. Inductance 1-3 400uH ±10% 100kHz, 1V Leakagel 1-3 10uH MAX . 2nd All short 16 Remarks FAN7554 FAN7554 forward converter demo circuit ( fsw:100kHz) D201 BD L201 +12V/2A T101 R103 C104 R105 C102 R106 C103 R104 C201 C202 D102 C301 C302 D202 L101 +5V/3A R107 D103 R201 D104 C105 C101 L202 C203 R101 IC2 FUSE R102 R113 D101 RT101 Input: 85 ~ 265VAC 50/60Hz C204 R202 R108 5 8 7 6 Vref Vcc OUT GND Q101 R110 FAN7554 C106 F/B S/S 1 2 IC301 IS Rt/Ct 3 4 C110 C111 C107 C108 R203 R109 R112 C109 R111 IC301 R204 C205 IC201 17 FAN7554 Part List For FAN7554 Forward Converter Demo Board Part Value Note Part FUSE FUSE 250 2A RT101 DSC 10D-11 Value Note CAPACITOR - NTC - RESISTOR C101 470nF/ 275V Box Capacitor C102, C103 470nF/ 400WV Electrolytic C104 223/ 630V Film C105 33uF/ 35V Film Capacitor R101 330kΩ 1W C106 104 Ceramic R102 - - C107 1uF/ 35V Electrolytic R103, R104 56kΩ 1W C108 101 Ceramic R105, R106 220kΩ 1W C109 122 Ceramic R107 10Ω - C110 272 Film R108 20Ω - C111 333 Film R109 4.7kΩ - C201, C202 1000uF/ 35V Electrolytic R110 1.2kΩ - C203 330uF/ 16V Electrolytic R111 0.5Ω//0.5Ω//0.5Ω 2W C204 2200uF/ 16V Electrolytic R112 1kΩ - C205 104 Ceramic R113 12kΩ - C301, C302 332/ 1kV Ceramic R201, R202 10kΩ - R203 1kΩ - LF101 30mH - R204 330Ω - L201 - - INDUCTOR MOSFET Q101 SSH8N80 DIODE Fairchild IC 18 D101 1N4004 - D102 FR157 - IC101 FAN7554 Fairchild D103 UF4007 - IC201 KA431 Fairchild D201 MBRF10100CT - IC301 Opto-Coupler Fairchild D202 MBR3045PT - - - - BD PBS406GU FAN7554 Transformer specification Schematic Diagram (Top view) 1 Np ; 32turn 13, 14 Ns,12 ; 5turn Nvcc ; 6turn 3 8, 9 Np ; 32turn 6 Ns,12 ; 5turn Nvcc ; 5turn 7 Ns,5 ; 4turn Ns,5 ; 4turn Np ; 32turn 10,11,12 Winding Specification No. Pin(S → F) Wire Turns NP 1→3 0.65 φ × 1 32 NS , 5 8 → 11 0.65 φ × 4 4 NS, 12 4→9 0.65 φ × 4 5 NP 1→3 0.65 φ × 1 32 NVCC 7→6 0.65 φ × 1 5 Core : Powder 27 pi 16grade 5V : 12T ( 1 φ × 2 ) 12V : 27T ( 1.2 φ × 1 ) 19 FAN7554 Mechanical Dimensions Package Dimensions in millimeters 8-SOP Symbol Min Nom Max A - - 1.75 A1 0.10 0.15 0.25 A2 1.25 1.45 1.50 B 0.35 0.37 0.51 C 0.19 0.20 0.25 D 4.80 4.90 5.00 E 3.80 3.90 4.00 e 1.27BSC H 5.79 5.99 6.20 h 0.25 - 0.50 L 0.50 0.70 0.90 GP 20 0.36 BSC q 0 - 8 aaa - - 0.25 bbb - - 0.10 FAN7554 Mechanical Dimensions (Continued) Package Dimensions in millimeters 8-DIP 21 FAN7554 Ordering Information Product Number Package FAN7554 8-DIP FAN7554D 8-SOP Operating Temperature -25°C ~ 85°C DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com 10/2/03 0.0m 001 Stock#DSxxxxxxxx 2003 Fairchild Semiconductor Corporation