TI1 CY74FCT162543TPVCT 16-bit latched transceiver Datasheet

Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
SCCS059B - August 1994 - Revised September 2001
Features
• Ioff supports partial-power-down mode operation
• Edge-rate control circuitry for significantly improved
noise characteristics
• Typical output skew < 250 ps
• ESD > 2000V
• TSSOP (19.6-mil pitch) and SSOP (25-mil pitch)
packages
• Industrial temperature range of −40˚C to +85˚C
• VCC = 5V ± 10%
CY74FCT16543T Features:
• 64 mA sink current, 32 mA source current
• Typical VOLP (ground bounce) <1.0V at VCC = 5V,
TA = 25˚C
CY74FCT162543T Features:
• Balanced 24 mA output drivers
• Reduced system switching noise
• Typical VOLP (ground bounce) <0.6V at VCC = 5V,
TA= 25˚C
CY74FCT162H543T Features:
• Bus hold retains last active state
• Eliminates the need for external pull-up or pull-down
resistors
CY74FCT16543T
CY74FCT162543T
CY74FCT162H543T
16-Bit Latched Transceivers
Functional Description
The CY74FCT16543T and CY74FCT162543T are 16-bit,
high-speed, low power latched transceivers that are organized as two
independent 8-bit D-type latched transceivers containing two sets of
eight D-type latches with separate Latch Enable (LEAB, LEAB) and
Output Enable (OEAB, OEAB) controls for each set to permit
independent control of inputting and outputting in either direction of
data flow. For data flow from A to B, for example, the A-to-B input
Enable (CEAB) must be LOW in order to enter data from A or to take
data from B as indicated in the truth table. With CAEB LOW, a LOW
signal on the A-to-B Latch Enable (LEAB) makes the A-to-B latches
transparent; a subsequent LOW-to-HIGH transition of the LEAB
signal puts the A latches in the storage mode and their outputs no
longer change with the A inputs. With CEAB and OEAB both LOW,
the three-state B output buffers are active and reflect the data present
at the output of the A latches. Control of data from B to A is similar,
but uses CEAB, LEAB, and OEAB inputs flow-through pinout and
small shrink packaging and in simplifying board design.
This device is fully specified for partial-power-down
applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device
when it is powered down.
The CY74FCT16543T is ideally suited for driving
high-capacitance loads and low-impedance backplanes.
The CY74FCT162543T has 24-mA balanced output drivers
with current limiting resistors in the outputs. This reduces the
need for external terminating resistors and provides for
minimal undershoot and reduced ground bounce. The
CY74FCT162543T is ideal for driving transmission lines.
The CY74FCT162H543T is a 24-mA balanced output part that
has “bus hold” on the data inputs. The device retains the
input’s last state whenever the input goes to high impedance.
This eliminates the need for pull-up/down resistors and
prevents floating inputs.
Copyright
© 2001, Texas Instruments Incorporated
CY74FCT16543T
CY74FCT162543T
CY74FCT162H543T
Logic Block Diagrams
Pin Configuration
1OEBA
Top View
SSOP/TSSOP
1CEBA
1LEBA
1OEAB
1OEAB
1LEAB
1CEAB
1CEAB
1LEAB
GND
1A 1
C
D
1A 1
1B 1
1A 2
V CC
1A 3
1A 4
C
D
1A 5
GND
1A 6
TO 7 OTHER CHANNELS
1A 7
FCT16543T-1
1A 8
2OEBA
2A 1
2CEBA
2A 2
2LEBA
2CEAB
2A 3
GND
2A 4
2A 5
2LEAB
2A 6
2OEAB
C
D
2A 1
V CC
2A 7
2A 8
2B 1
GND
2CEAB
2LEAB
2OEAB
C
D
TO 7 OTHER CHANNELS
56
55
3
4
5
6
7
8
9
54
53
52
51
50
49
48
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1OEBA
1LEBA
1CEBA
GND
1B 1
1B 2
VCC
1B 3
1B 4
1B 5
GND
1B 6
1B 7
1B 8
2B 1
2B 2
2B 3
GND
2B 4
2B 5
2B 6
VCC
2B 7
2B 8
GND
2CEBA
2LEBA
2OEBA
FCT16543T-3
FCT16543T-2
Function Table[1]
Pin Description
Name
1
2
Description
OEAB
A-to-B Output Enable Input (Active LOW)
OEBA
B-to-A Output Enable Input (Active LOW)
CEAB
A-to-B Enable Input (Active LOW)
CEBA
B-to-A Enable Input (Active LOW)
LEAB
A-to-B Latch Enable Input (Active LOW)
LEBA
B-to-A Latch Enable Input (Active LOW)
A
A-to-B Data Inputs or B-to-A Three-State Outputs[9]
B
B-to-A Data Inputs or A-to-B Three-State Outputs[9]
Inputs
CEAB
Latch
Status
Output
Buffers
LEAB
OEAB
A to B
B
H
X
X
Storing
High Z
X
H
X
Storing
X
X
X
H
X
High Z
L
L
L
Transparent
Current A
Inputs
L
H
L
Storing
Previous A
Inputs[2]
Maximum Ratings[3, 4]
(Above which the useful life may be impaired. For user
guidelines, not tested.)
Power Dissipation .......................................................... 1.0W
Storage Temperature .....................Com’l −55°C to +125°C
Static Discharge Voltage............................................>2001V
(per MIL-STD-883, Method 3015)
Ambient Temperature with
Power Applied .................................Com’l −55°C to +125°C
Operating Range
DC Input Voltage .................................................−0.5V to +7.0V
Range
DC Output Voltage ..............................................−0.5V to +7.0V
Industrial
DC Output Current
(Maximum Sink Current/Pin) ........................... −60 to +120 mA
2
Ambient
Temperature
VCC
−40°C to +85°C
5V ± 10%
CY74FCT16543T
CY74FCT162543T
CY74FCT162H543T
Electrical Characteristics Over the Operating Range
Parameter
Description
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
Test Conditions
Min.
Typ.[5]
Max.
2.0
V
0.8
[6]
VH
Input Hysteresis
VIK
Input Clamp Diode Voltage
VCC=Min., IIN=−18 mA
IIH
Input HIGH Current
IIL
Input LOW Current
IOZH
Unit
100
mV
−1.2
V
VCC=Max., VI=VCC
±1
µA
VCC=Max., VI=GND
±1
µA
High Impedance Output Current (Three-State Output pins)
VCC=Max., VOUT=2.7V
±1
µA
IOZL
High Impedance Output Current (Three-State Output pins)
VCC=Max., VOUT=0.5V
±1
µA
IOS
Short Circuit Current[7]
VCC=Max., VOUT=GND
−80
−200
mA
IO
Output Drive Current[7]
VCC=Max., VOUT=2.5V
−50
−180
mA
±1
µA
IOFF
Power-Off Disable
VCC=0V, VOUT
≤4.5V[8]
−0.7
V
−140
Notes:
1. A-to-B data flow shown; B-to-A flow control is the same, except using CEBA, LEBA, and OEBA.
2. Data prior to LEAB LOW-to-HIGH Transition
H = HIGH Voltage Level. L = LOW Voltage Level.
X = Don’t Care. Z = High Impedance.
3. Operation beyond the limits set forth may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-air temperature
range.
4. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.
5. Typical values are at VCC= 5.0V, TA= +25˚C ambient.
6. This parameter is specified but not tested.
7. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting
of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter
tests, IOS tests should be performed last.
8. Tested at +25˚C.
9. On the 74FCT162H543T, these pins have bus hold.
3
CY74FCT16543T
CY74FCT162543T
CY74FCT162H543T
Output Drive Characteristics for CY74FCT16543T
Parameter
VOH
VOL
Min.
Typ.[5]
VCC=Min., IOH=−3 mA
2.5
3.5
VCC=Min., IOH=−15 mA
2.4
3.5
VCC=Min., IOH=−32 mA
2.0
3.0
Description
Output HIGH Voltage
Output LOW Voltage
Test Conditions
VCC=Min., IOL=64 mA
Max.
Unit
V
0.2
0.55
V
Min.
Typ.[5]
Max.
Unit
VCC=5V, VIN=VIH or VIL, VOUT=1.5V
60
115
150
mA
VCC=5V, VIN=VIH or VIL, VOUT=1.5V
−60
−115
−150
mA
2.4
3.3
Output Drive Characteristics for CY74FCT162543T, CY74FCT162H543T
Parameter
IODL
Description
Output LOW Current
[7]
[7]
Test Conditions
IODH
Output HIGH Current
VOH
Output HIGH Voltage
VCC=Min., IOH=−24 mA
VOL
Output LOW Voltage
VCC=Min., IOL=24 mA
V
0.3
0.55
V
Typ.[5]
Max.
Unit
Capacitance[6] (TA = +25˚C, f = 1.0 MHz)
Parameter
Description
Test Conditions
CIN
Input Capacitance
VIN = 0V
4.5
6.0
pF
COUT
Output Capacitance
VOUT = 0V
5.5
8.0
pF
Typ.[5]
Max.
Unit
5
500
µA
Power Supply Characteristics
Parameter
Description
Test Conditions
ICC
Quiescent Power Supply Current VCC=Max.
VIN≤0.2V,
VIN≥VCC−0.2V
∆ICC
Quiescent Power Supply Current
(TTL inputs HIGH)
VCC=Max.
VIN=3.4V[10]
0.5
1.5
mA
ICCD
Dynamic Power Supply
Current[11]
VCC=Max., One Input
Toggling, 50% Duty Cycle,
Outputs Open, OE=GND
VIN=VCC or
VIN=GND
60
100
µA/MHz
IC
Total Power Supply Current[12]
VCC=Max., f1=10 MHz,
50% Duty Cycle, Outputs
Open, One Bit Toggling,
OE=GND
VIN=VCC or
VIN=GND
0.6
1.5
mA
VIN=3.4V or
VIN=GND
0.9
2.3
mA
VIN=VCC or
VIN=GND
2.4
4.5[13]
mA
VIN=3.4V or
VIN=GND
6.4
16.5[13]
mA
VCC=Max., f1=2.5 MHz,
50% Duty Cycle, Outputs
Open, Sixteen Bits Toggling,
OE=GND
Notes:
10. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND.
11. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
12. IC
= IQUIESCENT + IINPUTS + IDYNAMIC
IC
= ICC+∆ICCDHNT+ICCD(f0/2 + f1N1)
ICC = Quiescent Current with CMOS input levels
∆ICC = Power Supply Current for a TTL HIGH input
(VIN=3.4V)
= Duty Cycle for TTL inputs HIGH
DH
= Number of TTL inputs at DH
NT
ICCD = Dynamic Current caused by an input transition pair
(HLH or LHL)
= Clock frequency for registered devices, otherwise zero
f0
= Input signal frequency
f1
= Number of inputs changing at f1
N1
All currents are in milliamps and all frequencies are in megahertz.
13. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.
4
CY74FCT16543T
CY74FCT162543T
CY74FCT162H543T
Switching Characteristics Over the Operating Range[14]
CY74FCT16543T
CY74FCT162543T
Parameter
Description
CY74FCT16543AT
CY74FCT162543AT
Min.
Max.
Min.
Max.
Unit
Fig.
No.[15]
tPLH
tPHL
Propagation Delay
Transparent Mode
A to B or B to A
1.5
8.5
1.5
6.5
ns
1, 3
tPLH
tPHL
Propagation Delay
LEBA to A, LEAB to B
1.5
12.5
1.5
8.0
ns
1, 5
tPZH
tPZL
Output Enable Time
OEBA or OEAB to A or B
CEBA or CEAB to A or B
1.5
12.0
1.5
9.0
ns
1, 7, 8
tPHZ
tPLZ
Output Disable Time
OEBA or OEAB to A or B
CEBA or CEAB to A or B
1.5
9.0
1.5
7.5
ns
1, 7, 8
tSU
Set-up Time HIGH or LOW
A or B to LEAB or LEBA
2.0
—
2.0
—
ns
4
tH
Hold Time HIGH or LOW
A or B to LEAB or LEBA
2.0
—
2.0
—
ns
4
tW
LEBA or LEAB Pulse Width LOW
4.0
—
4.0
—
ns
5
tSK(O)
Output Skew[16]
—
0.5
—
0.5
ns
—
CY74FCT16543CT
CY74FCT162543CT
CY74FCT162H543CT
Parameter
Description
Min.
Max.
Unit
Fig.
No.[15]
tPLH
tPHL
Propagation Delay
Transparent Mode
A to B or B to A
1.5
5.1
ns
1, 3
tPLH
tPHL
Propagation Delay
LEBA to A, LEAB to B
1.5
5.6
ns
1, 5
tPZH
tPZL
Output Enable Time
OEBA or OEAB to A or B
CEBA or CEAB to A or B
1.5
7.8
ns
1, 7, 8
tPHZ
tPLZ
Output Disable Time
OEBA or OEAB to A or B
CEBA or CEAB to A or B
1.5
6.5
ns
1, 7, 8
tSU
Set-up Time HIGH or LOW
A or B to LEAB or LEBA
2.0
—
ns
4
tH
Hold Time HIGH or LOW
A or B to LEAB or LEBA
2.0
—
ns
4
tW
LEBA or LEAB Pulse Width LOW
4.0
—
ns
5
tSK(O)
Output Skew[16]
—
0.5
ns
—
Notes:
14. Minimum limits are specified but not tested on Propagation Delays.
15. See “Parameter Measurement Information” in the General Information section.
16. Skew between any two outputs of the same package switching in the same directional. This parameter is ensured by design.
5
CY74FCT16543T
CY74FCT162543T
CY74FCT162H543T
Ordering Information CY74FCT16543
Speed
(ns)
Ordering Code
5.1
CY74FCT16543CTPVC/PVCT
6.5
8.5
Package
Name
Package Type
Operating
Range
O56
56-Lead (300-Mil) SSOP
Industrial
CY74FCT16543ATPACT
Z56
56-Lead (240-Mil) TSSOP
Industrial
CY74FCT16543TPVC/PVCT
O56
56-Lead (300-Mil) SSOP
Industrial
Ordering Information CY74FCT162543
Speed
(ns)
5.1
Ordering Code
Package
Name
Package Type
74FCT162543CTPACT
Z56
56-Lead (240-Mil) TSSOP
CY74FCT162543CTPVC
O56
56-Lead (300-Mil) SSOP
Operating
Range
Industrial
74FCT162543CTPVCT
O56
56-Lead (300-Mil) SSOP
6.5
74FCT162543ATPACT
Z56
56-Lead (240-Mil) TSSOP
Industrial
8.5
CY74FCT162543TPVC/PVCT
O56
56-Lead (300-Mil) SSOP
Industrial
Ordering Information CY74FCT162H543T
Speed
(ns)
5.1
Ordering Code
74FCT162H543CTPACT
Package
Name
Z56
Package Type
56-Lead (240-Mil) TSSOP
6
Operating
Range
Industrial
CY74FCT16543T
CY74FCT162543T
CY74FCT162H543T
Package Diagrams
56-Lead Shrunk Small Outline Package O56
56-Lead Thin Shrunk Small Outline Package Z56
7
PACKAGE OPTION ADDENDUM
www.ti.com
27-Sep-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
74FCT162543ATPACT
ACTIVE
TSSOP
DGG
56
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74FCT162543CTPACT
ACTIVE
TSSOP
DGG
56
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74FCT162543CTPVCG4
ACTIVE
SSOP
DL
56
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74FCT162543CTPVCT
ACTIVE
SSOP
DL
56
1000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74FCT162543ETPACT
OBSOLETE
TSSOP
DGG
56
74FCT162543ETPVCT
OBSOLETE
SSOP
DL
56
74FCT162543TPVCG4
ACTIVE
SSOP
DL
56
74FCT162543TPVCTG4
ACTIVE
SSOP
DL
74FCT162H543CTPACT
ACTIVE
TSSOP
74FCT16543ATPACTE4
ACTIVE
74FCT16543ATPACTG4
20
TBD
Lead/Ball Finish
MSL Peak Temp (3)
Call TI
Call TI
Call TI
TBD
Call TI
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
56
1000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
DGG
56
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TSSOP
DGG
56
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
ACTIVE
TSSOP
DGG
56
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74FCT16543CTPVCG4
ACTIVE
SSOP
DL
56
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74FCT16543CTPVCTG4
ACTIVE
SSOP
DL
56
1000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74FCT16543TPVCG4
ACTIVE
SSOP
DL
56
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74FCT16543TPVCTG4
ACTIVE
SSOP
DL
56
1000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT162543CTPVC
ACTIVE
SSOP
DL
56
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT162543ETPAC
OBSOLETE
TSSOP
DGG
56
TBD
Call TI
Call TI
CY74FCT162543ETPVC
OBSOLETE
SSOP
DL
56
TBD
Call TI
Call TI
CY74FCT162543TPVC
ACTIVE
SSOP
DL
56
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT162543TPVCT
ACTIVE
SSOP
DL
56
1000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT16543ATPACT
ACTIVE
TSSOP
DGG
56
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT16543CTPVC
ACTIVE
SSOP
DL
56
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT16543CTPVCT
ACTIVE
SSOP
DL
56
1000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT16543ETPAC
OBSOLETE
TSSOP
DGG
56
TBD
Call TI
Call TI
CY74FCT16543ETPACT
OBSOLETE
TSSOP
DGG
56
TBD
Call TI
Call TI
CY74FCT16543ETPVC
OBSOLETE
SSOP
DL
56
TBD
Call TI
Call TI
CY74FCT16543ETPVCT
OBSOLETE
SSOP
DL
56
TBD
Call TI
Call TI
CY74FCT16543TPVC
ACTIVE
SSOP
DL
56
Green (RoHS &
no Sb/Br)
CU NIPDAU
20
20
20
20
20
20
20
Addendum-Page 1
Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com
27-Sep-2007
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
CY74FCT16543TPVCT
ACTIVE
SSOP
DL
56
1000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
FCT162543ATPACTE4
ACTIVE
TSSOP
DGG
56
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
FCT162543ATPACTG4
ACTIVE
TSSOP
DGG
56
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
FCT162543CTPACTE4
ACTIVE
TSSOP
DGG
56
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
FCT162543CTPACTG4
ACTIVE
TSSOP
DGG
56
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
FCT162543CTPVCTG4
ACTIVE
SSOP
DL
56
1000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
FCT162H543CTPACTE4
ACTIVE
TSSOP
DGG
56
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
FCT162H543CTPACTG4
ACTIVE
TSSOP
DGG
56
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
Diameter Width
(mm) W1 (mm)
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
W
Pin1
(mm) Quadrant
8.6
15.6
1.8
12.0
24.0
Q1
74FCT162543ATPACT
TSSOP
DGG
56
2000
330.0
24.4
74FCT162543CTPACT
TSSOP
DGG
56
2000
330.0
24.4
8.6
15.6
1.8
12.0
24.0
Q1
74FCT162543CTPVCT
SSOP
DL
56
1000
330.0
32.4
11.35
18.67
3.1
16.0
32.0
Q1
74FCT162H543CTPACT
TSSOP
DGG
56
2000
330.0
24.4
8.6
15.6
1.8
12.0
24.0
Q1
CY74FCT162543TPVCT
SSOP
DL
56
1000
330.0
32.4
11.35
18.67
3.1
16.0
32.0
Q1
CY74FCT16543ATPACT
TSSOP
DGG
56
2000
330.0
24.4
8.6
15.6
1.8
12.0
24.0
Q1
CY74FCT16543CTPVCT
SSOP
DL
56
1000
330.0
32.4
11.35
18.67
3.1
16.0
32.0
Q1
CY74FCT16543TPVCT
SSOP
DL
56
1000
330.0
32.4
11.35
18.67
3.1
16.0
32.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
74FCT162543ATPACT
TSSOP
DGG
56
2000
346.0
346.0
41.0
74FCT162543CTPACT
TSSOP
DGG
56
2000
346.0
346.0
41.0
74FCT162543CTPVCT
SSOP
DL
56
1000
346.0
346.0
49.0
74FCT162H543CTPACT
TSSOP
DGG
56
2000
346.0
346.0
41.0
CY74FCT162543TPVCT
SSOP
DL
56
1000
346.0
346.0
49.0
CY74FCT16543ATPACT
TSSOP
DGG
56
2000
346.0
346.0
41.0
CY74FCT16543CTPVCT
SSOP
DL
56
1000
346.0
346.0
49.0
CY74FCT16543TPVCT
SSOP
DL
56
1000
346.0
346.0
49.0
Pack Materials-Page 2
MECHANICAL DATA
MTSS003D – JANUARY 1995 – REVISED JANUARY 1998
DGG (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0,27
0,17
0,50
48
0,08 M
25
6,20
6,00
8,30
7,90
0,15 NOM
Gage Plane
1
0,25
24
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
48
56
64
A MAX
12,60
14,10
17,10
A MIN
12,40
13,90
16,90
DIM
4040078 / F 12/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold protrusion not to exceed 0,15.
Falls within JEDEC MO-153
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001
DL (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0.025 (0,635)
0.0135 (0,343)
0.008 (0,203)
48
0.005 (0,13) M
25
0.010 (0,25)
0.005 (0,13)
0.299 (7,59)
0.291 (7,39)
0.420 (10,67)
0.395 (10,03)
Gage Plane
0.010 (0,25)
1
0°–ā8°
24
0.040 (1,02)
A
0.020 (0,51)
Seating Plane
0.110 (2,79) MAX
0.004 (0,10)
0.008 (0,20) MIN
PINS **
28
48
56
A MAX
0.380
(9,65)
0.630
(16,00)
0.730
(18,54)
A MIN
0.370
(9,40)
0.620
(15,75)
0.720
(18,29)
DIM
4040048 / E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
Falls within JEDEC MO-118
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
24-Apr-2015
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
74FCT162543ATPACT
ACTIVE
TSSOP
DGG
56
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
FCT162543A
74FCT162543CTPACT
ACTIVE
TSSOP
DGG
56
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
FCT162543C
74FCT162543CTPVCG4
ACTIVE
SSOP
DL
56
20
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
FCT162543C
74FCT162543CTPVCT
ACTIVE
SSOP
DL
56
1000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
FCT162543C
74FCT162543ETPACT
OBSOLETE
TSSOP
DGG
56
TBD
Call TI
Call TI
-40 to 85
74FCT162543ETPVCT
OBSOLETE
SSOP
DL
56
TBD
Call TI
Call TI
-40 to 85
74FCT162543TPVCTG4
ACTIVE
SSOP
DL
56
1000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
FCT162543
74FCT16543ATPACTG4
ACTIVE
TSSOP
DGG
56
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
FCT16543A
TBD
Call TI
Call TI
-40 to 85
20
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
TBD
Call TI
Call TI
-40 to 85
74FCT16543TPVCTG4
OBSOLETE
SSOP
DL
56
CY74FCT162543CTPVC
ACTIVE
SSOP
DL
56
CY74FCT162543ETPAC
OBSOLETE
TSSOP
DGG
56
CY74FCT162543ETPVC
OBSOLETE
SSOP
DL
56
TBD
Call TI
Call TI
-40 to 85
CY74FCT162543TPVC
ACTIVE
SSOP
DL
56
20
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
FCT162543
CY74FCT162543TPVCT
ACTIVE
SSOP
DL
56
1000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
FCT162543
CY74FCT16543ATPACT
ACTIVE
TSSOP
DGG
56
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
FCT16543A
CY74FCT16543CTPVC
ACTIVE
SSOP
DL
56
20
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
FCT16543C
CY74FCT16543CTPVCT
ACTIVE
SSOP
DL
56
1000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
FCT16543C
CY74FCT16543ETPAC
OBSOLETE
TSSOP
DGG
56
TBD
Call TI
Call TI
-40 to 85
CY74FCT16543ETPACT
OBSOLETE
TSSOP
DGG
56
TBD
Call TI
Call TI
-40 to 85
CY74FCT16543ETPVC
OBSOLETE
SSOP
DL
56
TBD
Call TI
Call TI
-40 to 85
CY74FCT16543ETPVCT
OBSOLETE
SSOP
DL
56
TBD
Call TI
Call TI
-40 to 85
Addendum-Page 1
FCT162543C
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
24-Apr-2015
Status
(1)
Package Type Package Pins Package
Drawing
Qty
CY74FCT16543TPVC
ACTIVE
SSOP
DL
56
CY74FCT16543TPVCT
OBSOLETE
SSOP
DL
56
20
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
TBD
Call TI
Call TI
-40 to 85
Device Marking
(4/5)
FCT16543
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
Samples
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Aug-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
15.6
1.8
12.0
24.0
Q1
74FCT162543ATPACT
TSSOP
DGG
56
2000
330.0
24.4
74FCT162543CTPACT
TSSOP
DGG
56
2000
330.0
24.4
8.6
15.6
1.8
12.0
24.0
Q1
74FCT162543CTPVCT
SSOP
DL
56
1000
330.0
32.4
11.35
18.67
3.1
16.0
32.0
Q1
CY74FCT162543TPVCT
SSOP
DL
56
1000
330.0
32.4
11.35
18.67
3.1
16.0
32.0
Q1
CY74FCT16543ATPACT
TSSOP
DGG
56
2000
330.0
24.4
8.6
15.6
1.8
12.0
24.0
Q1
CY74FCT16543CTPVCT
SSOP
DL
56
1000
330.0
32.4
11.35
18.67
3.1
16.0
32.0
Q1
Pack Materials-Page 1
8.6
B0
(mm)
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Aug-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
74FCT162543ATPACT
TSSOP
DGG
56
2000
367.0
367.0
45.0
74FCT162543CTPACT
TSSOP
DGG
56
2000
367.0
367.0
45.0
74FCT162543CTPVCT
SSOP
DL
56
1000
367.0
367.0
55.0
CY74FCT162543TPVCT
SSOP
DL
56
1000
367.0
367.0
55.0
CY74FCT16543ATPACT
TSSOP
DGG
56
2000
367.0
367.0
45.0
CY74FCT16543CTPVCT
SSOP
DL
56
1000
367.0
367.0
55.0
Pack Materials-Page 2
PACKAGE OUTLINE
DGG0056A
TSSOP - 1.2 mm max height
SCALE 1.200
SMALL OUTLINE PACKAGE
C
8.3
TYP
7.9
SEATING PLANE
PIN 1 ID
AREA
A
0.1 C
54X 0.5
56
1
14.1
13.9
NOTE 3
2X
13.5
28
B
6.2
6.0
29
56X
0.27
0.17
0.08
1.2 MAX
C A
B
(0.15) TYP
SEE DETAIL A
0.25
GAGE PLANE
0 -8
0.15
0.05
0.75
0.50
DETAIL A
TYPICAL
4222167/A 07/2015
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. Reference JEDEC registration MO-153.
www.ti.com
EXAMPLE BOARD LAYOUT
DGG0056A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
56X (1.5)
SYMM
1
56
56X (0.3)
54X (0.5)
(R0.05)
TYP
SYMM
28
29
(7.5)
LAND PATTERN EXAMPLE
SCALE:6X
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
0.05 MAX
ALL AROUND
0.05 MIN
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4222167/A 07/2015
NOTES: (continued)
5. Publication IPC-7351 may have alternate designs.
6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DGG0056A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
56X (1.5)
SYMM
1
56
56X (0.3)
54X (0.5)
(R0.05) TYP
SYMM
29
28
(7.5)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:6X
4222167/A 07/2015
NOTES: (continued)
7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.
www.ti.com
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