ON ASM3P2183AG-08SR Emi reduction ic Datasheet

ASM3P2183A
EMI Reduction IC
Description
The ASM3P2183A is a versatile spread spectrum frequency
modulator designed specifically for a wide range of input clock
frequencies from 6 MHz to 90 MHz. (Refer to Input Frequency and
Modulation Rate Table). The ASM3P2183A can generate an EMI
reduced clock from an OSC or a system generated clock. The
ASM3P2183A offers a Down Spread clock with a percentage
deviation of −1.25% and a Center Spread clock with a percentage
deviation of ± 0.42%.
The ASM3P2183A reduces electromagnetic interference (EMI) at
the clock source, allowing system wide reduction of EMI of down
stream clock and data dependent signals. The ASM3P2183A allows
significant system cost savings by reducing the number of circuit
board layers ferrite beads, shielding and other passive components that
are traditionally required to pass EMI regulations.
The ASM3P2183A uses the most efficient and optimized
modulation profile approved by the FCC and is implemented in a
proprietary all digital method.
The ASM3P2183A modulates the output of a single PLL in order to
“spread” the bandwidth of a synthesized clock, and more importantly,
decreases the peak amplitudes of its harmonics. This results in
significantly lower system EMI compared to the typical narrow band
signal produced by oscillators and most frequency generators.
Lowering EMI by increasing a signal’s bandwidth is called ‘spread
spectrum clock generation.’
Applications
The ASM3P2183A is targeted towards EMI management for
memory and LVDS interfaces in mobile graphic chipsets and
high−speed digital applications such as PC peripheral devices,
consumer electronics, and embedded controller systems.
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SOIC−8
S SUFFIX
CASE 751BD
TSSOP−8
T SUFFIX
CASE 948AL
PIN CONFIGURATION
XIN / CLKIN
1
FS1
XOUT
FS0
VSS
VDD
ModOUT
SS%
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
Features
• FCC Approved Method of EMI Attenuation
• Provides up to 15 dB EMI Reduction
• Generates a 1X Low EMI Spread Spectrum Clock of the Input
Frequency
• Input Frequency Range: 6 MHz to 90 MHz
• Internal Loop Filter Minimizes External Components and Board
•
•
•
•
•
•
•
•
•
Space
Selectable Spread Options: Down and Center Spread
2 Spread Frequency Deviation Selections: −1.25% or ± 0.42%
Low Inherent Cycle−to−Cycle Jitter
Supply Voltage: 3.3 V ± 0.3 V
Low Power CMOS Design
Supports Notebook VGA and Other LCD Timing Controller
Applications
Products are Available for Industrial Temperature Range
Available in 8−pin SOIC and TSSOP Packages
These are Pb−Free Devices
© Semiconductor Components Industries, LLC, 2011
August, 2011 − Rev. 3
1
Publication Order Number:
ASM3P2183A/D
ASM3P2183A
VDD
SS%
FS0 FS1
PLL
Modulation
XIN/CLKIN
Crystal
Oscillator
Frequency
Divider
XOUT
Loop
Filter
Phase
Detector
Feedback
Divider
Output
Divider
VCO
ModOUT
VSS
Figure 1. Block Diagram
Table 1. PIN DESCRIPTION
Pin#
Pin Name
Type
Description
1
XIN / CLKIN
I
Crystal connection or external frequency input. This pin has dual functions. It can be connected to either an external crystal or an external reference clock.
2
XOUT
I
Crystal connection. Input connection for an external crystal. If using an external reference,
this pin must be left unconnected.
3
VSS
P
Ground to entire chip.
4
SS%
I
Spread range select. Digital logic input used to select frequency deviation
(Refer to Spread Deviation Selection Table). This pin has an internal pull−up resistor.
5
ModOUT
O
Spread spectrum low EMI output.
6
VDD
P
Power supply for the entire chip.
7
FS0
I
Frequency range select. Digital logic input used to select frequency range
(Refer to Input Frequency and Modulation Rate Table). This pin has an internal
pull−up resistor.
8
FS1
I
Frequency range select. Digital logic input used to select frequency range
(Refer to Input Frequency and Modulation Rate Table). This pin has an internal
pull−up resistor.
Table 2. INPUT FREQUENCY AND MODULATION RATE TABLE
FS1 (pin 8)
FS0 (pin 7)
Frequency Range
0
0
6 MHz to 13 MHz
0
1
12 MHz to 25 MHz
1
0
25 MHz to 50 MHz
1
1
50 MHz to 90 MHz
Table 3. SPREAD DEVIATION SELECTION TABLE
SS% (pin 4)
Spread Deviation (%)
0
− 1.25
1
± 0.42
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2
ASM3P2183A
Table 4. ABSOLUTE MAXIMUM RATINGS
Symbol
VDD, VIN
TSTG
Parameter
Rating
Unit
Voltage on any pin with respect to Ground
−0.5 to +4.6
V
Storage temperature
−65 to +125
°C
°C
Ts
Max. Soldering Temperature (10 sec)
260
TJ
Junction Temperature
150
°C
2
KV
TDV
Static Discharge Voltage (As per JEDEC STD22− A114−B)
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 5. RECOMMENDED OPERATING CONDITIONS
Symbol
TA
VDD
Parameter
Min
Operating Temperature
Typ
0
Core Voltage
Max
Unit
+70
°C
+3.0
+3.3
+3.6
V
Table 6. DC ELECTRICAL CHARACTERISTICS
Symbol
Min
Typ
Max
Unit
VIL
Input low voltage
Parameter
VSS − 0.3
−
0.8
V
VIH
Input high voltage
2.0
−
VDD + 0.3
V
IIL
Input low current
−
−
−35
mA
IIH
Input high current
−
−
35
mA
IXOL
XOUT Output low current
(@ 0.4 V, VDD = 3.3 V)
−
3
−
mA
IXOH
XOUT Output high current
(@ 2.5 V, VDD = 3.3 V)
−
3
−
mA
VOL
Output low voltage (VDD = 3.3 V, IOL = 20 mA)
−
−
0.4
V
VOH
Output high voltage (VDD = 3.3 V, IOH = 20 mA)
2.5
−
−
V
ICC
Dynamic supply current
Normal mode (3.3 V, 90 MHz and 10 pF loading)
−
28
−
mA
IDD
Static supply current (Note 1)
VDD
Operating voltage
tON
ZOUT
−
7.0
−
mA
3.0
3.3
3.6
V
Power up time (first locked clock cycle after power up)
−
0.18
−
mS
Clock out impedance
−
50
−
W
Min
Typ
Max
Unit
Input frequency
6
−
90
MHz
Output frequency
6
−
90
MHz
1.1
nS
1. XIN /CLKIN pin is pulled low.
Table 7. AC ELECTRICAL CHARACTERISTICS
Symbol
fIN
ModOUT
Parameter
tLH (Note 2)
Output rise time (measured at 0.8 V to 2.0 V)
0.3
0.9
tHL (Note 2)
Output fall time (measured at 2.0 V to 0.8 V)
0.5
1.0
1.2
nS
tJC
Jitter (cycle to cycle)
−
−
200
pS
TD
Output duty cycle
45
50
55
%
2. tLH and tHL are measured with a capacitive load of 15 pF at 27 MHz.
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ASM3P2183A
PACKAGE DIMENSIONS
TSSOP8, 4.4x3
CASE 948AL−01
ISSUE O
b
SYMBOL
MIN
NOM
A
E1
E
MAX
1.20
A1
0.05
A2
0.80
b
0.19
0.30
c
0.09
0.20
D
2.90
3.00
3.10
E
6.30
6.40
6.50
E1
4.30
4.40
4.50
0.15
0.90
e
0.65 BSC
L
1.00 REF
L1
0.50
θ
0º
0.60
1.05
0.75
8º
e
TOP VIEW
D
A2
c
q1
A
A1
L1
SIDE VIEW
L
END VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-153.
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4
ASM3P2183A
PACKAGE DIMENSIONS
SOIC 8, 150 mils
CASE 751BD−01
ISSUE O
E1
E
SYMBOL
MIN
A
1.35
1.75
A1
0.10
0.25
b
0.33
0.51
c
0.19
0.25
D
4.80
5.00
E
5.80
6.20
E1
3.80
4.00
MAX
1.27 BSC
e
PIN # 1
IDENTIFICATION
NOM
h
0.25
0.50
L
0.40
1.27
θ
0º
8º
TOP VIEW
D
h
A1
θ
A
c
e
b
L
END VIEW
SIDE VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MS-012.
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5
ASM3P2183A
Table 8. ORDERING INFORMATION
Part Number
Marking
Package Type
Temperature
ASM3P2183A−08ST
3P2183A
8−Pin SOIC, TUBE
Commercial
ASM3P2183A−08SR
3P2183A
8−Pin SOIC, TAPE & REEL
Commercial
ASM3P2183A−08TT
3P2183A
8−Pin TSSOP, TUBE
Commercial
ASM3P2183A−08TR
3P2183A
8−Pin TSSOP, TAPE & REEL
Commercial
ASM3P2183AF−08ST
3P2183AF
8−Pin SOIC, TUBE, Pb Free
Commercial
ASM3P2183AF−08SR
3P2183AF
8−Pin SOIC, TAPE & REEL, Pb Free
Commercial
ASM3P2183AF−08TT
3P2183AF
8−Pin TSSOP, TUBE, Pb Free
Commercial
ASM3P2183AF−08TR
3P2183AF
8−Pin TSSOP, TAPE & REEL, Pb Free
Commercial
ASM3P2183AG−08ST
3P2183AG
8−Pin SOIC, TUBE, Green
Commercial
ASM3P2183AG−08SR
3P2183AG
8−Pin SOIC, TAPE & REEL, Green
Commercial
ASM3P2183AG−08TT
3P2183AG
8−Pin TSSOP, TUBE, Green
Commercial
ASM3P2183AG−08TR
3P2183AG
8−Pin TSSOP, TAPE & REEL, Green
Commercial
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ASM3P2183A/D
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