TC74VHCV374FT/FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VHCV374FT,TC74VHCV374FK Octal Schmitt D-Type Flip Flop with 3-State Output The TC74VHCV374 is an advanced high speed CMOS OCTAL FLIP-FLOP with 3-STATE OUTPUT fabricated with silicon gate CMOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. This 8-bit D-type flip-flop is controlled by a clock input (CK) and an output enable input ( OE ). When the OE input is high, the eight outputs are in a high impedance state. Input pin have hysteresis between the positive-going and negative-going thresholds. Thus the TC74VHCV374 are capable of squaring up transitions of slowly changing input signals and provides an improved noise immunity. Input protection and output circuit ensure that 0 to 5.5 V can be applied to the input and output (Note) pins without regard to the supply voltage. These structure prevents device destruction due to mismatched supply and input/output voltages such as battery back up, hot board insertion, etc. Note: Output in off-state TC74VHCV374FK Weight TSSOP20-P-0044-0.65A VSSOP20-P-0030-0.50 Features • High speed: fmax = 185 MHz (typ.) at VCC = 5 V • Low power dissipation: ICC = 2 μA (max) at Ta = 25°C • Wide operating voltage range: VCC (opr) = 1.8 V to 5.5 V • Ouput current: |IOH|/IOL = 16 mA (min) (VCC = 4.5 V) • Available in TSSOP and VSSOP (US) • Power-down protection provided on all inputs and outputs • TC74VHCV374FT : 0.08 g ( typ.) : 0.03 g ( typ.) Pin and function compatible with the 74 series (74AC/VHC/HC/F/ALS/LS etc.) 374 typ 1 2010-07-09 TC74VHCV374FT/FK Pin Assignment OE 1 20 VCC Q0 2 19 Q7 D0 3 18 D7 D1 4 17 D6 Q1 5 16 Q6 Q2 6 15 Q5 D2 7 14 D5 D3 8 13 D4 Q3 9 12 Q4 GND 10 11 CK (top view) Truth Table Inputs Output OE CK D H X X Z X Qn L L L L L H H X: Don’t care Z: High impedance Qn: No change System Diagram D0 D1 3 11 D2 4 D3 7 D4 8 D5 13 D6 17 14 D7 18 D D D D D D D D CK Q CK Q CK Q CK Q CK Q CK Q CK Q CK Q CK 1 OE 2 Q0 5 Q1 6 9 Q2 Q3 2 12 Q4 15 Q5 16 Q6 19 Q7 2010-07-09 TC74VHCV374FT/FK Absolute Maximum Ratings (Note1) Characteristics Symbol Rating Unit Supply voltage range VCC −0.5 to 7.0 V DC input voltage VIN −0.5 to 7.0 V −0.5 to 7.0 (Note 2) −0.5 to VCC + 0.5 (Note 3) V DC output voltage VOUT Input diode current IIK −50 Output diode current IOK ±50 DC output current IOUT ±50 mA Power dissipation PD 180 mW ICC/IGND ±100 mA Tstg −65 to 150 °C DC VCC/ground current Storage temperature mA (Note 4) mA Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 2: Output in off-state Note 3: High or low state. IOUT absolute maximum rating must be observed. Note 4: VOUT < GND, VOUT > VCC Operating Ranges (Note1) Characteristics Symbol Rating Unit Power supply voltage VCC 1.8 to 5.5 V Input voltage VIN 0 to 5.5 V Output voltage VOUT 0 to 5.5 (Note 2) 0 to VCC (Note 3) V Operating temperature Topr −40 to 85 °C Input rise and fall time dt/dv 0 to 20(Vcc=3.3 ± 0.3V) 0 to 1(Vcc=5 ± 0.5V) ms/V Note 1: The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must be tied to either VCC or GND. Note 2: Output in off-state Note 3: High or low state. 3 2010-07-09 TC74VHCV374FT/FK Electrical Characteristics DC Characteristics Test Condition Characteristics Positive threshold voltage Negative threshold voltage Hysteresis voltage Symbol VP VN VH VOH Min Typ. Max Min Max ― 1.8 2.3 3.0 4.5 5.5 ― ― ― ― ― ― ― ― ― ― 1.65 1.85 2.20 3.15 3.85 ― ― ― ― ― 1.65 1.85 2.20 3.15 3.85 ― 1.8 2.3 3.0 4.5 5.5 0.15 0.45 0.90 1.35 1.65 ― ― ― ― ― ― ― ― ― ― 0.15 0.45 0.90 1.35 1.65 ― ― ― ― ― ― 1.8 2.3 3.0 4.5 5.5 0.15 0.20 0.30 0.40 0.50 ― ― ― ― ― 1.05 1.10 1.20 1.40 1.60 0.15 0.20 0.30 0.40 0.50 1.05 1.10 1.20 1.40 1.60 1.8 3.0 4.5 1.7 2.9 4.4 1.8 3.0 4.5 ― ― ― 1.7 2.9 4.4 ― ― ― 3.0 2.58 ― ― 2.48 ― 4.5 3.94 ― ― 3.80 ― IOL = 50 μA VIN = VIH or IOL = 8 mA VIL 1.8 3.0 4.5 ― ― ― 0.0 0.0 0.0 0.1 0.1 0.1 ― ― ― 0.1 0.1 0.1 3.0 ― ― 0.36 ― 0.44 IOL = 16 mA 4.5 ― ― 0.44 ― 0.55 1.8 to 5.5 ― ― ±0.5 ― ±5.0 μA VIN = VIH or IOH = −8 mA VIL IOH = −16 mA Low-level output voltage VOL Unit VCC (V) IOH = −50 μA High-level output voltage Ta = −40 to 85°C Ta = 25°C 3-state output off-state current IOZ VIN = VIH or VIL VOUT = 0 to 5.5V Power-off leakage current IOFF VIN/VOUT = 5.5 V V V 0 ― ― 0.5 ― 5.0 μA ― ― ±0.1 ― ±1.0 μA ― ― 2.0 ― 20.0 μA Input leakage current IIN VIN = 5.5 V or GND 0 to 5.5 Quiescent supply current ICC VIN = VCC or GND 5.5 4 V 2010-07-09 TC74VHCV374FT/FK Timing Requirements (input: tr = tf = 3 ns) Characteristics Symbol Minimum pulse width tw (H) (CK) tw (L) Minimum set-up time Minimum hold time Test Condition ― ts ― th ― 5 Ta = 25°C Ta = −40 to 85°C VCC (V) Typ. Limit Limit 2.5 ± 0.2 ― 6.0 7.0 3.3 ± 0.3 ― 5.0 5.5 5.0 ± 0.5 ― 5.0 5.0 2.5 ± 0.2 ― 5.0 5.5 3.3 ± 0.3 ― 4.5 4.5 5.0 ± 0.5 ― 3.0 3.0 2.5 ± 0.2 ― 2.5 2.5 3.3 ± 0.3 ― 2.0 2.0 5.0 ± 0.5 ― 2.0 2.0 Unit ns ns ns 2010-07-09 TC74VHCV374FT/FK AC Characteristics (input: tr = tf = 3 ns) Characteristics Test Condition Symbol VCC (V) CL (pF) Min Typ. Max Min Max 15 ― 12.1 16.3 1.0 19.0 50 ― 14.9 19.3 1.0 23.0 15 ― 7.1 12.7 1.0 15.0 50 ― 9.2 16.2 1.0 18.5 15 ― 5.4 8.1 1.0 9.5 50 ― 7.1 10.1 1.0 11.5 15 ― 9.4 15.9 1.0 19.0 50 ― 12.3 18.8 1.0 22.0 15 ― 6.5 11.0 1.0 13.0 50 ― 8.7 14.5 1.0 16.5 15 ― 4.5 7.6 1.0 9.0 50 ― 6.2 9.6 1.0 11.0 2.5 ± 0.2 50 ― 14.5 17.3 1.0 19.0 3.3 ± 0.3 50 ― 10.9 14.0 1.0 16.0 5.0 ± 0.5 50 ― 8.0 8.8 1.0 10.0 15 60 80 ― 50 ― 2.5 ± 0.2 Propagation delay time tpLH (CK-Q) tpHL ― 3.3 ± 0.3 5.0 ± 0.5 2.5 ± 0.2 3-state output enable time tpZL tpZH RL = 1 kΩ 3.3 ± 0.3 5.0 ± 0.5 3-state output disable time tpLZ tpHZ RL = 1 kΩ 2.5 ± 0.2 Maximum clock frequency fmax ― 50 50 65 ― 40 ― 15 80 140 ― 70 ― 50 55 105 ― 50 ― 15 130 185 ― 110 ― 50 85 140 ― 75 ― 2.5 ± 0.2 50 ― ― 2.0 ― 2.0 3.3 ± 0.3 50 ― ― 1.5 ― 1.5 5.0 ± 0.5 50 ― ― 1.0 ― 1.0 3.3 ± 0.3 5.0 ± 0.5 Output to output skew Input capacitance Output capacitance Power dissipation capacitance tosLH tosHL (Note 1) Ta = −40 to 85°C Ta = 25°C Unit ns ns ns MHz ns CIN ― ― 4 10 ― 10 pF COUT ― ― 6 ― ― ― pF ― 21 ― ― ― pF CPD (Note 2) Note 1: Parameter guaranteed by design. tosLH = |tpLHm − tpLHn|, tosHL = |tpHLm − tpHLn| Note 2: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr) = CPD·VCC·fIN + ICC/8 (per F/F) And the total CPD when n pcs. of latch operate can be gained by the following equation: CPD (total) = 11+ 10·n 6 2010-07-09 TC74VHCV374FT/FK Noise Characteristics (input: tr = tf = 3 ns) Characteristics Test Condition Symbol Ta = 25°C VCC (V) Typ. Max 3.3 0.3 ― 5.0 0.7 ― 3.3 -0.1 ― 5.0 -0.4 ― Unit Quiet output maximum dynamic VOL VOLP CL = 50 pF Quiet output minimum dynamic VOL VOLV CL = 50 pF Minimum high level dynamic input voltage VIHD CL = 50 pF 5.0 ― 3.5 V Maximum low level dynamic input voltage VILD CL = 50 pF 5.0 ― 1.5 V 7 V V 2010-07-09 TC74VHCV374FT/FK Package Dimensions Weight: 0.08 g (typ.) 8 2010-07-09 TC74VHCV374FT/FK Package Dimensions Weight: 0.03 g (typ.) 9 2010-07-09 TC74VHCV374FT/FK RESTRICTIONS ON PRODUCT USE • Toshiba Corporation, and its subsidiaries and affiliates (collectively “TOSHIBA”), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively “Product”) without notice. • This document and any information herein may not be reproduced without prior written permission from TOSHIBA. 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