AD ADA4627-1BRZ 36 v, 19 mhz, low noise, low bias current, jfet operational amplifier Datasheet

36 V, 19 MHz, Low Noise, Low Bias Current,
JFET Operational Amplifier
ADA4627-1
PIN CONFIGURATIONS
Low offset voltage: 200 μV maximum
Offset drift: 1 μV/°C typical
Very low input bias current: 5 pA maximum
Extended temperature range: −40ºC to +125ºC
±5 V to ±15 V dual-supply
Guaranteed GBW: 16 MHz
Voltage noise: 6.1 nV/√Hz at 1 kHz
High slew rate: 60 V/μs
High gain: 120 dB typical
High CMRR: 116 dB typical
High PSRR: 112 dB typical
Low supply current: 7.5 mA maximum
NULL 1
–IN 2
ADA4627-1
+IN 3
TOP VIEW
(Not to Scale)
V– 4
8
NC
7
V+
6
OUT
5
NULL
NC = NO CONNECT
07559-001
FEATURES
Figure 1. 8-Lead SOIC_N (R-8)
+IN 3
V– 4
APPLICATIONS
PIN 1
INDICATOR
8 NC
ADA4627-1
7 V+
TOP VIEW
(Not toScale)
5 NC
6 OUT
NOTES
1. NC = NO CONNECT.
2. CONNECT EXPOSED PAD TO GROUND.
High impedance sensors
Photo diode amplifier
Precision instrumentation
Phase-locked loop filters
High end, professional audio
DAC output amplifier
ATE
Medical
07559-002
NC 1
–IN 2
Figure 2. 8-Lead LFCSP_VD (CP-8-2)
GENERAL DESCRIPTION
The ADA4627-1 is a wide bandwidth precision amplifier
featuring low noise, very low offset, drift, and bias current.
Operation is specified from ±5 V to ±15 V dual supply.
The ADA4627-1 provides benefits previously found in few
amplifiers. This amplifier combines the best specifications of
precision dc and high speed ac op amps.
With a typical offset voltage of only 70 μV, drift of less than
1 μV/°C, and noise of only 0.86 μV p-p (0.1 Hz to 10 Hz), the
ADA4627-1 is suited for applications in which error sources
cannot be tolerated.
ature range of −40°C to +125°C. It is available in tiny 8-lead
LFCSP and 8-lead SOIC packages.
The ADA4627-1 is a member of a growing series of high speed,
precision op amps offered by Analog Devices, Inc (see Table 1).
Table 1. High Speed Precision Op Amps
Supply
Single
Dual
5 V Low
Cost
AD8615
AD8616
Quad
AD8618
5V
AD8651
AD8652
26 V Low
Power
AD8610
AD8620
30 V Low
Cost
AD8510
AD8512
30 V
ADA4627-1
AD8513
The ADA4627-1 is specified for both the industrial temperature
range of −25°C to +85°C and the extended industrial temper-
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2009 Analog Devices, Inc. All rights reserved.
ADA4627-1
TABLE OF CONTENTS
Features .............................................................................................. 1
Input Voltage Range ................................................................... 12
Applications ....................................................................................... 1
Input Offset Voltage Adjust Range........................................... 12
Pin Configurations ........................................................................... 1
Input Bias Current ...................................................................... 12
General Description ......................................................................... 1
Noise Considerations ................................................................. 12
Revision History ............................................................................... 2
THD + N Measurements ........................................................... 12
Specifications..................................................................................... 3
Electrical Characteristics—30 V Operation ............................. 3
Printed Circuit Board Layout, Bias Current, and
Bypassing ..................................................................................... 13
Absolute Maximum Ratings............................................................ 5
Output Phase Reversal ............................................................... 13
Thermal Resistance ...................................................................... 5
Driving Capacitive Loads .......................................................... 13
ESD Caution .................................................................................. 5
Outline Dimensions ....................................................................... 14
Typical Performance Characteristics ............................................. 6
Ordering Guide .......................................................................... 15
Theory of Operation ...................................................................... 12
REVISION HISTORY
9/09—Rev. 0 to Rev. A
Changes to General Description Section ...................................... 1
Changes to Table 2 ............................................................................ 3
Updated Outline Dimensions ....................................................... 14
Changes to Ordering Guide .......................................................... 15
7/09—Revision 0: Initial Version
Rev. A | Page 2 of 16
ADA4627-1
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—30 V OPERATION
VSY = ±15 V, VCM = 0 V, TA = 25°C, unless otherwise noted.
Table 2.
B Grade
Parameter
INPUT CHARACTERISTICS
Offset Voltage 1
Symbol
Conditions
Min
VOS
Offset Voltage Drift, Average
Power Supply Rejection Ratio
∆VOS/∆T
PSRR
Input Bias Current 2
IB
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +125°C
VSY = ±4.5 V to ±18 V
−40°C ≤ TA ≤ +125°C
106
101
Max
70
200
350
400
2
1
112
1
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
Input Offset Current
IOS
0.5
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
NOISE PERFORMANCE
Voltage Noise Density
Voltage Noise
Current Noise Density
Current Noise
Input Resistance
Input Capacitance,
Differential Mode
Input Capacitance, Common
Mode
Input Voltage Range
en
en p-p
in
In p-p
RIN
CINDM
16.5
7.9
6.1
4.8
0.69
1.6
30
10
8
CINCM
Common-Mode Rejection
Ratio
CMRR
Large Signal Voltage Gain
AVO
DYNAMIC PERFORMANCE
Slew Rate
f = 10 Hz
f = 100 Hz
f = 1 kHz
f = 10 kHz
0.1 Hz to 10 Hz
f = 100 Hz
0.1 Hz to 10 Hz
SR
SR
Settling Time to 0.01%
tS
Settling Time to 0.1%
tS
Gain Bandwidth Product
Phase Margin
Total Harmonic Distortion +
Noise
GBP
ΦM
THD + N
A Grade
Typ
Min
103
99
10 V step, RL = 1 kΩ, CL = 100 pF,
AV = +1
10 V step, RL = 1 kΩ, CL =100 pF,
Rs = Rf = 1 kΩ AV = −1
VIN = 10 V step, CL = 35 pF,
RL = 1 kΩ, AV = −1
VIN = 10 V step, CL = 35 pF,
RL = 1 kΩ, AV = −1
RL = 1 kΩ, CL = 20 pF, AV = 1
RL = 1 kΩ, CL = 20 pF, AV = 1
f = 1 kHz, AV = 1
−11
−10.5
106
98
112
110
102
120
Unit
120
300
410
660
3
μV
1
108
1
40
20
8
6
1.6
16.5
7.9
6.1
4.8
0.69
2.5
48
10
8
0.5
−11
−10.5
100
97
106
104
100
110
μV
μV/°C
dB
dB
pA
nA
nA
pA
nA
nA
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
μV p-p
fA/√Hz
fA p-p
TΩ
pF
pF
V
V
dB
120
dB
dB
dB
V/μs
56/78 3
40
56/783
40
82/843
40
82/843
Rev. A | Page 3 of 16
40
20
8
6
1.6
+11
+10.5
40
16 4
5
0.5
2
5
0.5
2
7
+11
+10.5
116
Max
5
0.5
2
5
0.5
2
7
−40°C ≤ TA ≤ +125°C
−40°C ≤ TA ≤ +125°C,
VCM = −11 V to +11 V
VCM = −10.5 V to +10.5 V
RL = 1 kΩ, VO = −10 V to +10 V
−40 ≤ TA ≤ +85°C
−40 ≤ TA ≤ +125°C
Typ
550
550
ns
450
450
ns
19
72
0.000045
MHz
Degrees
%
19
72
0.000045
164
ADA4627-1
B Grade
Parameter
POWER SUPPLY
Supply Current per Amplifier
Symbol
Conditions
ISY
IO = 0 mA
−40°C ≤ TA ≤ +125°C
OUTPUT CHARACTERISTICS
Output Voltage High
VOH
Output Voltage Low
VOL
Output Current
Short-Circuit Current
Closed-Loop Output
Impedance
Iout
ISC
ZOUT
RL = 1 kΩ to VCM
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
RL = 1 kΩ to VCM
−40°C ≤ TA ≤ +85°C
−40°C ≤ TA ≤ +125°C
VO = ±10 V
TA = 25°C
f = 1 MHz, AV = −100
Min
12.0
11.8
11.7
Max
±7.0
±7.5
±7.8
12.3
−12.7
±45
+70/−55
41
1
VOS is measured fully warmed-up.
Tested/extrapolated from 125°C
3
Rising/falling.
4
Not tested. Guaranteed by simulation and characterization.
2
Rev. A | Page 4 of 16
A Grade
Typ
−12.3
−12.1
−12.0
Min
12.0
11.8
11.7
−12.7
Typ
Max
Unit
±7.0
±7.5
±7.8
mA
mA
12.3
−12.3
−12.1
−12.0
±45
+70/−55
41
V
V
V
V
V
V
mA
mA
Ω
ADA4627-1
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Table 3.
Parameter
Supply Voltage
Input Voltage Range 1
Input Current1
Differential Input Voltage2
Output Short-Circuit Duration to GND
Storage Temperature Range
Operating Temperature Range
Junction Temperature Range
Lead Temperature (Soldering, 60 sec)
ESD Human Body Model
Rating
36 V
(V−) − 0.3 V to (V+) + 0.3 V
±10 mA
±VSY
Indefinite
−65°C to +150°C
−40°C to +125°C
−65°C to +150°C
300°C
2.5 kV
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages. This
was measured using a standard two-layer board. For the LFCSP
package, the exposed pad should be soldered to a copper plane.
Table 4. Thermal Resistance
Package Type
8-Lead SOIC_N (R-8)
8-Lead LFCSP (CP-8-2)
ESD CAUTION
1
Input pin has clamp diodes to the power supply pins. Input current should
be limited to 10 mA or less whenever input signals exceed the power supply
rail by 0.3 V.
2
Differential input voltage is limited to ±30 V or the supply voltage, whichever
is less.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. A | Page 5 of 16
θJA
155
77
θJC
45
14
Unit
°C/W
°C/W
ADA4627-1
TYPICAL PERFORMANCE CHARACTERISTICS
120
270
100
225
80
180
60
135
78°
40
45
20
0
0
ADA4627-1
TA = 25°C
VSY = ±15V
ADA4627-1
TA = 25°C
VSY = ±15V
–20
1
0.01
0.1
1
FREQUENCY (kHz)
10
–40
1k
10k
Figure 3. Voltage Noise Density
–45
100k
1M
FREQUENCY (Hz)
–90
100M
10M
100
RL = 1kΩ
120
10
AV = –10
ADA4627-1
TA = 25°C
VSY = ±15V
0
25
50
TEMPERATURE (°C)
75
100
125
0.01
100
Figure 4. Open-Loop Gain vs. Temperature
100
100
80
50
VOS (µV)
150
60
40
10k
100k
1M
FREQUENCY (Hz)
10M
100M
0
–50
ADA4627-1
TA = 25°C
VSY = ±15V
1k
ADA4627-1
TA = 25°C
VSY = ±15V
–100
07559-010
0
100
1k
Figure 7. Closed-Loop ZOUT vs. Frequency
120
20
AV = –1
07559-007
–25
AV = –100
0.1
ADA4627-1
TA = 25°C
VSY = ±15V
VO = ±11V
60
–50
1
10k
100k
FREQUENCY (Hz)
1M
–150
–15
10M
Figure 5. CMRR vs. Frequency
–10
5
07559-069
80
ZOUT (Ω)
RL = 600Ω
100
07559-004
OPEN-LOOP GAIN (dB)
19.1MHz
Figure 6. Open-Loop Gain and Phase vs. Frequency
140
CMRR (dB)
90
07559-006
GAIN (dB)
10
07559-003
VOLTAGE NOISE DENSITY (nV√Hz)
100
PHASE (Degrees)
TA = 25°C, unless otherwise noted.
0
VCM (V)
5
Figure 8. VOS vs. Common-Mode Voltage
Rev. A | Page 6 of 16
10
15
ADA4627-1
TA = 25°C, unless otherwise noted.
120
100
60
PSRR–
PSRR+
40
ADA4627-1
TA = 25°C
VSY = ±15V
20
0
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
100
90
80
70
60
–50
07559-009
PSRR (dB)
80
110
–25
0
25
50
75
100
125
TEMPERATURE (°C)
Figure 9. PSRR vs. Frequency
Figure 12. CMRR vs. Temperature
8
20
–40ºC
ADA4627-1
TA = 25°C
VSY = ±15V
7
+25ºC
6
+85ºC
+125ºC
10
5
VOL – VSS (V)
SUPPLY CURRENT (mA)
ADA4627-1
VSY = ±15V
VCM = ±11.5V
07559-012
COMMON-MODE REJECTION RATIO (dB)
120
4
3
ADA4627-1
TA = 25°C
2
0
4
8
12
16
20
24
SUPPLY VOLTAGE (V)
28
32
36
1
0.001
07559-011
0
07559-058
1
0.01
0.1
1
ILOAD (mA)
10
100
Figure 13. VOUT Sinking vs. ILOAD Current
Figure 10. Supply Current vs. Supply Voltage and Temperature
20
120
ADA4627-1
TA = 25°C
VSY = ±15V
ADA4627-1
RL = 1kΩ
±4.5V < VSY < ±15V
100
–40
–20
0
20
40
60
TEMPERATURE (°C)
80
100
1
0.001
120
Figure 11. PSRR vs. Temperature
07559-057
VDD – VOH (V)
110
07559-068
PSRR (dB)
10
0.01
0.1
1
ILOAD (mA)
10
Figure 14. VOUT Sourcing vs. ILOAD Current
Rev. A | Page 7 of 16
100
ADA4627-1
TA = 25°C, unless otherwise noted.
0.01
8
ADA4627-1
TA = 25°C
VSY = ±15V
VIN = 810mV
RL = 600Ω
80kHz FILTER
6
0.001
THD + N (%)
5
4
3
0.0001
2
0
0
4
8
12
16
20
24
28
32
SUPPLY VOLTAGE (V)
36
07559-071
ADA4627-1
TA = 25°C
SOIC PACKAGE
1
0.00001
0.01
07559-015
SUPPLY CURRENT (mA)
7
0.1
1
FREQUENCY (kHz)
10
Figure 18. THD + N vs. Frequency
Figure 15. Supply Current vs. Supply Voltage
10,000
0.1
ADA4627-1
VSY = ±15
1,000
0.01
MEASURED
IB (pA)
THD + N (%)
100
0.001
10
0.00001
0.001
EXTRAPOLATED
1
y = 0.2895 0.0647x
R2 = 0.9991
07559-072
0.0001
0.01
0.1
AMPLITUDE (V rms)
0.1
1
10
30
07559-078
ADA4627-1
TA = 25°C
VSY = ±15V
VIN = 1kHz
RL = 600Ω
80kHz FILTER
50
70
90
TEMPERATURE (°C)
110
130
Figure 19. Input Bias Current vs. Temperature
Figure 16. THD + N vs. VIN
100
60
ADA4627-1
TA = 25°C
VSY = ±15
50
IB+
75
+85°C
50
40
IB–
25
IB (pA)
20
AV = +10
10
IB+
+25ºC
0
IB–
–25
0
–50
AV = +1
–20
10
100
1k
10k
100k
FREQUENCY (kHz)
1M
10M
ADA4627-1
VSY = ±15V
–75
–100
–15
100M
Figure 17. Closed-Loop Gain vs. Frequency
–10
07559-073
–10
07559-070
GAIN (dB)
AV = +100
30
–5
0
VCM (V)
5
10
Figure 20. Input Bias Current vs. VCM and Temperature
Rev. A | Page 8 of 16
15
ADA4627-1
TA = 25°C, unless otherwise noted.
1200
1100
OUTPUT VOLTAGE (5V/DIV)
IB+
900
IB (pA)
800
IB–
700
600
500
400
300
100
0
–15
–10
ADA4627-1
TA = 25°C
AV = –1
VIN = 20V p-p
RF = RIN = 2kΩ
CF = 10pF
RL = 1kΩ
CL = 1nF
07559-074
ADA4627-1
TA = 125°C
VSY = ±15V
200
1
–5
0
VCM (V)
5
10
07559-061
1000
TIME (1µs/DIV)
15
Figure 24. Large Signal Transient Response
Figure 21. Input Bias Current vs. VCM at 125°C
80
ADA4627-1
TA = 25°C
VSY = ±15V
OUTPUT VOLTAGE (5V/DIV)
60
40
VOS (µV)
20
0
–20
–80
07559-075
–60
1
07559-062
–40
ADA4627-1
TA = 25°C
AV = +1
VIN = 20V p-p
RF = 0Ω
0
60
120
180
TIME (Seconds)
240
TIME (200ns/DIV)
300
Figure 25 Large Signal Transient Response
Figure 22. Input Offset Voltage vs. Time
60
OUTPUT VOLTAGE (5V/DIV)
OS–
40
20
TA = 25°C
VSY = ±15V
AV = +1
VIN = 100mV p-p
10
0
1
10
100
1000
LOAD CAPACITANCE (pF)
1
07559-059
OS+
30
07559-023
OVERSHOOT (%)
50
ADA4627-1
TA = 25°C
AV = –1
VIN = 20V p-p
RF = RIN = 2kΩ
CH1 5.00V
10,000
TIME (200ns/DIV)
Figure 26. Large Signal Transient Response
Figure 23. Small Signal Overshoot vs. Load Capacitance
Rev. A | Page 9 of 16
ADA4627-1
ADA4627-1
TA = 25°C
AV = –1
VIN = 200mV p-p
RF = RIN = 2kΩ
CF = 5pF
TIME (1µs/DIV)
TIME (200ns/DIV)
Figure 30. Small Signal Transient Response
1
1
ADA4627-1
TA = 25°C
AV = +1
VIN = 200mV p-p
RF = 0Ω
RL = 1kΩ
CL = 1nF
TIME (200ns/DIV)
TIME (200ns/DIV)
Figure 31. Small Signal Transient Response
OUTPUT VOLTAGE (50mV/DIV)
Figure 28. Large Signal Transient Response
1
ADA4627-1
TA = 25°C
AV = +1
VIN = 200mV p-p
RF = 0Ω
07559-064
OUTPUT VOLTAGE (50mV/DIV)
07559-065
OUTPUT VOLTAGE (50mV/DIV)
ADA4627-1
TA = 25°C
AV = –1
VIN = 20V p-p
RF = RIN = 2kΩ
CF = 10pF
RL = 1kΩ
CL = 100pF
07559-060
OUTPUT VOLTAGE (5V/DIV)
Figure 27. Large Signal Transient Response
1
ADA4627-1
TA = 25°C
AV = –1
VIN = 200mV p-p
RF = RIN = 2kΩ
CF = 5pF
RL = 1kΩ
CL = 100pF
TIME (200ns/DIV)
TIME (200ns/DIV)
Figure 32. Small Signal Transient Response
Figure 29. Small Signal Transient Response
Rev. A | Page 10 of 16
07559-067
ADA4627-1
TA = 25°C
AV = +1
VIN = 20V p-p
RF = 0Ω
RL = 1kΩ
CL = 1nF
1
07559-066
OUTPUT VOLTAGE (50mV/DIV)
1
07559-063
OUTPUT VOLTAGE (5V/DIV)
TA = 25°C, unless otherwise noted.
ADA4627-1
TA = 25°C, unless otherwise noted.
ADA4627-1
TA = 25°C
VSY = ±15V
10
5
0
–5
VOUT
–10
VOUT
2
VIN
07559-077
–15
VIN
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
TIME (ms)
TIME (200ns/DIV)
07559-033
–20
Figure 35. Positive Settling Time to 0.01%
VIN
2
VOUT
07559-076
INPUT VOLTAGE (5V/DIV)
1
OUTPUT VOLTAGE (1mV/DIV)
ADA4627-1
TA = 25°C
VSY = ±15
OUTPUT VOLTAGE (200mV/DIV)
Figure 33. No Phase Reversal
TIME (200ns/DIV)
1
ADA4627-1
TA = 25°C
VSY = ±15V
DUT GAIN = 100
4TH ORDER BAND PASS FIXTURE GAIN = 10k
TOTAL GAIN = 1M
TIME (1s/DIV)
Figure 34. Negative Settling Time to 0.01%
Figure 36. 0.1 Hz to 10 Hz Noise
Rev. A | Page 11 of 16
07559-040
AMPLITUDE (V)
ADA4627-1
TA = 25°C
VSY = ±15
1
INPUT VOLTAGE (5V/DIV)
15
OUTPUT VOLTAGE (1mV/DIV)
20
ADA4627-1
THEORY OF OPERATION
chain. Signal chain offset can be addressed with an autozero amplifier used to form a composite amplifier, or if the
ADA4627-1 is at an inverting amplifier stage, it can be modified
easily to create a summing amplifier where a potentiometer can
be added (see Figure 38). The LFCSP package does not have
offset adjust pins.
RF
INPUT VOLTAGE RANGE
RIN
The ADA4627-1 is not a rail-to-rail input amplifier, thus, care
is required to ensure that both inputs do not exceed the input
voltage range. Under normal negative feedback operating
conditions, the amplifier corrects its output to ensure that
the two inputs are at the same voltage. However, if either input
exceeds the input voltage range, the loop opens and large
currents begin to flow through the ESD protection diodes in
the amplifier.
These diodes are connected between the inputs and each supply
rail to protect the input transistors against an electrostatic discharge
event, and they are normally reverse-biased. However, if the
input voltage exceeds the supply voltage, these ESD diodes can
become forward-biased. Without current limiting, excessive
amounts of current may flow through these diodes, causing
permanent damage to the device. If inputs are subject to overvoltage, insert appropriate series resistors to limit the diode
current to less than 5 mA.
INPUT OFFSET VOLTAGE ADJUST RANGE
The ADA4627-1 SOIC package has offset adjust pins for
compatibility with some existing designs. The recommended
offset nulling circuit is shown in Figure 37.
+VS
2
ADA4627-1
+
VIN
3
+VS
–
499kΩ
6
499kΩ
200Ω
0.1µF
+
VOUT
–
100kΩ
–VS
07559-052
The ADA4627-1 is a high speed, unity gain stable amplifier with
excellent dc characteristics. The typical offset voltage of 70 μV
allows the amplifier to be easily configured for high gains
without the risk of excessive output voltage errors. The small
temperature drift of 2 μV/°C ensures a minimum offset voltage
error over the entire temperature range of −40°C to +125°C,
making the amplifier ideal for a variety of sensitive measurement applications in harsh operating environments.
Figure 38. Alternate Offset Null Circuit for Inverting Stage
INPUT BIAS CURRENT
Because the ADA4627-1 has a JFET input stage, the input bias
current, due to the reverse-biased junction, has a leakage
current that approximately doubles every 10°C. The power
dissipation of the part, combined with the thermal resistance of
the package, results in the junction temperature increasing 20 to
30 degrees Centigrade above ambient. This parameter is tested
with high speed ATE equipment, which does not result in the
die temperature reaching equilibrium. This is correlated with
bench measurements to match the guaranteed maximum at
room temperature in Table 2.
The input current can be reduced by keeping the temperature as
low as possible and using a light load on the output.
NOISE CONSIDERATIONS
The JFET input stage offers very low input voltage noise and
input current noise. The thermal noise of a 1 kΩ resistor at
room temperature is 4 nV/√Hz, thus low values of resistance
should be used for dc-coupled inverting and noninverting
amplifier configurations. In the case of transimpedance
amplifiers (TIAs), current noise is more important.
100kΩ
7
1
2
5
ADA4627-1
6
3
–VS
07559-051
4
Figure 37. Standard Offset Null Circuit
With a 100 kΩ potentiometer, the adjustment range is
more than ±11 mV. However, the VOS temperature drift
increases by several μV/°C for every millivolt of offset adjust.
The ADA4627-1 has matching thin film resistors that are laser
trimmed at two temperatures to minimize both offset voltage
and offset voltage drift. The offset voltage at room temperature
is less than 0.5 mV, and the offset voltage drift is only a few
μV/ºC or less, therefore, it is not recommended to use the offset
adjust pins, especially for offset adjust of a complete signal
The ADA4627-1 is an excellent choice for both of these applications. Analog Devices offers a wide variety of low voltage
noise and low current noise op amps in a variety of processes
optimized for different supply voltage ranges. Refer to
Application Note AN-940 for a complete discussion of noise,
calculations, and selection tables for more than three dozen
low noise, op amp families.
THD + N MEASUREMENTS
Total harmonic distortion plus noise (THD + N) is usually
measured with an audio analyzer from Audio Precision, Inc.
The analyzer consists of a low distortion oscillator that is swept
from the starting frequency to the ending frequency. The
Rev. A | Page 12 of 16
ADA4627-1
The analyzer has a tunable notch filter in lock step with the
swept oscillator. This removes the fundamental frequency,
but allows all of the harmonics and wideband noise to be
measured with an integrating voltmeter. However, there is
a switchable low-pass filter in series with the notch filter.
If the sine wave is at 100 Hz, then the tenth harmonic is still
at 1 kHz, thus having a low pass at 80 kHz is not a problem.
When the oscillator reaches 20 kHz, the fourth harmonic
(80 kHz) is partially attenuated, resulting in a lower reading
from the voltmeter. When evaluating THD + N curves from
any manufacturer, careful attention should be paid to the test
conditions. The difference between an 80 kHz low-pass filter
and a 500 kHz filter is shown in Figure 39.
0.01
ADA4627-1
TA = 25°C
VSY = ±15V
VIN = 810mV
RL = 600Ω
THD + N (%)
0.001
500kHz FILTER
0.0001
07559-017
80kHz FILTER
0.00001
0.01
0.1
1
FREQUENCY (kHz)
10
100
Figure 39. THD + N vs. Frequency
PRINTED CIRCUIT BOARD LAYOUT, BIAS
CURRENT, AND BYPASSING
To take advantage of the very low input bias current of the
ADA4627-1 at room temperature, leakage paths must be
considered. A printed circuit board, with dust and humidity,
can have 100 MΩ of resistance over a few tenths of an inch.
A one mV differential between the two points results in 10 pA
of leakage current, more than the guaranteed maximum.
The op amp inputs should be guarded by surrounding the nets
with a metal trace maintained at the predicted voltage. In the
case of an inverting configuration or transimpedance amplifier,
(see Figure 40), the inverting and noninverting nodes can be
surrounded by traces held at a quiet analog ground.
CF
GUARD
RF
2
ADA4627-1
3
8
6
+
VOUT
–
07559-053
IN
For a noninverting configuration, the trace can be driven from
the feedback divider, but the resistors should be chosen to offer
a low impedance drive to the trace (see Figure 41).
GUARD
3
ADA4627-1
+
VS
2
8
6
VOUT
+
RF
–
RI
–
07559-054
oscillator is connected to the circuit under test, and the output
of the circuit goes back to the analyzer.
Figure 41. Noninverting Amplifier with Guard
The board layout should be compact with traces as short as
possible. For second-order board considerations, such as
triboelectric effects and piezoelectric effects, as well as a table
of insulating material properties, see the AD549 data sheet.
In some cases, shielding from air currents, may be helpful.
A general rule of thumb, for op amps with gain bandwidth
products higher than 1 MHz, bypass capacitors should be very
close to the part, within 3 millimeters. Each supply should be
bypassed with a 0.01 μF ceramic capacitor in parallel with a
1 μF bulk decoupling capacitor. The ceramic capacitors should
be closer to the op amp. Sockets, which add inductance and
capacitance, should not be used.
OUTPUT PHASE REVERSAL
Output phase reversal occurs in some amplifiers when the input
common-mode voltage range is exceeded. As common-mode
voltage is moved outside the common-mode range, the outputs
of these amplifiers can suddenly jump in the opposite direction
to the supply rail. This is the result of the differential input pair
shutting down, causing a radical shifting of internal voltages
that results in the erratic output behavior.
The ADA4627-1 amplifier has been carefully designed to
prevent any output phase reversal if both inputs are maintained
within the specified input voltage range. If one or both inputs
exceed the input voltage range but remain within the supply
rails, an internal loop opens and the output varies. Therefore,
the inputs should always be a minimum of 3 V away from either
supply rail.
DRIVING CAPACITIVE LOADS
Adding capacitance to the output of any op amp results
in additional phase shift, which reduces stability and leads to
overshoot or oscillation. The ADA4627-1 has a high phase
margin and low output impedance, so it can drive reasonable
values of capacitance. This is a common situation when an
amplifier is used to drive the input of switched capacitor ADCs.
For other considerations and various circuit solutions, see the
Analog Dialogue article titled Ask the Applications Engineer-25,
Op Amps Driving Capacitive Loads, available at www.analog.com.
Figure 40. Inverting Amplifier with Guard
Rev. A | Page 13 of 16
ADA4627-1
OUTLINE DIMENSIONS
0.60 MAX
5
2.95
2.75 SQ
2.55
TOP
VIEW
PIN 1
INDICATOR
8
12° MAX
0.05 MAX
0.01 NOM
0.30
0.23
0.18
SEATING
PLANE
1
0.50
0.40
0.30
0.70 MAX
0.65 TYP
1.60
1.45
1.30
EXPOSED
PAD
(BOTTOM VIEW)
4
0.90 MAX
0.85 NOM
0.50
BSC
0.60 MAX
0.20 REF
1.89
1.74
1.59
PIN 1
INDICATOR
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
090308-B
3.25
3.00 SQ
2.75
Figure 42. 8-Lead Lead Frame Chip Scale Package [LFCSP_VD]
3 mm × 3 mm Body, Very Thin, Dual Lead
(CP-8-2)
Dimensions shown in millimeters
5.00 (0.1968)
4.80 (0.1890)
8
1
5
6.20 (0.2441)
5.80 (0.2284)
4
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
0.10
SEATING
PLANE
0.50 (0.0196)
0.25 (0.0099)
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
45°
8°
0°
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012-A A
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 43. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
Rev. A | Page 14 of 16
012407-A
4.00 (0.1574)
3.80 (0.1497)
ADA4627-1
ORDERING GUIDE
Model
ADA4627-1ACPZ-R2 1
ADA4627-1ACPZ-RL1
ADA4627-1ACPZ-R71
ADA4627-1ARZ1
ADA4627-1ARZ-RL1
ADA4627-1ARZ-R71
ADA4627-1BRZ1
ADA4627-1BRZ-R71
ADA4627-1BRZ-RL1
1
Temperature Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
Package Description
8 Lead LFCSP_VD
8 Lead LFCSP_VD
8 Lead LFCSP_VD
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
Z = RoHS Compliant Part.
Rev. A | Page 15 of 16
Package Option
CP-8-2
CP-8-2
CP-8-2
R-8
R-8
R-8
R-8
R-8
R-8
Branding
A29
A29
A29
ADA4627-1
NOTES
©2009 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D07559-0-9/09(A)
Rev. A | Page 16 of 16