ams AS1705 1.6w single-channel audio power amplifier Datasheet

a u s t ri a m i c r o s y s t e m s
AS1702, AS1703, AS1704, AS1705
D a ta S he e t
1.6W Single-Channel Audio Power Amplifiers
1 General Description
2 Key Features
The AS1702, AS1703, AS1704, and AS1705 are singlechannel differential audio power-amplifiers designed to
drive 4 and 8Ω loads. The integrated gain circuitry of
these amplifiers and their small size make them ideal for
2.7- to 5V-powered portable audio devices.
The differential input design improves noise rejection
and provides common-mode rejection. A bridge-tied
load (BTL) design minimizes external component count,
while providing Hi-Fi audio power amplification.
The devices deliver 1.6W continuous average power per
channel to a 4Ω load with less than 1% total harmonic
distortion (plus noise), while operating from a single 2.7
to 5V supply.
In order to facilitate reduced component designs, the
devices are available with different gain levels:
!
AS1702 – Adjustable Gain (via external components)
!
AS1703 – AV = 0dB
!
AS1704 – AV = 3dB
!
AS1705 – AV = 6dB
Integrated shutdown circuitry disables the bias generator and amplifiers, and reduces quiescent current consumption to less than 100nA. The shutdown input can
be set as active-high or active-low. All devices contain
comprehensive click-and-pop suppression circuitry that
reduces audible clicks and pops during power-up and
shutdown.
!
2.7 to 5.5V (VCC) Single-Supply Operation
!
THD+N: 1.6W into 4Ω at 1% (per Channel)
!
Differential Input
!
Adjustable Gain Option (AS1702)
!
Internal Fixed Gain to Reduce External Component
Count (AS1703, AS1704, AS1705)
!
<100nA Low-Power Shutdown Mode
!
Click and Pop Suppression
!
Pin-Compatible National Semiconductor LM4895
(AS1705) and Maxim MAX9718A/B/C/D
!
Operating Temperature Range: -40 to +85°C
!
Low-Cost MSOP-10 Package
3 Applications
The devices are ideal as audio front-ends for battery
powered audio devices such as MP3 and CD players,
mobile phones, PDAs, portable DVD players, and any
other hand-held battery-powered device.
The AS1702, AS1703, AS1704, and AS1705 are pin
compatible with the LM4895 and the MAX9718A/B/C/D.
The devices are available in a 10-pin MSOP package.
Figure 1. Simplified Block Diagram
Single Supply
2.7 to 5.5V
IN+
IN-
SHDN
OUT+
+
OUT-
–
RL =
4 or 8Ω
AS1702, AS1703,
AS1704, AS1705
SHDM
GND
www.austriamicrosystems.com
Revision 1.01
1 - 13
austriam i c r o systems
AS1702, AS1703, AS1704, AS1705
Data Sheet
4 Absolute Maximum Ratings
Stresses beyond those listed in Table 1 may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated in Section 5 Electrical
Characteristics on page 3 is not implied. Exposure to absolute maximum rating conditions for extended periods may
affect device reliability.
Table 1. Absolute Maximum Ratings
Parameter
Min
Max
Unit
Supply Voltage (VCC to GND)
-0.3
+7
V
Any Other Pin to GND
-0.3
VCC + 0.3
V
Input Current (Latchup Immunity)
-100
100
mA
JEDEC 17
Continuous Power Dissipation
(TAMB = +70°C)
TBD
mW
MSOP-10 (Derate 10.3mW/°C
above +70°C)
Electro-Static Discharge (ESD)
1
kV
Human Body Model and MILStd883E 3015.7methods
Operating Temperature Range (TAMB)
-40
+85
°C
Storage Temperature Range
-65
+150
°C
260
°C
Package Body Temperature
www.austriamicrosystems.com
Revision 1.01
Comments
2 - 13
austriam i c r o systems
AS1702, AS1703, AS1704, AS1705
Data Sheet
5V Operation
5 Electrical Characteristics
5.1 5V Operation
VCC = 5V, GND = 0V, SHDN = VCC, SHDM = GND, RIN = RF = 10kΩ (AS1702), TAMB = +25°C, CBIAS = 0.1µF, no load.
Typical values are at TAMB = +25°C (unless otherwise specified). All specifications are 100% tested at TAMB = +25°C
(unless otherwise specified). Specifications over temperature (TAMB = TMIN to TMAX) are guaranteed by design, not
production tested.
Table 2. Electrical Characteristics – 5V Supply
Symbol
VCC
Parameter
Supply Voltage
Conditions
ICC
Supply Current 1
ISHDN
VIH
VIL
Shutdown Supply
VIN- = VIN+ = VBIAS;
TAMB = -40 to +85°C, per amplifier
SHDN = SHDM = GND per amplifier
Common-Mode Bias
Voltage 2
VOS
Output Offset Voltage
VIC
Common-Mode Input
Voltage
RIN
Input Impedance
CMRR
Common-Mode
Rejection Ration
Typ
Max
5.5
Unit
V
8
10.4
mA
0.05
1
µA
0.7 x VCC
SHDN, SHDM
Threshold
VBIAS
Min
2.7
0.3 x VCC
AV = 0dB (AS1703)
AV = 3dB (AS1704)
AV = 6dB (AS1705)
AV = 0dB (AS1703)
Inferred from CMRR
AV = 3dB (AS1704)
Test
AV = 6dB (AS1705)
External Gain AS1702
AS1703, AS1704, AS1705
VCC/2 - 5% VCC/2 VCC/2 + 5%
V
±1
±1
±1
mV
VIN- = VIN+ = VBIAS
fN = 1kHz
IN- = VIN+ = VBIAS;
f = 217Hz
V
Power Supply
VRIPPLE = 200mVp-p;
PSRR
Rejection Ratio
f = 1kHz
RL = 8Ω; CBIAS = 1µF
RL = 8Ω
THD+N = 1%;
POUT
Output Power 3
fIN = 1kHz
RL = 4Ω
RL = 4Ω, fIN = 1kHz, POUT = 1.28W,
VCC = 5V, AV = 6dB
Total Harmonic
THD+N
Distortion plus Noise 4
RL = 8Ω, fIN = 1kHz, POUT = 0.9W,
VCC = 5V, AV = 6dB
Gain Accuracy
AS1703, AS1704, AS1705
Thermal Shutdown
Threshold
Thermal Shutdown
Hysteresis
Maximum
Capacitive
CLOAD
Bridge-tied capacitance
Drive
Power-up/Enable from
tPU
Shutdown Time
tSHDN
Shutdown Time
VPOP
Turn-Off Transient 5
V
0.5
0.5
0.5
0.5
10
-50
15
-60
-64
-79
±10
±15
±20
VCC - 0.5
VCC - 0.6
VCC - 0.8
VCC - 1.2
20
kΩ
dB
dB
-73
0.8
V
1.2
1.6
W
0.06
%
0.03
±1
±2
%
+145
°C
9
°C
500
pF
125
ms
3.5
50
µs
mV
1. Quiescent power supply current is specified and tested with no load. Quiescent power supply current depends
on the offset voltage when a practical load is connected to the amplifier. Guaranteed by design.
2. Common-mode bias voltage is the voltage on BIAS and is nominally VCC/2.
3. Output power is specified by a combination of a functional output current test and characterization analysis.
4. Measurement bandwidth for THD+N is 22Hz to 22kHz.
5. Peak voltage measured at power-on, power-off, into or out of SHDN. Bandwidth defined by A-weighted filters,
inputs at AC GND. VCC rise and fall times ≥ 1ms.
www.austriamicrosystems.com
Revision 1.01
3 - 13
austriam i c r o systems
AS1702, AS1703, AS1704, AS1705
Data Sheet
3V Operation
5.2 3V Operation
VCC = 3V, GND = 0V, SHDN = VCC, SHDM = GND, RIN = RF = 10kΩ (AS1702), TAMB = +25°C, CBIAS = 0.1µF, no load.
Typical values are at TAMB = +25°C (unless otherwise specified.) All specifications are 100% tested at TAMB = +25°C.
Specifications over temperature (TAMB = TMIN to TMAX) are guaranteed by design, not production tested.
Table 3. Electrical Characteristics – 3V Supply
Symbol
Parameter
Conditions
ICC
Supply Current 1
VIN- = VIN+ = VBIAS;
TAMB = -40 to +85°C, per amplifier
7.5
ISHDN
Shutdown Supply
SHDN = SHDM = GND per amplifier
0.05
VIH
SHDN, SHDM
Threshold
VIL
VBIAS
Common-Mode
Bias Voltage 2
VOS
Output Offset
Voltage
VIC
Common-Mode
Input Voltage
Min
Input Impedance
CMRR
Common-Mode
Rejection Ration
PSRR
Power Supply
Rejection Ratio
POUT
Output Power 3
THD+N
Max
1
0.3 x VCC
VCC/2 - 5% VCC/2 VCC/2 + 5%
VIN- = VIN+ = VBIAS
Inferred from CMRR
Test
AV = 0dB (AS1703)
±1
±10
AV = 3dB (AS1704)
±1
±15
AV = 6dB (AS1705)
±1
±20
AV = 0dB (AS1703)
0.5
VCC - 0.7
AV = 3dB (AS1704)
0.5
VCC - 0.8
AV = 6dB (AS1705)
0.5
VCC - 1.0
0.5
VCC - 1.2
AS1703, AS1704, AS1705
fN = 1kHz
VIN- = VIN+ = VBIAS;
VRIPPLE = 200mVp-p;
RL = 8Ω; CBIAS = 1µF
10
15
-50
-60
20
-79
f = 1kHz
-73
RL = 4Ω, THD+N = 1%; fIN = 1kHz
590
RL = 8Ω, THD+N = 1%; fIN = 1kHz
430
Total Harmonic
Distortion plus
Noise 4
RL = 4Ω, fIN = 1kHz, POUT = 460mW, AV = 6dB
0.06
RL = 8Ω, fIN = 1kHz, POUT = 330mW, AV = 6dB
0.04
Gain Accuracy
AS1703, AS1704, AS1705
±1
µA
V
V
mV
mV
kΩ
dB
-64
f = 217Hz
Unit
mA
0.7 x VCC
External gain AS1702
RIN
Typ
dB
mW
%
±2
%
Thermal Shutdown
Threshold
+145
°C
Thermal Shutdown
Hysteresis
9
°C
500
pF
CLOAD
Maximum
Capacitive Drive
tPU
Power-up/Enable
from
Shutdown Time
125
ms
tSHDN
Shutdown Time
3.5
µs
50
mV
VPOP
Bridge-tied capacitance
Turn-Off Transient
5
1. Quiescent power supply current is specified and tested with no load. Quiescent power supply current depends
on the offset voltage when a practical load is connected to the amplifier. Guaranteed by design.
2. Common-mode bias voltage is the voltage on BIAS and is nominally VCC/2.
3. Output power is specified by a combination of a functional output current test and characterization analysis.
4. Measurement bandwidth for THD+N is 22Hz to 22kHz.
5. Peak voltage measured at power-on, power-off, into or out of SHDN. Bandwidth defined by A-weighted filters,
inputs at AC GND. VCC rise and fall times ≥ 1ms.
www.austriamicrosystems.com
Revision 1.01
4 - 13
austriam i c r o systems
AS1702, AS1703, AS1704, AS1705
Data Sheet
Bias
6 Detailed Description
The AS1702, AS1703, AS1704, and AS1705 are 1.6W high output-current audio amplifiers (configured as BTL amplifiers), and contain integrated low-power shutdown and click- and pop-suppression circuitry. Two inputs (SHDM and
SHDN) allow shutdown mode to be configured as active-high or active-low (see Section 6.2 Shutdown Mode on
page 5).
Each device has either adjustable or fixed gains (0dB, 3dB, 6dB) (see Section 9 Ordering Information on page 12).
6.1 Bias
The devices operate from a single 2.7 to 5.5V supply and contain an internally generated, common-mode bias voltage
of:
(EQ 1)
VCC/2
referenced to ground. Bias provides click-and-pop suppression and sets the DC bias level for the audio outputs. Select
the value of the bias bypass capacitor as described in Section 7.4.3 BIAS Capacitor on page 9.
Note: Do not connect external loads to BIAS as this can adversely affect overall device performance.
6.2 Shutdown Mode
All devices implement a 100nA, low-power shutdown circuit which reduces quiescent current consumption. As shutdown mode commences, the bias circuitry is automatically disabled, the device outputs go high impedance, and bias is
driven to GND.
The SHDM input controls the polarity of SHDN:
!
Drive SHDM high for an active-low SHDN input.
!
Drive SHDM low for an active-high SHDN input.
Table 4. Shutdown Mode Selection Configurations
SHDM
SHDN
Mode
0
0
Shutdown Mode Enabled
0
1
Normal Operation Enabled
1
0
Normal Operation Enabled
1
1
Shutdown Mode Enabled
6.3 Click-and-Pop Suppression
During power-up, the device common-mode bias voltage (VBIAS (page 3)) ramps to the DC bias point. When entering
shutdown, the device outputs are driven high impedance to 100kΩ between both outputs minimizing the energy
present in the audio band, thus preventing clicks and pops.
www.austriamicrosystems.com
Revision 1.01
5 - 13
austriam i c r o systems
AS1702, AS1703, AS1704, AS1705
Data Sheet
7 Application Information
Figure 2. AS1702 Typical Application Diagram
RF
20kΩ
RF
20kΩ
VCC
2.7 to 5.5V
Supply
10µF
CIN*
Non-Inverting Differential
Input
AV = 2
RIN
10kΩ
Inverting Differential 10µF
Input
IN-
OUT+
–
+
RIN
10kΩ
CIN*
10µF
IN+
OUT-
* Optional
BIAS
Bias
Generator
SHDN
Shutdown
Control
CBIAS
0.1µF
AS1702
SHDM
GND
Figure 3. AS1703, AS1704, AS1705 Typical Application Diagram
VCC
2.7 to 5.5V
Supply
R2
10µF
Inverting Differential
Input
Non-Inverting Differential
Input
CIN*
10µF
IN-
AV = 1
AV = 1.41
AV = 2
R1
OUT+
–
+
CIN* IN+
10µF
R1
OUT-
* Optional
R2
BIAS
CBIAS
0.1µF
SHDN
Bias
Generator
Shutdown
Control
SHDM
AS1703
AS1704
AS1705
GND
www.austriamicrosystems.com
Revision 1.01
6 - 13
austriam i c r o systems
AS1702, AS1703, AS1704, AS1705
Data Sheet
BTL Amplifier
7.1 BTL Amplifier
All devices are designed to drive loads differentially in a bridge-tied load (BTL) configuration.
Figure 4. Bridge Tied Load Configuration
VOUT(P-P)
+1
2 x VOUT(P-P)
VOUT(P-P)
-1
The BTL configuration doubles the output voltage (illustrated in Figure 4) compared to a single-ended amplifier under
similar conditions. Thus, the differential gain of the device (AVD) is twice the closed-loop gain of the input amplifier. The
effective gain is given by:
AVD = 2 x
RF
RIN
(EQ 2)
Substituting 2 x VOUT(P-P) for VOUT(P-P) into (EQ 3) and (EQ 4) yields four times the output power due to doubling of
the output voltage:
VRMS =
VOUT(P-P)
2 2
(EQ 3)
POUT =
VRMS2
RL
(EQ 4)
Since the BTL outputs are biased at mid-supply, there is no net DC voltage across the load. This eliminates the need
for the large, expensive, performance degrading DC-blocking capacitors required by single-ended amplifiers.
7.2 Power Dissipation and Heat Sinking
Normally, the devices dissipate a significant amount of power. The maximum power dissipation is given in Table 1 as
Continuous Power Dissipation, or it can be calculated by:
PDISSPKF(MAX) =
TJ(MAX) -TA
ΘJA
(EQ 5)
where TJ(MAX) is +150°C, TAMB (see Table 1) is the ambient temperature, and ΘJA is the reciprocal of the derating factor in °C/W as specified in Table 1. For example, ΘJA of the TQFN package is +59.2°C/W.
The increased power delivered by a BTL configuration results in an increase in internal power dissipation versus a single-ended configuration. The maximum internal power dissipation for a given VCC and load is given by:
PDISSPKF(MAX) =
www.austriamicrosystems.com
2VCC2
π2RL
Revision 1.01
(EQ 6)
7 - 13
austriam i c r o systems
AS1702, AS1703, AS1704, AS1705
Data Sheet
Fixed Differential Gain (AS1703, AS1704, and AS1705)
If the internal power dissipation exceeds the maximum allowed for a given package, power dissipation should be
reduced by increasing the ground plane heat-sinking capabilities and increasing the size of the device traces (see Section 7.5 Layout and Grounding Considerations on page 9). Additionally, reducing VCC, increasing load impedance, and
decreasing ambient temperature can reduce device power dissipation.
The integrated thermal-overload protection circuitry limits the total device power dissipation. Note that if the junction
temperature is ≥ +145°C, the integrated thermal-overload protection circuitry will disable the amplifier output stage. If
the junction temperature is reduced by 9°, the amplifiers will be re-enabled.
Note: A pulsing output under continuous thermal overload results as the device heats and cools.
7.3 Fixed Differential Gain (AS1703, AS1704, and AS1705)
The AS1703, AS1704, and AS1705 contain different internally-fixed gains (see Ordering Information on page 12). A
fixed gain facilitates simplified designs, decreased footprint size, and elimination of external gain-setting resistors.
The fixed gain values are achieved using resistors R1 and R2 (see Figure 3 on page 6).
7.4 Adjustable Differential Gain (AS1702)
7.4.1 Gain-Setting Resistors
The AS1702 uses external feedback resistors, RF and RIN (Figure 5), to set the gain of the device as:
AV =
RF
RIN
(EQ 7)
where AV is the desired voltage gain. For example, RIN = 10kΩ, RF = 20kΩ yields a gain of 2V/V, or 6dB.
Note: RF can be either fixed or variable, allowing the gain to be controlled by software (using a AS150x digital potentiometer. For more information on the AS1500 family of digital potentiometers, refer to the latest version of the
AS150x data sheet, available from the austriamicrosystems website http://www.austriamicrosystems.com.)
Figure 5. Setting the AS1702 Gain
RF
20kΩ
RF
20kΩ
Inverting Differential
Input
Non-Inverting Differential
Input
CIN*
10µF
RIN
10kΩ
IN-
RIN
10kΩ
IN+
OUT+
–
+
CIN*
10µF
OUT-
Bias
Generator
* Optional
AS1702
CBIAS
0.1µF
www.austriamicrosystems.com
Revision 1.01
8 - 13
austriam i c r o systems
AS1702, AS1703, AS1704, AS1705
Data Sheet
Layout and Grounding Considerations
7.4.2 Input Filter
The BTL inputs can be biased at voltages other than mid-supply. However, the integrated common-mode feedback circuit adjusts for input bias, ensuring the outputs are still biased at mid-supply. Input capacitors are not required if the
common-mode input voltage (VIC) is within the range specified in Table 2 and Table 3.
Input capacitor CIN (if used), in conjunction with RIN, forms a high-pass filter that removes the DC bias from an incoming signal. The AC coupling capacitor allows the amplifier to bias the signal to an optimum DC level. Assuming zerosource impedance, the -3dB point of the high-pass filter is given by:
f-3dB =
1
2πRINCIN
(EQ 8)
Setting f-3dB too high affects the low-frequency response of the amplifier. Capacitors with dielectrics that have low-voltage coefficients such as tantalum or aluminum electrolytic should be used, since capacitors with high-voltage coefficients, such as ceramics, can increase distortion at low frequencies.
7.4.3 BIAS Capacitor
BIAS is the output of the internally generated VCC/2 bias voltage. The BIAS bypass capacitor, CBIAS, improves PSRR
and THD+N by reducing power supply noise and other noise sources at the common-mode bias node, and also generates the click- and pop-less DC bias waveform for the amplifiers. Bypass BIAS with a 0.1µF capacitor to GND. Larger
values of CBIAS (up to 1µF) improve PSRR, but increase tON/tOFF times. For example, a 1µF CBIAS capacitor increases
tON/tOFF by 10 and improves PSRR by 20dB (at 1kHz).
Note: Do not connect external loads to BIAS.
7.4.4 Supply Bypassing
Proper power supply bypassing – connect a 10µF ceramic capacitor (CBIAS) from VCC to GND – will ensure low-noise,
low-distortion performance of the device. Additional bulk capacitance can be added as required.
Note: Place CBIAS as close to the device as possible.
7.5 Layout and Grounding Considerations
Well designed PC board layout is essential for optimizing device performance. Use large traces for the power supply
inputs and amplifier outputs to minimize losses due to parasitic trace resistance and route heat away from the device.
Good grounding improves audio performance and prevents digital switching noise from coupling onto the audio signal.
www.austriamicrosystems.com
Revision 1.01
9 - 13
austriam i c r o systems
AS1702, AS1703, AS1704, AS1705
Data Sheet
Pin Descriptions and Assignments
8 Pinout and Packaging
8.1 Pin Descriptions and Assignments
Table 5. Pin Descriptions – MSOP-10 Package
Pin
Name
Description
1
SHDN
Shutdown Input – The polarity of this pin is dependent on the state of pin SHDM.
2
IN-
Inverting Input.
3
SHDM
Shutdown-Mode Polarity Input – Controls the polarity of SHDN. Connect this pin
high for an active-high SHDN input. Connect this pin low for an active-low SHDN
input (see Table 4 on page 5).
4
IN+
Non-Inverting Input
5
BIAS
DC Bias Bypass
6
OUT-
Bridge Amplifier Negative Output
7
GND
Ground
8
N/C
Not connected. No internal connection.
9
VCC
Power Supply
10
OUT+
Bridge Amplifier Positive Output
Figure 6. Pin Assignment (Top View)
SHDN
1
10
OUT+
IN-
2
9
VCC
SHDM
3
8
N/C
IN+
4
7
GND
BIAS
5
6
OUT-
AS1702
AS1703
AS1704
AS1705
MSOP-10 Package
(3mmx3mmx0.8mm)
www.austriamicrosystems.com
Revision 1.01
10 - 13
austriam i c r o systems
AS1702, AS1703, AS1704, AS1705
Data Sheet
Package Drawings and Markings
8.2 Package Drawings and Markings
Figure 7. MSOP-10 Package
Notes:
1. All dimensions are in millimeters (angle in degrees), unless otherwise specified.
2. Datums B and C to be determined at datum plane H.
3. Dimensions D and E1 are to be determined at datum plane H.
4. Dimensions D2 and E2 are for top package and D and E1 are for
bottom package.
5. Cross section A-A to be determined at 0.12 to 0.25mm from the
lead tip.
6. Dimensions D and D2 do not include mold flash, protrusion, or
gate burrs.
7. Dimension E1 and E2 do not include interlead flash or protrusion.
www.austriamicrosystems.com
Revision 1.01
11 - 13
austriam i c r o systems
AS1702, AS1703, AS1704, AS1705
Data Sheet
9 Ordering Information
The AS1702, AS1703, AS1704, and AS1705 are available with adjustable or preset amplifier gain.
Part Number
Package Type
Delivery Form
MSOP-10
Tape and Reel
AS1702-T
AS1703-T
AS1704-T
AS1705-T
www.austriamicrosystems.com
Gain
Adjustable
AV = 0dB
AV = 3dB
Description
Package Size = 3x3x0.8mm
AV = 6dB
Revision 1.01
12 - 13
austriam i c r o systems
AS1702, AS1703, AS1704, AS1705
Data Sheet
Copyrights
Copyright © 1997-2005, austriamicrosystems AG, Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe.
Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner.
All products and companies mentioned are trademarks or registered trademarks of their respective companies.
Disclaimer
Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing
in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding
the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior
to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information.
This product is intended for use in normal commercial applications. Applications requiring extended temperature
range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or lifesustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for
each application.
The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However,
austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to
personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or
consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of
austriamicrosystems AG rendering of technical or other services.
Contact Information
Headquarters
austriamicrosystems AG
A-8141 Schloss Premstaetten, Austria
Tel: +43 (0) 3136 500 0
Fax: +43 (0) 3136 525 01
e-mail: [email protected]
For Sales Offices, Distributors and Representatives, please visit:
http://www.austriamicrosystems.com
austriamicrosystems –
www.austriamicrosystems.com
Revision 1.01
a leap ahead
13 - 13
Similar pages