DCR1910V85 Phase Control Thyristor Preliminary Information DS5878-1.4 June 2008 (LN26212) FEATURES KEY PARAMETERS Double Side Cooling High Surge Capability VDRM IT(AV) ITSM dV/dt* dI/dt APPLICATIONS 8500V 1910A 25000A 1500V/µs 300A/µs * Higher dV/dt selections available High Power Drives High Voltage Power Supplies Static Switches VOLTAGE RATINGS Part and Ordering Number DCR1910V85* DCR1910V80 DCR1910V75 DCR1910V70 Repetitive Peak Voltages VDRM and VRRM V 8500 8000 7500 7000 Conditions Tvj = -40°C to 125°C, IDRM = IRRM = 300mA, VDRM, VRRM tp = 10ms, VDSM & VRSM = VDRM & VRRM + 100V respectively Lower voltage grades available. 0 0 * 8200V @ -40 C, 8500V @ 0 C ORDERING INFORMATION When ordering, select the required part number shown in the Voltage Ratings selection table. For example: DCR1910V85 Outline type code: V (See Package Details for further information) Fig. 1 Package outline Note: Please use the complete part number when ordering and quote this number in any future correspondence relating to your order. 1/10 www.dynexsemi.com DCR1910V85 SEMICONDUCTOR CURRENT RATINGS Tcase = 60°C unless stated otherwise Parameter Symbol Test Conditions Max. Units 1910 A Double Side Cooled IT(AV) Mean on-state current IT(RMS) RMS value - 3000 A Continuous (direct) on-state current - 2975 A IT Half wave resistive load SURGE RATINGS Parameter Symbol ITSM 2 It Surge (non-repetitive) on-state current Test Conditions Max. Units 10ms half sine, Tcase = 125°C 25.0 kA VR = 0 3.125 MA s Min. Max. Units 2 I t for fusing 2 THERMAL AND MECHANICAL RATINGS Symbol Rth(j-c) Rth(c-h) Tvj Parameter Thermal resistance – junction to case Thermal resistance – case to heatsink Virtual junction temperature Test Conditions Double side cooled DC - 0.00746 °C/W Single side cooled Anode DC - 0.0130 °C/W Cathode DC - 0.0178 °C/W Clamping force 54.0kN Double side - 0.002 °C/W (with mounting compound) Single side - 0.004 °C/W On-state (conducting) - 135 °C Reverse (blocking) - 125 °C Tstg Storage temperature range -55 125 °C Fm Clamping force 48 59 kN 2/10 www.dynexsemi.com DCR1910V85 SEMICONDUCTOR DYNAMIC CHARACTERISTICS Symbol IRRM/IDRM Parameter Test Conditions Min. Max. Units Peak reverse and off-state current At VRRM/VDRM, Tcase = 125°C - 300 mA dV/dt Max. linear rate of rise of off-state voltage To 67% VDRM, Tj = 125°C, gate open - 1500 V/µs dI/dt Rate of rise of on-state current From 67% VDRM to 2x IT(AV) Repetitive 50Hz - 150 A/µs Gate source 30V, 10, Non-repetitive - 300 A/µs tr < 0.5µs, Tj = 125°C VT(TO) rT tgd Threshold voltage – Low level 100A to1000A at Tcase = 125°C - 0.9 V Threshold voltage – High level 1000A to 7200A at Tcase = 125°C - 1.3 V On-state slope resistance – Low level 100A to 1000A at Tcase = 125°C - 0.888 m On-state slope resistance – High level 1000A to 7200A at Tcase = 125°C - 0.55 m VD = 67% VDRM, gate source 30V, 10 - 3 µs - 1200 µs 4800 8000 µC Delay time tr = 0.5µs, Tj = 25°C tq Turn-off time Tj = 125°C, VR = 200V, dI/dt = 1A/µs, dVDR/dt = 20V/µs linear QS Stored charge IT = 2000A, Tj = 125°C, dI/dt – 1A/µs, IL Latching current Tj = 25°C, VD = 5V - 3 A IH Holding current Tj = 25°C, RG-K = , ITM = 500A, IT = 5A - 300 mA 3/10 www.dynexsemi.com DCR1910V85 SEMICONDUCTOR GATE TRIGGER CHARACTERISTICS AND RATINGS Symbol Parameter Test Conditions Max. Units VGT Gate trigger voltage VDRM = 5V, Tcase = 25°C 1.5 V VGD Gate non-trigger voltage At 50% VDRM, Tcase = 125°C 0.4 V IGT Gate trigger current VDRM = 5V, Tcase = 25°C 250 mA IGD Gate non-trigger current At 50% VDRM, Tcase = 125°C 15 mA CURVES Instantaneous on-state current IT - (A) 7000 min 125°C max 125°C min 25°C max 25°C 6000 5000 4000 3000 2000 1000 0 0.0 2.0 4.0 6.0 Instantaneous on-state voltage VT - (V) Fig.2 Maximum & minimum on-state characteristics VTM EQUATION VTM = A + Bln (IT) + C.IT+D.IT Where A = 0.398265 B = 0.121095 C = 0.000524 D = -0.000007 these values are valid for Tj = 125°C for IT 500A to 7200A 4/10 www.dynexsemi.com DCR1910V85 SEMICONDUCTOR 10 130 Mean power dissipation - (kW) o Maximum case temperature, T case ( C ) 9 8 7 6 5 4 180 120 90 60 30 3 2 1 180 120 90 60 30 120 110 100 90 80 70 60 50 40 30 20 10 0 0 0 500 1000 1500 2000 0 2500 1000 2000 3000 Mean on-state current, IT(AV) - (A) Mean on-state current, IT(AV) - (A) Fig.4 Maximum permissible case temperature, double side cooled – sine wave 130 12 Heatsink - 110 90 100 80 70 60 50 40 30 20 11 10 Mean power dissipation - (kW) 180 120 90 60 30 120 Maximum heatsink temperature, T (o C ) Fig.3 On-state power dissipation – sine wave 9 8 7 6 5 4 d.c. 180 120 90 60 30 3 2 10 1 0 0 500 1000 1500 2000 2500 Mean on-state current, IT(AV) - (A) 0 0 500 1000 1500 2000 2500 3000 3500 Mean on-state current, IT(AV) - (A) Fig.5 Maximum permissible heatsink temperature, double side cooled – sine wave Fig.6 On-state power dissipation – rectangular wave 5/10 www.dynexsemi.com DCR1910V85 130 130 d.c. 180 120 90 60 30 120 110 100 90 80 70 60 50 40 30 20 10 Maximum heatsink temperature Theatsink -(o C) Maximum permissible case temperature ,T case -(° C) SEMICONDUCTOR d.c. 180 120 90 60 30 120 110 100 90 80 70 60 50 40 30 20 10 0 0 0 0 500 1000 1500 2000 2500 3000 3500 4000 4500 500 1000 1500 2000 2500 3000 3500 4000 Mean on-state current, IT(AV) - (A) Mean on-state current, IT(AV) - (A) Fig.7 Maximum permissible case temperature, double side cooled – rectangular wave Fig.8 Maximum permissible heatsink temperature, double side cooled – rectangular wave 20 Double side cooled 18 Anode side cooled Thermal Impedance , Z th(j-c) - ( °C/kW) Ti (s) 16 14 12 Cathode side cooled 3 3.4022 0.0076807 0.0579454 0.4078613 1.2085 0.9032 1.6719 3.0101 7.4269 0.0075871 0.0536531 0.3144537 5.624 0.9478 2.0661 1.6884 13.0847 0.0078442 0.0645541 0.3894389 4.1447 Ri (°C/kW) Ti (s) Zth = [Ri x ( 1-exp. (t/ti))] 4 1.3044 [1] Rth(j-c) Conduction 10 Tables show the increments of thermal resistance R th(j-c) when the device operates at conduction angles other than d.c. 8 Double side cooling Zth (z) 6 ° 180 120 90 60 30 15 4 2 0 0.001 2 1.8299 Ri (°C/kW) Ti (s) Double Side Cooling Anode Side Cooling Cathode Sided Cooling 1 0.9206 Ri (°C/kW) 0.01 0.1 1 10 sine. 1.34 1.57 1.83 2.08 2.27 2.36 rect. 0.88 1.30 1.54 1.81 2.11 2.28 Anode Side Cooling Zth (z) ° 180 120 90 60 30 15 sine. 1.34 1.57 1.84 2.08 2.28 2.37 rect. 0.88 1.30 1.54 1.81 2.11 2.28 Cathode Sided Cooling Zth (z) ° 180 120 90 60 30 15 sine. 1.33 1.57 1.83 2.07 2.26 2.35 rect. 0.88 1.29 1.53 1.80 2.10 2.26 100 Time ( s ) Fig.9 Maximum (limit) transient thermal impedance – junction to case (°C/kW) 6/10 www.dynexsemi.com DCR1910V85 SEMICONDUCTOR 70 6 15 50 4 2 40 3 2 30 10 2 Conditions: Tcase= 125°C VR = 0 half-sine wave 20 10 1 0 1 10 100 1 0 100 10 Number of cycles Pulse width, tP - (ms) Fig.10 Multi-cycle surge current Fig.11 Single-cycle surge current 30000 600 QSmax = 7040.5*(di/dt)0.4578 IRRmax = 63.4*(di/dt)0.6984 Reverse receovery current, IRR - (A) 25000 Stored Charge, Qs - (uC) 5 I t (MA s) 20 I2t ITSM 60 Conditions: Tcase = 125°C VR =0 Pulse width = 10ms Surge current, ITSM - (kA) Surge current, ITSM- (kA) 25 20000 QSmin = 4916.3*(di/dt)0.5041 15000 Conditions: Tj = 125oC, VRpeak ~ 5100V VRM ~ 3400V 10000 snubber as appropriate to control reverse voltages 5000 500 400 300 IRRmin = 51.3*(di/dt)0.7453 Conditions: Tj = 125oC, VRpeak ~ 5100V VRM ~ 3400V snubber as appropriate to control reverse votages 200 100 0 0 0 5 10 15 20 Rate of decay of on-state current, di/dt - (A/us) Fig.12 Stored charge 25 0 5 10 15 20 25 Rate of decay of on-state current, di/dt - (A/us) Fig.13 Reverse recovery current 7/10 www.dynexsemi.com DCR1910V85 SEMICONDUCTOR 10 9 Pulse Width us 100 200 500 1000 10000 Gate trigger voltage, VGT - (V) 8 7 Pulse Power PGM (Watts) Frequency Hz 50 100 150 150 150 150 150 150 150 100 20 - 400 150 125 100 25 - Upper Limit 6 5 Preferred gate drive area 4 3 2 o 1 Tj = -40oC Tj = 25oC Lower Limit Tj = 125 C 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Gate trigger current IGT, - (A) Fig14 Gate Characteristics 30 Lower Limit Upper Limit 5W 10W 20W 50W 100W 150W -40C Gate trigger voltage, VGT - (V) 25 20 15 10 5 0 0 1 2 3 4 5 6 7 8 9 10 Gate trigger current, IGT - (A) Fig. 15 Gate characteristics 8/10 www.dynexsemi.com DCR1910V85 SEMICONDUCTOR PACKAGE DETAILS For further package information, please contact Customer Services. All dimensions in mm, unless stated otherwise. DO NOT SCALE. 3rd ANGLE PROJECTION DO NOT SCALE IF IN DOUBT ASK HOLE Ø3.60 X 2.00 DEEP (IN BOTH ELECTRODES) 20° OFFSET (NOM.) TO GATE TUBE Ø110.0 MAX. Ø73.0 NOM. Ø1.5 CATHODE Device DCR1474SV18 DCR1475SV28 DCR1476SV42 DCR1478SV48 DCR1574SV28 DCR1575SV42 DCR1576SV52 DCR4060V22 DCR3780V28 DCR3030V42 DCR2720V52 DCR2290V65 DCR1910V85 Maximum Minimum Thickness Thickness (mm) (mm) 27.265 26.515 27.34 26.59 27.57 26.82 27.69 26.94 27.34 26.59 27.57 26.82 27.69 26.94 27.265 26.515 27.34 26.59 27.57 26.82 27.69 26.94 27.95 27.2 28.31 27.56 GATE ANODE Ø73.0 NOM. FOR PACKAGE HEIGHT SEE TABLE Lead length: 420mm Lead terminal connector: M4 ring Package outline type code: V Fig.16 Package outline 9/10 www.dynexsemi.com DCR1910V85 SEMICONDUCTOR POWER ASSEMBLY CAPABILITY The Power Assembly group was set up to provide a support service for those customers requiring more than the basic semiconductor, and has developed a flexible range of heatsink and clamping systems in line with advances in device voltages and current capability of our semiconductors. We offer an extensive range of air and liquid cooled assemblies covering the full range of circuit designs in general use today. The Assembly group offers high quality engineering support dedicated to designing new units to satisfy the growing needs of our customers. Using the latest CAD methods our team of design and applications engineers aim to provide the Power Assembly Complete Solution (PACs). HEATSINKS The Power Assembly group has its own proprietary range of extruded aluminium heatsinks which have been designed to optimise the performance of Dynex semiconductors. Data with respect to air natural, forced air and liquid cooling (with flow rates) is available on request. For further information on device clamps, heatsinks and assemblies, please contact your nearest sales representative or Customer Services. Stresses above those listed in this data sheet may cause permanent damage to the device. In extreme conditions, as with all semiconductors, this may include potentially hazardous rupture of the package. Appropriate safety precautions should always be followed. http://www.dynexsemi.com e-mail: [email protected] HEADQUARTERS OPERATIONS DYNEX SEMICONDUCTOR LTD Doddington Road, Lincoln Lincolnshire, LN6 3LF. United Kingdom. Tel: +44(0)1522 500500 Fax: +44(0)1522 500550 CUSTOMER SERVICE Tel: +44(0)1522 502753 / 502901. Fax: +44(0)1522 500020 Dynex Semiconductor 2003 TECHNICAL DOCUMENTATION – NOT FOR RESALE. PRODUCED IN UNITED KINGDOM. This publication is issued to provide information only which (unless agreed by the Company in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. The Company reserves the right to alter without prior notice the specification, design or price of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user’s responsibility to fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. These products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. All products and materials are sold and services provided subject to the Company’s conditions of sale, which are available on request. All brand names and product names used in this publication are trademarks, registered trademarks or trade names of their respective owners. 10/10 www.dynexsemi.com