SBOS277E − JUNE 2004 − REVISED DECEMBER 2004
FEATURES
D Wide Supply Range: 4.5 V to 18 V
D Gamma Correction Channels: 10, 6, and 4
D Integrated VCOM Buffer
D Excellent Output Current Drive:
D
D
D
D
D
D
− Gamma Channels:
> 30 mA at 0.5 V Swing to Rails(1)
− VCOM:
> 100 mA typ at 2 V Swing to Rails(1)
Large Capacitive Load Drive Capability
Rail-to-Rail Output
PowerPAD Package
Low-Power/Channel: < 500 µA
High ESD Rating: 8 kV HBM, 2 kV CDM,
300 V MM
Specified for −25°C to +85°C
(1) See Typical Characteristic curves for details.
V DD
So urce Driver
BUFx x704
Gamma 1
Gamma 2
Gamma 3
Gamma (n − 2)
Gamma (n − 1)
Gamma (n )
DESCRIPTION
The BUFxx704 are a series of multi-channel buffers
targeted towards gamma correction in high-resolution
LCD panels. They are pin-compatible with the existing
BUFxx702 and BUFxx703 family and operate at higher
supply voltages up to 18 V (19 V absolute max). The
higher supply voltage enables faster response times
and brighter images in large-screen LCD panels. This
is especially important in LCD TV applications.
The number of gamma correction channels required
depends on a variety of factors and differs greatly from
design to design. Therefore, 10, 6, and 4 channel
options are offered. For additional space and cost
savings, a VCOM channel with > 100mA drive capability
is integrated into the BUF11704, BUF07704, and
BUF05704.
The BUF11704, BUF07704, BUF06704, and
BUF05704 are available in the TSSOP-28, TSSOP-20,
TSSOP-16, and TSSOP-14 PowerPAD packages for
dramatically increased power dissipation capability.
This way, a large number of channels can be handled
safely in one package.
A flow-through pin out has been adopted to allow simple
PCB routing and maintain the cost-effectiveness of this
solution. All inputs and outputs of the BUFxx704
incorporate internal ESD protection circuits that prevent
functional failures at voltages up to 8 kV (HBM), 2 kV
(CDM), and 300 V (MM).
GAMMA
CHANNELS
VCOM CHANNELS
BUF11704
10
1
BUF07704
6
1
BUF06704
6
0
BUF05704
4
1
MODEL
V COM
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments Incorporated. All other trademarks are the property of their respective owners.
Copyright 2004, Texas Instruments Incorporated
!"#$%&" ' ()##*& %' "! +),-(%&" .%&*/ #".)(&'
("!"#$ &" '+*(!(%&"' +*# &0* &*#$' "! *1%' '&#)$*&' '&%.%#. 2%##%&3/
#".)(&" +#"(*''4 ."*' "& *(*''%#-3 (-).* &*'&4 "! %-- +%#%$*&*#'/
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SBOS277E − JUNE 2004 − REVISED DECEMBER 2004
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted(1)
PARAMETERS
Supply Voltage, VDD(2)
Input Voltage Range, VI
BUFxx704
UNIT
19
V
±VDD
See Dissipation Rating Table
Continuous Total Power Dissipation
−25 to 85
°C
Maximum Junction Temperature, TJ
125
°C
Storage Temperature Range, TSTG
−65 to 150
°C
260
°C
Human Body Model (HBM)
8
kV
Charged-Device Model (CDM)
2
kV
Operating Free-Air Temperature Range, TA
Lead Temperature 1.6mm (1/16 inch) from Case for 10s
ESD Rating:
Machine Model (MM)
300
V
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to GND.
ORDERING INFORMATION(1)
PRODUCT
PACKAGE-LEAD
PACKAGE MARKING
BUF05704
TSSOP-14
BUF05704
BUF06704
TSSOP-16
BUF06704
BUF07704
TSSOP-20
BUF07704
BUF11704
TSSOP-28
BUF11704
(1) For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet.
DISSIPATION RATING TABLE
PACKAGE TYPE
PACKAGE
DESIGNATOR
θJC(1)
(°C/W)
qJA(1)
(°C/W)
TA ≤ 25°C
POWER RATING
TSSOP-28
PWP (28)
TSSOP-20
PWP (20)
0.72
27.9
3.58 W
1.40
32.63
3.06 W
TSSOP-16
TSSOP-14
PWP (16)
2.07
36.51
2.74
PWP (14)
2.07
37.47
2.67
(1) PowerPAD attached to PCB, 0 lfm airflow, and 76mm x 76mm copper area.
RECOMMENDED OPERATING CONDITIONS
MIN
Supply Voltage, VDD
Operating Free-Air Temperature, TA
2
NOM
MAX
UNIT
7
18
V
−25
+85
°C
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SBOS277E − JUNE 2004 − REVISED DECEMBER 2004
EQUIVALENT SCHEMATICS OF INPUTS AND OUTPUTS
INPUT STAGE OF BUFFERS
BUF11704: 6 to 10
BUF07704: 4 to 6
BUF06704: 4 to 6
BUF05704: 3 to 4
INPUT STAGE OF BUFFERS
BUF11704: 1 to 5 and VCOM
BUF07704: 1 to 3 and VCOM
BUF06704: 1 to 3
BUF05704: 1 to 2 and VCOM
OUTPUT STAGE OF ALL BUFFERS
VS
VS
VS
Previous
Stage
Next Stage
Next Stage
Buffer
Input
Buffer
Input
Inverting
Input
Buffer
Output
Buffer
Output
Next Stage
Previous
Stage
GND
GND
Buffer
Output
Next Stage
GND
Internal to BUF11704
Internal to BUF11704
ELECTRICAL CHARACTERISTICS: BUFxx704
Over operating free-air temperature range, VDD = 18 V, TA = 25°C, unless otherwise noted.
PARAMETER
TEST CONDITIONS
Gamma buffers
VIO
Input offset voltage
TA
25°C
MIN
VCOM
−1
25°C
−1
Full range(1)
VI = VDD/2
Full range(1)
25°C
62
PSRR
Power-Supply Rejection Ratio
VDD = 4.5 V to 19 V
Full range(1)
60
Buffer gain
VI = 5 V
Slew rate
Crosstalk
(1) Full range is −25°C to 85°C.
30
mV
30
Input bias current
SR
20
1
IIB
3dB bandwidth
UNIT
20
25°C
BW_3dB
MAX
Full range(1)
VI = 9V
Gamma buffers
VCOM buffer
Gamma buffers
VCOM buffer
TYP
200
pA
80
dB
25°C
0.9995
V/V
CL = 100 pF, RL = 2 kΩ
25°C
1
0.6
MHz
CL = 100 pF, RL = 2 kΩ
VIN = 2 V to 16 V
25°C
1.6
4.6
V/µs
VIP−P = 6 V, f = 1 kHz
25°C
85
dB
3
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SBOS277E − JUNE 2004 − REVISED DECEMBER 2004
ELECTRICAL CHARACTERISTICS: BUF11704
Over operating free-air temperature range, VDD = 18 V, TA = 25°C, unless otherwise noted.
PARAMETER
IDD
Supply current
ALL
TEST CONDITIONS
VO = VDD/2
No Load
TA(1)
25°C
25°C
25
C
VCOM buffer
IO = 1 mA to 100 mA,
VIN = 2 V
VCOM buffer sourcing
IO = −1 mA to −100 mA
VIN = 16 V
Buffers 1-10 sinking
IO = 1 mA to 10 mA
VIN = 1 V
VOH1-5
VOH6-10
VOL1-5
Buffers 1-5
High-level output
voltage
Low-level output
voltage
Buffers 6-10
Buffers 1-5
VOL6-10
Buffers 6-10
VOHCOM High-level output
voltage
VCOM buffer
Low-level output
voltage
VCOM buffer
VOLCOM
(1) Full range is −25°C to 85°C.
4
IO = −1 mA to −10 mA
VIN = 17 V
VIN = 18 V
ISOURCE = 10 mA
VIN = 17 V
ISINK = 10 mA
VDD
VDD − 1
VDD
GND
VIN = 17 V
ISOURCE = 10 mA
VIN = 1 V
ISINK = 10 mA
VIN = 1 V
ISOURCE = 10 mA
VIN = 0 V
ISINK = 10 mA
VIN = 16 V
ISINK = 100 mA
VIN = 16 V
ISOURCE = 100 mA
VIN = 2 V
ISINK = 100 mA
VIN = 2 V
ISOURCE = 100 mA
25°C
1
Full range
UNIT
mA
V
5
5
25°C
1
Full range
5
5
25°C
1
Full range
5
mV/mA
5
25°C
1
Full range
25°C
9.0
9.0
1
VCOM buffer sinking
Buffers 1-10 sourcing
MAX
5
1
Buffers 6-10
Load regulation
TYP
Full range
Buffers 1-5
Common-mode input range
MIN
5
5
17.85
17.9
17
V
17.15
25°C
V
16.85
17
1.0
1.15
25°C
V
0.85
25°C
1.0
0
0.15
16
16.15
25°C
V
V
15.85
16
2
25°C
2.15
V
1.85
2
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SBOS277E − JUNE 2004 − REVISED DECEMBER 2004
ELECTRICAL CHARACTERISTICS: BUF07704
Over operating free-air temperature range, VDD = 18 V, TA = 25°C, unless otherwise noted.
PARAMETER
IDD
Supply current
ALL
TEST CONDITIONS
VO = VDD/2
No Load
TA(1)
25°C
25°C
25
C
VCOM buffer
IO = 1 mA to 100 mA
VIN = 2 V
VCOM buffer sourcing
IO = −1 mA to −100 mA
VIN = 16 V
Buffers 1-6 sinking
IO = 1 mA to 10 mA
VIN = 1 V
VOH1-3
VOH4-6
VOL1-3
Buffers 1-3
High-level output
voltage
Low-level output
voltage
Buffers 4-6
Buffers 1-3
VOL4-6
Buffers 4-6
VOHCOM High-level output
voltage
VCOM buffer
Low-level output
voltage
VCOM buffer
VOLCOM
IO = −1 mA to −10 mA
VIN = 17 V
VIN = 18 V
ISOURCE = 10 mA
VIN = 17 V
ISINK = 10 mA
VDD
VDD − 1
VDD
GND
VIN = 17 V
ISOURCE = 10 mA
VIN = 1 V
ISINK = 10 mA
VIN = 1 V
ISOURCE = 10 mA
VIN = 0 V
ISINK = 10 mA
VIN = 16 V
ISINK = 100 mA
VIN = 16 V
ISOURCE = 100 mA
VIN = 2 V
ISINK = 100 mA
VIN = 2 V
ISOURCE = 100 mA
25°C
1
Full range
UNIT
mA
V
5
5
25°C
1
Full range
5
5
25°C
1
Full range
5
mV/mA
5
25°C
1
Full range
25°C
7.5
7.5
1
VCOM buffer sinking
Buffers 1-6 sourcing
MAX
5
1
Buffers 4-6
Load regulation
TYP
Full range
Buffers 1-3
Common-mode input range
MIN
5
5
17.85
17.9
17
V
17.15
25°C
V
16.85
17
1.0
1.15
25°C
V
0.85
25°C
1.0
0
0.15
16
16.15
25°C
V
V
15.85
16
2
25°C
2.15
V
1.85
2
(1) Full range is −25°C to 85°C.
5
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SBOS277E − JUNE 2004 − REVISED DECEMBER 2004
ELECTRICAL CHARACTERISTICS: BUF06704
Over operating free-air temperature range, VDD = 18 V, TA = 25°C, unless otherwise noted.
PARAMETER
IDD
Supply current
ALL
TEST CONDITIONS
VO = VDD/2
No Load
TA(1)
25°C
Buffers 1-6 sinking
Load regulation
Buffers 1-6 sourcing
VOH4-6
VOL1-3
Buffers 1-3
High-level output
voltage
Low-level output
voltage
VOL4-6
(1) Full range is −25°C to 85°C.
6
MAX
5
Buffers 4-6
Buffers 1-3
Buffers 4-6
IO = 1 mA to 10 mA
VIN = 1 V
IO = −1 mA to −10 mA
VIN = 17 V
VIN = 18 V
ISOURCE = 10 mA
1
VDD
GND
VDD − 1
VIN = 17 V
ISINK = 10 mA
VIN = 17 V
ISOURCE = 10 mA
VIN = 1 V
ISINK = 10 mA
VIN = 1 V
ISOURCE = 10 mA
VIN = 0 V
ISINK = 10 mA
25°C
1
Full range
1
Full range
5
mA
V
mV/mA
5
17.85
17.9
17
V
17.15
25°C
V
16.85
17
1.0
1.15
25°C
V
0.85
25°C
UNIT
5
5
25°C
25°C
7.5
7.5
25°C
Buffers 4-6
VOH1-3
TYP
Full range
Buffers 1-3
Common-mode input range
MIN
1.0
0
0.15
V
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SBOS277E − JUNE 2004 − REVISED DECEMBER 2004
ELECTRICAL CHARACTERISTICS: BUF05704
Over operating free-air temperature range, VDD = 18 V, TA = 25°C, unless otherwise noted.
PARAMETER
IDD
Supply current
ALL
TEST CONDITIONS
VO = VDD/2
No Load
TA(1)
25°C
25°C
25
C
VCOM buffer
IO = 1 mA to 100 mA
VIN = 2 V
VCOM buffer sourcing
IO = −1 mA to −100 mA
VIN = 16 V
Buffers 1-4 sinking
IO = 1 mA to 10 mA
VIN = 1 V
VOH1-3
VOH4-6
VOL1-3
Buffers 1-2
High-level output
voltage
Low-level output
voltage
Buffers 3-4
Buffers 1-2
VOL4-6
Buffers 3-4
VOHCOM High-level output
voltage
VCOM buffer
Low-level output
voltage
VCOM buffer
VOLCOM
IO = −1 mA to −10 mA
VIN = 17 V
VIN = 18 V
ISOURCE = 10 mA
VIN = 17 V
ISINK = 10 mA
VDD
VDD − 1
VDD
GND
VIN = 17 V
ISOURCE = 10 mA
VIN = 1 V
ISINK = 10 mA
VIN = 1 V
ISOURCE = 10 mA
VIN = 0 V
ISINK = 10 mA
VIN = 16 V
ISINK = 100 mA
VIN = 16 V
ISOURCE = 100 mA
VIN = 2 V
ISINK = 100 mA
VIN = 2 V
ISOURCE = 100 mA
25°C
1
Full range
UNIT
mA
V
5
5
25°C
1
Full range
5
5
25°C
1
Full range
5
mV/mA
5
25°C
1
Full range
25°C
7.5
7.5
1
VCOM buffer sinking
Buffers 1-4 sourcing
MAX
5
1
Buffers 3-4
Load regulation
TYP
Full range
Buffers 1-2
Common-mode input range
MIN
5
5
17.85
17.9
17
V
17.15
25°C
V
16.85
17
1.0
1.15
25°C
V
0.85
25°C
1.0
0
0.15
16
16.15
25°C
V
V
15.85
16
2
25°C
2.15
V
1.85
2
(1) Full range is −25°C to 85°C.
7
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SBOS277E − JUNE 2004 − REVISED DECEMBER 2004
BUF11704 Pin Configuration
BUF07704 Pin Configuration
BUF11704
VDD
1
28
VDD
NC
2
27
NC
OUT1
3
26
IN1
VDD
1
20
VDD
OUT2
4
25
IN2
OUT1
2
19
IN1
OUT3
5
24
IN3
OUT2
3
18
IN2
OUT4
6
23
IN4
OUT3
4
17
IN3
OUT5
7
22
IN5
OUT4
5
16
IN4
OUT6
8
21
IN6
OUT5
6
15
IN5
OUT7
9
20
IN7
OUT6
7
14
IN6
OUT8
10
19
IN8
NC
8
13
NC
OUT9
11
18
IN9
OUTCOM
9
12
INCOM
OUT10
12
17
IN10
GND
10
11
GND
OUTCOM
13
16
INCOM
GND
14
15
GND
TSSOP−28
PowerPAD
BUF07704
TSSOP−20
PowerPAD
NC = No Internal Connection
NC = No Internal Connection
BUF06704 Pin Configuration
BUF05704 Pin Configuration
BUF06704
BUF05704
8
VDD
1
16
VDD
OUT1
2
15
IN1
OUT2
3
14
IN2
OUT3
4
13
IN3
OUT4
5
12
IN4
OUT5
6
11
IN5
OUT6
7
10
IN6
GND
8
9
GND
TSSOP−16
PowerPAD
VDD
1
14
VDD
OUT1
2
13
IN1
OUT2
3
12
IN2
11
IN3
TSSOP−14
PowerPAD
OUT3
4
OUT4
5
10
IN4
OUTCOM
6
9
INCOM
GND
7
8
GND
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SBOS277E − JUNE 2004 − REVISED DECEMBER 2004
TYPICAL CHARACTERISTICS
DC CURVES
INPUT OFFSET VOLTAGE vs INPUT VOLTAGE
INPUT OFFSET VOLTAGE vs INPUT VOLTAGE
20
VS = 18 V
BUF11704: Channels 1−5
BUF07704: Channels 1−3
BUF06704: Channels 1−3
BUF05704: Channels 1−2
15
10
5
VOS − Input Offset Voltage − mV
VOS − Input Offset Voltage − mV
20
0
−5
−10
−15
−20
VS = 18 V
BUF11704: Channels 6−10
BUF07704: Channels 4−6
BUF06704: Channels 4−6
BUF05704: Channels 3−4
15
10
5
0
−5
−10
−15
−20
0
3
6
9
12
15
18
0
15
18
INPUT BIAS CURRENT vs FREE−AIR TEMPERATURE
250
IIB − Input Bias Current − pA
VOS − Input Offset Voltage − mV
12
Figure 2
10
5
0
−5
−10
−15
−20
200
150
100
50
0
0
3
6
9
12
15
0
18
10
20
30
40
50
60
70
80 85
TA − Free−Air Temperature − _C
VIN − Input Voltage − V
Figure 3
Figure 4
BLANK SPACE
OUTPUT VOLTAGE vs OUTPUT CURRENT
HIGH−LEVEL OUTPUT VOLTAGE vs
HIGH−LEVEL OUTPUT CURRENT
18.0
16
14
12
10
−10_C
25_ C
VDD = 18 V
BUF11704: Channels 1−5
BUF07704: Channels 1−3
BUF06704: Channels 1−3
BUF05704: Channels 1−2
85_C
8
25_C
6
4
2
−10_C
0
VOH − High−Level Output Voltage − V
18
VO − Output Voltage − V
9
Figure 1
Channels VCOM
VS = 18 V
15
6
VIN − Input Voltage − V
INPUT OFFSET VOLTAGE vs INPUT VOLTAGE
20
3
VIN − Input Voltage − V
17.9
TA = −10_ C
17.8
TA = 25_C
17.7
17.6
17.5
17.4
VDD = 18 V
BUF11704: Channels 1−5
BUF07704: Channels 1−3
BUF06704: Channels 1−3
BUF05704: Channels 1−2
17.3
17.2
17.1
TA = 85_ C
17.0
0
10
20
30
40
50
60
70
IO − Output Current − mA
Figure 5
80
90
100
0
5
10
15
20
25
30
35
40
45
50
IOH − High−Level Output Current − mA
Figure 6
9
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SBOS277E − JUNE 2004 − REVISED DECEMBER 2004
TYPICAL CHARACTERISTICS
DC CURVES (continued)
BLANK SPACE
OUTPUT VOLTAGE vs OUTPUT CURRENT
LOW−LEVEL OUTPUT VOLTAGE vs
LOW−LEVEL OUTPUT CURRENT (Detailed View)
1.0
VOL − Low−Level Output Voltage − V
18
VO − Output Voltage − V
16
14
12
10
8
−10_C
VSUPPLY = 18 V
BUF11704: Channels 6−10
BUF07704: Channels 4−6
BUF06704: Channels 4−6
BUF05704: Channels 3−4
6
4
2
25_C
85_ C
0
BUF11704: Channels
BUF07704: Channels
BUF06704: Channels
BUF05704: Channels
0.9
0.8
0.7
6−10
4−6
4−6
3−4
85_C
0.6
0.5
0.4
0.3
25_ C
0.2
−10_ C
0.1
0
0
10
20
30
40
50
60
70
80
90
100
0
10
IO − Output Current − mA
20
30
40
50
I OL − Low−Level Output Current − mA
Figure 7
Figure 8
OUTPUT VOLTAGE vs OUTPUT CURRENT
SUPPLY CURRENT vs SUPPLY VOLTAGE
6
18
16
Supply Current − mA
VO − Output Voltage − V
5
14
12
VSUPPLY = 18 V
VCOM Buffer
10
85_ C
25_C
−10_C
8
6
4
4
3
2
1
2
0
0
0
25
50
75
100 125
0
150 175 200 225 250
2
4
6
8
12
14
16
18
20
Supply Voltage − V
IO − Output Current − mA
Figure 9
Figure 10
SUPPLY CURRENT vs FREE−AIR TEMPERATURE
INPUT BIAS CURRENT vs INPUT VOLTAGE
6
5
VS = 18 V
4
5
IB − Input Bias Current − pA
IQ − Supply Current − mA
10
4
3
2
1
3
2
1
0
−1
−2
−3
−4
−5
0
−50
−25
0
25
50
75
TA − Free−Air Temperature − _C
Figure 11
10
100
125
0
2
4
6
8
10
12
14
VIN − Input Voltage − V
Figure 12
16
18
20
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SBOS277E − JUNE 2004 − REVISED DECEMBER 2004
TYPICAL CHARACTERISTICS
POWER−SUPPLY REJECTION RATIO vs FREQUENCY
VDD = 10 V
RL = 2 k
CL = 100 pF
80
70
60
50
Gamma Channels
40
VCOM Buffer
30
20
10
0
10
100
1k
10 k
100 k
f − Frequency − Hz
Figure 13
1M
10 M
CMRR − Common−Mode Rejection Ratio − dB
PSRR − Power−Supply Rejection Ratio − dB
AC CURVES
CROSSTALK vs FREQUENCY
0
VSUPPLY = 10 V
VIN = 1 VPP
20
40
60
80
100
120
140
10
100
1k
10 k
100 k
1M
f − Frequency − Hz
Figure 14
11
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SBOS277E − JUNE 2004 − REVISED DECEMBER 2004
TYPICAL CHARACTERISTICS
SMALL- AND LARGE-SIGNAL WAVEFORM CURVES
SMALL−SIGNAL WAVEFORM
50 mV/div
50 mV/div
SMALL−SIGNAL WAVEFORM
RLOAD = 2 kΩ
CLOAD = 100 pF
BUF11704: Channels 1−5
BUF07704: Channels 1−3
BUF06704: Channels 1−3
BUF05704: Channels 1−2
t − Time − 500 ns/div
RLOAD = 2 kΩ
CLOAD = 100 pF
BUF11704: Channels 6−10
BUF07704: Channels 4−6
BUF06704: Channels 4−6
BUF05704: Channels 3−4
t − Time − 500 ns/div
Figure 15
Figure 16
LARGE−SIGNAL WAVEFORM
SMALL−SIGNAL WAVEFORMVCOM BUFFER
RLOAD = 2 kΩ
CLOAD = 100 pF
VDD = 15 V
3 V/div
50 mV/div
RLOAD = 2 kΩ
CLOAD = 100 pF
VCOM Buffer
BUF11704: Channels 1−5
BUF07704: Channels 1−3
BUF06704: Channels 1−3
BUF05704: Channels 1−2
t − Time − 4 µs/div
t − Time − 500 ns/div
Figure 17
Figure 18
LARGE−SIGNAL WAVEFORM
LARGE−SIGNAL WAVEFORMVCOM BUFFER
BUF11704:
BUF07704:
BUF06704:
BUF05704:
12
RLOAD = 2 kΩ
C LOAD = 100 pF
VCOM Buffer
VDD = 15 V
3 V/div
3 V/div
RLOAD = 2 kΩ
CLOAD = 100 pF
VDD = 15 V
Channels 6−10
Channels 4−6
Channels 4−6
Channels 3−4
t − Time − 4 µs/div
t − Time − 4 µs/div
Figure 19
Figure 20
www.ti.com
SBOS277E − JUNE 2004 − REVISED DECEMBER 2004
Gamma correction voltages are often generated using
a simple resistor ladder, as shown in Figure 21. The
BUFxx704 buffers the various nodes on the gamma
correction resistor ladder. The low output impedance of
the BUFxx704 forces the external gamma correction
voltage on the respective reference node of the LCD
source driver. Figure 21 shows an example of the
BUFxx704 in a typical block diagram driving an LCD
source driver with 10- or 6-channel gamma correction
reference inputs.
APPLICATION INFORMATION
The requirements on the number of gamma correction
channels vary greatly from panel to panel. Therefore,
the BUFxx704 series of gamma correction buffers
offers different channel combinations. The BUF11704
offers 10 gamma channels plus one VCOM channel,
whereas the BUF07704 provides six gamma channels
plus one VCOM. The VCOM channel on both models can
be used to drive the VCOM node on the LCD panel.
VDD
Source Driver
BUFxx704
RS(1)
Gamma 1
(2)
(1)
Gamma 2
(2)
(1)
Gamma 3
(2)
(1)
Gamma (n − 2)
(2)
(1)
Gamma (n − 1)
(2)
(1)
Gamma (n)(3)
(2)
VCOM
(1) Optional Increases stability.
(2) Optional capacitor.
(3) n = max number of gamma channels
on respective BUFxx704.
Figure 21. LCD Source Driver Typical Block Diagram
13
www.ti.com
SBOS277E − JUNE 2004 − REVISED DECEMBER 2004
ESD RATINGS
The BUFxx704 has excellent ESD performance: 8 kV
HBM; 2 kV CDM; and 300 V MM. These ESD ratings
allow for increased manufacturability, fewer production
failures, and higher reliability.
INPUT VOLTAGE RANGE GAMMA BUFFERS
Figure 22 shows a typical gamma correction curve with
10 gamma correction reference points (GMA1 through
GMA10). As can be seen from this curve, the voltage
requirements for each buffer vary greatly. The swing
capability of the input stages of the various buffers is
carefully matched to the application. Using the example
of the BUF11704 with 10 gamma correction channels,
buffers 1 to 5 have input stages that include VDD, but will
only swing within 1 V to GND. Buffers 1 through 5 have
only a single NMOS input stage. Buffers 6 through 10
have only a single PMOS input stage. The input range
of the PMOS input stage includes GND.
this architecture, the correct buffer needs to be
connected to the correct gamma correction voltage.
Connect buffer 1 to the gamma voltage closest to VDD,
and buffers 2 through 5 to the following voltages. Buffer
10 should be connected to the gamma correction
voltage closest to GND (or the negative rail), and
buffers 9 through 6 to the following higher voltages.
COMMON BUFFER (VCOM)
The common buffer output of the BUFxx704 has a
greater output drive capability than the gamma buffers
to meet the heavier current demands of driving the
common node of the LCD panel. The common buffer
output was also designed to drive heavier capacitive
loads. Excellent output swing is possible with high
currents ( > 100 mA), as shown in Figure 23.
OUTPUT VOLTAGE vs OUTPUT CURRENT
Output Voltage − V
VDD1
GMA1
GMA2
GMA3
GMA4
GMA5
GMA6
GMA7
GMA8
GMA9
18
17
16
15
14
13
12
11
VDD = 18 V
TA = 25_ C
7
6
5
4
3
2
1
0
0
25
50
75
100 125 150 175 200 225 250
Output Current − mA
GMA10
VSS1
0
10
20
Input Data (Hex)
30
40
Figure 23. VCOM Output Drive Capability
Figure 22. Gamma Correction Curve
CAPACITIVE LOAD DRIVE
OUTPUT VOLTAGE SWING GAMMA BUFFERS
The output stages have been designed to match the
characteristic of the input stage. Once again, using the
example of the BUF11704, this means that the output
stage of buffers 1 to 5 swing very close to VDD, typically
VCC − 100 mV at 10 mA; its ability to swing to GND is
limited. Buffers 6 through 10 swing closer to GND than
VDD. Buffers 6 to 10 are designed to swing very close
to GND; typically, GND + 100 mV at a 10 mA load
current. See the Typical Characteristics for more
details. This approach significantly reduces the silicon
area and cost of the whole solution. However, due to
14
The BUFxx704 has been designed to be able to
sink/source large dc currents. Its output stage has been
designed to deliver output current transients with little
disturbance of the output voltage. However, there are
times when very fast current pulses are required.
Therefore, in LCD source driver buffer applications, it is
quite normal for capacitors to be placed at the outputs
of the reference buffers. These capacitors improve the
transient load regulation and will typically vary from
100 pF and more. The BUFxx704 gamma buffers were
designed to drive capacitances in excess of 100 pF. The
output is able to swing within 150 mV of the rails on 10
mA of output current, see Figure 24.
www.ti.com
SBOS277E − JUNE 2004 − REVISED DECEMBER 2004
MULTIPLE VCOM CHANNELS
OUTPUT VOLTAGE vs OUTPUT CURRENT
18.0
BUF11704:
BUF07704:
BUF06704:
BUF05704:
Output Voltage − V
17.6
17.4
17.2
17.0
In some LCD panels, more than one VCOM driver is
required for best panel performance. Figure 26 uses
three BUF07704s to create a total of 18 gamma-correction and three VCOM channels. This solution saves
considerable space and cost over the more conventional approach of using five or six quad-channel buffers or
op amps.
VDD = 18 V
TA = 25_C
17.8
Channels 1−5
Channels 1−3
Channels 1−3
Channels 1−2
1.0
BUF11704: Channels 6−10
BUF07704: Channels 4−6
BUF06704: Channels 4−6
BUF05704: Channels 3−4
0.8
0.6
0.4
0.2
BUF07704
0
0
5
10
15
20
25
30
35
40
45
50
Output Current − mA
Figure 24. Gamma Buffer Drive Capability
APPLICATIONS WITH >10 GAMMA CHANNELS
When a greater number of gamma correction channels
are required, two or more BUFxx704 devices can be
used in parallel, as shown in Figure 25. This capability
provides a cost-effective way of creating more reference voltages over the use of quad-channel op amps or
buffers. The suggested configuration in Figure 25
simplifies layout. The various different channel versions
provide a high degree of flexibility and also minimize
total cost and space.
OUT1
GMA1
OUT2
2
OUT3
3
OUT4
4
OUT5
5
OUT6
GMA6
VCOM1
VCOM1
BUF07704
BUF11704
OUT1
GMA7
OUT2
8
OUT3
9
OUT4
10
OUT1
GMA1
OUT5
11
OUT2
2
OUT6
GMA12
OUT3
3
OUT4
4
OUT5
5
OUT6
6
OUT7
7
OUT8
8
OUT9
9
OUT10
VCOM2
VCOM2
BUF07704
OUT1
GMA13
OUT2
14
OUT3
15
16
GMA10
OUT1
GMA11
OUT4
OUT2
12
OUT5
17
OUT3
13
OUT6
GMA18
OUT4
14
OUT5
15
OUT6
GMA16
VCOM3
VCOM3
BUF07704
Figure 25. Creating > 10 Gamma Voltage
Channels
Figure 26. 18-Channel Application with Three
Integrated VCOM Channels
15
www.ti.com
SBOS277E − JUNE 2004 − REVISED DECEMBER 2004
Table 1. How to Combine for > 10 Channels
BUF05704
BUF06704
BUF07704
BUF11704
12ch
—
2
—
—
12ch + VCOM
—
1
1
—
14ch + VCOM
1
—
—
1
16ch + VCOM
—
1
—
1
18ch + VCOM
—
—
—
2
20ch + VCOM
—
—
—
2
COMPLETE LCD SOLUTION FROM TI
In addition to the BUFxx704 line of gamma correction
buffers, TI offers a complete set of ICs for the LCD panel
market, including source and gate drivers, timing
controllers, various power-supply solutions, and audio
power solutions. Figure 27 shows the total IC solution
from TI.
AUDIO POWER AMPLIFIER FOR TV
SPEAKERS
The TPA3005D2 is a 6 W (per channel) stereo audio
amplifier specifically targeted towards LCD monitors
and TVs. It offers highly efficient, filter-free Class-D
operation for driving bridge-tied stereo speakers. The
TPA3005D2 is designed to drive stereo speakers as low
as 8 Ω without an output filter. The high efficiency of the
TPA3005D2 eliminates the need for external heatsinks
when playing music. The TPA3008D2 is similar to the
TPA3005D2, but is capable of 8 W of output power.
Texas Instruments offers a full line of linear and
switch-mode audio power amplifiers. For more
information, visit www.ti.com. For excellent audio
performance, TI recommends the OPA364 (SBOS259)
or OPA353 (SBOS103) as headphone drivers.
INTEGRATED DC/DC CONVERTERS FOR
LCD PANELS: TPS65100 and TPS65140
The TPS65100 and TPS65140 offer a very compact
and small power supply solution to provide all three
power-supply voltages required by TFT (thin film
transistor) LCD displays. Additionally the devices have
an integrated VCOM buffer. The auxiliary linear regulator
controller can be used to generate the 3.3 V logic power
rail for systems powered by a 5 V supply rail only. The
main output can power the LCD source drivers as well
as the BUFxx704. An integrated adjustable charge
pump doubler/tripler provides the positive LCD gate
drive voltage. An externally adjustable negative charge
pump provides the negative gate drive voltage. The
TPS65100 has an integrated VCOM buffer to power the
LCD backplane. A version of the BUFxx704 without the
integrated VCOM buffer could be used for minimum
redundancy and lowest cost. For LCD panels powered
by 5 V only, the TPS65100 has a linear regulator
controller that uses an external transistor to provide a
regulated 3.3 V output for the digital circuits. Contact
the local sales office for more information.
Reference
VCOM
Gamma Correction
BUFxx704
2.7 V−5 V
TPS65140
TPS65100
LCD
Supply
15 V
26 V
−14 V
3.3 V
TPA3005D2
TPA3008D2
Audio
Speaker
Driver
n
Logic and
Timing
Controller
Gate Driver
Source Driver
High−Resolution
TFT−LCS Panel
Figure 27. TI LCD Solution
16
n
www.ti.com
SBOS277E − JUNE 2004 − REVISED DECEMBER 2004
them small, so that solder wicking through the holes
is not a problem during reflow.
GENERAL PowerPAD DESIGN
CONSIDERATIONS
The BUFxx704 is available in the thermally-enhanced
PowerPAD family of packages. These packages are
constructed using a downset leadframe upon which the
die is mounted, as shown in Figure 28(a) and (b). This
arrangement results in the lead frame being exposed as
a thermal pad on the underside of the package; see
Figure 28(c). Due to this thermal pad having direct
thermal contact with the die, excellent thermal
performance is achieved by providing a good thermal
path away from the thermal pad.
The PowerPAD package allows for both assembly and
thermal management in one manufacturing operation.
During the surface-mount solder operation (when the
leads are being soldered), the thermal pad must be
soldered to a copper area underneath the package.
Through the use of thermal paths within this copper
area, heat can be conducted away from the package
into either a ground plane or other heat-dissipating
device. Soldering the PowerPAD to the PCB is
always required, even with applications that have
low power dissipation. This provides the necessary
thermal and mechanical connection between the lead
frame die pad and the PCB.
The PowerPAD must be connected to the device’s most
negative supply voltage.
1. Prepare the PCB with a top-side etch pattern. There
should be etching for the leads as well as etch for the
thermal pad.
2. Place recommended holes in the area of the thermal
pad. Ideal thermal land size and thermal via patterns
(2x3 for BUF05704 PWP-14 and BUF06704
PWP-16; 2x4 for BUF07704 PWP-20; and 2x5 for
BUF11704 PWP-28) can be seen in the technical
brief, PowerPAD Thermally-Enhanced Package
(SLMA002), available for download at www.ti.com.
These holes should be 13 mils in diameter. Keep
3. Additional vias may be placed anywhere along the
thermal plane outside of the thermal pad area. This
helps dissipate the heat generated by the
BUFxx704 IC. These additional vias may be larger
than the 13-mil diameter vias directly under the
thermal pad. They can be larger because they are
not in the thermal pad area to be soldered; thus,
wicking is not a problem.
4. Connect all holes to the internal ground plane.
5. When connecting these holes to the ground plane,
do not use the typical web or spoke via connection
methodology. Web connections have a high thermal
resistance connection that is useful for slowing the
heat transfer during soldering operations. This
makes the soldering of vias that have plane
connections easier. In this application, however, low
thermal resistance is desired for the most efficient
heat transfer. Therefore, the holes under the
BUFxx704 PowerPAD package should make their
connection to the internal ground plane with a
complete
connection
around
the
entire
circumference of the plated-through hole.
6. The top-side solder mask should leave the terminals
of the package and the thermal pad area with its six
holes (BUF05704 and BUF06704), eight holes
(BUF07704) or ten holes (BUF11704) exposed. The
bottom-side solder mask should cover the holes of
the thermal pad area. This prevents solder from
being pulled away from the thermal pad area during
the reflow process.
7. Apply solder paste to the exposed thermal pad area
and all of the IC terminals.
8. With these preparatory steps in place, the
BUFxx704 IC is simply placed in position and run
through the solder reflow operation as any standard
surface-mount component. This preparation results
in a properly installed part.
DIE
Side View (a)
Thermal
Pad
DIE
End View (b)
Bottom View (c)
The thermal pad is electrically isolated from all terminals in the package.
Figure 28. Views of Thermally-Enhanced DGN Package
17
www.ti.com
SBOS277E − JUNE 2004 − REVISED DECEMBER 2004
ǒ
Ǔ
TMAX = absolute maximum junction temperature (125°C)
TA = free-ambient air temperature (°C)
qJA = qJC + qCA
qJC = thermal coefficient from junction to case (°C/W)
qCA = thermal coefficient from case-to-ambient air (°C/W)
8
TSSOP−28
TSSOP−20
TSSOP−16
TSSOP−14
7
Maximum Power Dissipation − W
For a given qJA, the maximum power dissipation is
shown in Figure 29, and is calculated by the following
formula:
T MAX * T A
PD +
q JA
Where:
PD = maximum power dissipation (W)
6
5
4
3
2
1
0
Dissipation with PowerPAD
soldered down.
−40
−20
0
20
40
60
80
100
TA −Free−Air Temperature −_ C
Figure 29. Maximum Power Dissipation vs
Free-Air Temperature
18
www.ti.com
PWP (R−PDSO−G14)
THERMAL INFORMATION
This PowerPADt package incorporates an exposed thermal pad that is designed to be attached directly to an
external heatsink. When the thermal pad is soldered direct ly to the printed circuit board (PCB), the PCB can be
used as a heatsink. In addition, through the use of thermal vias, the thermal pad can be attached directly to a
ground plane or special heatsink structure designed into the PCB. This design optimizes the heat transfer from
the integrated circuit (IC).
For additional information on the PowerPAD package and how to take advantage of its heat dissipating abilities,
refer to Technical Brief, PowerPAD Thermally Enhanced Package, Texas Instruments Literature No. SLMA002
and Application Brief, PowerPAD Made Easy , Texas Instruments Literature No. SLMA004. Both documents are
available at www.ti.com.
The exposed thermal pad dimensions for this package are shown in the following illustration.
8
14
Exposed Thermal Pad
2,46
1,86
7
1
2,31
1,53
Top View
NOTE: All linear dimensions are in millimeters
PPTD023
Exposed Thermal Pad Dimensions
PowerPAD is a trademark of Texas Instruments
www.ti.com
PWP (R−PDSO−G16)
THERMAL INFORMATION
This PowerPADt package incorporates an exposed thermal pad that is designed to be attached directly to an
external heatsink. When the thermal pad is soldered direct ly to the printed circuit board (PCB), the PCB can be
used as a heatsink. In addition, through the use of thermal vias, the thermal pad can be attached directly to a
ground plane or special heatsink structure designed into the PCB. This design optimizes the heat transfer from
the integrated circuit (IC).
For additional information on the PowerPAD package and how to take advantage of its heat dissipating abilities,
refer to Technical Brief, PowerPAD Thermally Enhanced Package, Texas Instruments Literature No. SLMA002
and Application Brief, PowerPAD Made Easy , Texas Instruments Literature No. SLMA004. Both documents are
available at www.ti.com.
The exposed thermal pad dimensions for this package are shown in the following illustration.
16
9
Exposed Thermal Pad
2,46
1,75
1
8
2,31
1,75
Top View
NOTE: All linear dimensions are in millimeters
PPTD024
Exposed Thermal Pad Dimensions
PowerPAD is a trademark of Texas Instruments
www.ti.com
PWP (R−PDSO−G20)
THERMAL INFORMATION
This PowerPADt package incorporates an exposed thermal pad that is designed to be attached directly to an
external heatsink. When the thermal pad is soldered direct ly to the printed circuit board (PCB), the PCB can be
used as a heatsink. In addition, through the use of thermal vias, the thermal pad can be attached directly to a
ground plane or special heatsink structure designed into the PCB. This design optimizes the heat transfer from
the integrated circuit (IC).
For additional information on the PowerPAD package and how to take advantage of its heat dissipating abilities,
refer to Technical Brief, PowerPAD Thermally Enhanced Package, Texas Instruments Literature No. SLMA002
and Application Brief, PowerPAD Made Easy , Texas Instruments Literature No. SLMA004. Both documents are
available at www.ti.com.
The exposed thermal pad dimensions for this package are shown in the following illustration.
20
11
Exposed Thermal Pad
2,40
1,61
1
10
3,70
2,61
Top View
NOTE: All linear dimensions are in millimeters
PPTD027
Exposed Thermal Pad Dimensions
PowerPAD is a trademark of Texas Instruments
www.ti.com
PWP (R−PDSO−G28)
THERMAL INFORMATION
This PowerPADt package incorporates an exposed thermal pad that is designed to be attached directly to an
external heatsink. When the thermal pad is soldered direct ly to the printed circuit board (PCB), the PCB can be
used as a heatsink. In addition, through the use of thermal vias, the thermal pad can be attached directly to a
ground plane or special heatsink structure designed into the PCB. This design optimizes the heat transfer from
the integrated circuit (IC).
For additional information on the PowerPAD package and how to take advantage of its heat dissipating abilities,
refer to Technical Brief, PowerPAD Thermally Enhanced Package, Texas Instruments Literature No. SLMA002
and Application Brief, PowerPAD Made Easy , Texas Instruments Literature No. SLMA004. Both documents are
available at www.ti.com.
The exposed thermal pad dimensions for this package are shown in the following illustration.
28
15
Exposed Thermal Pad
2,35
1,60
14
1
6,46
5,35
Top View
NOTE: All linear dimensions are in millimeters
PPTD032
Exposed Thermal Pad Dimensions
PowerPAD is a trademark of Texas Instruments
PACKAGE OPTION ADDENDUM
www.ti.com
8-Mar-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
BUF05704AIPWP
ACTIVE
HTSSOP
PWP
14
BUF05704AIPWPR
ACTIVE
HTSSOP
PWP
14
BUF06704AIPWP
ACTIVE
HTSSOP
PWP
16
90
Lead/Ball Finish
MSL Peak Temp (3)
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
BUF07704AIPWP
ACTIVE
HTSSOP
PWP
20
70
None
CU NIPDAU
Level-1-220C-UNLIM
BUF07704AIPWPR
ACTIVE
HTSSOP
PWP
20
2000
None
CU NIPDAU
Level-1-220C-UNLIM
BUF11704AIPWP
ACTIVE
HTSSOP
PWP
28
50
None
CU NIPDAU
Level-2-260C-1 YEAR
BUF11704AIPWPR
ACTIVE
HTSSOP
PWP
28
2000
None
CU NIPDAU
Level-2-260C-1 YEAR
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
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