AMD AM79514-1JC Subscriber line interface circuit Datasheet

Am79514
Subscriber Line Interface Circuit
DISTINCTIVE CHARACTERISTICS
■ Programmable constant-current feed
■ Programmable loop-detect threshold
■ Line feed characteristics independent of
battery variations
■ On-chip switching regulator for low-power
dissipation
■ Two-wire impedance set by single external
impedance
■ Polarity reversal feature
■ Tip Open state for ground-start lines
■ Optimized for –60 V battery
■ Ring and test relay drivers
■ On-hook transmission
BLOCK DIAGRAM
Test Relay Driver
TESTOUT
Ring Relay Driver
RINGOUT
A(TIP)
C1
C2
Ground-Key
Detector
HPA
Input Decoder
and Control
C3
C4
E1
DET
Two-Wire
Interface
HPB
VTX
Signal
Transmission
RSN
Off-Hook
Detector
B(RING)
RD
Power-Feed
Controller
DA
DB
VREG
L
VBAT
RDC
Ring-Trip
Detector
Switching
Regulator
BGND
CHS QBAT CHCLK
VCC
VEE
AGND/DGND
Publication# 18411 Rev: D Amendment: /0
Issue Date: October 1999
ORDERING INFORMATION
Standard Products
AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed
by a combination of the elements below.
Am79514
–1
C
J
TEMPERATURE RANGE
C = Commercial (0°C to 70°C)*
PACKAGE TYPE
J = 32-pin Plastic Leaded Chip Carrier (PL 032)
PERFORMANCE GRADE
–1 = Performance Grading
–2 = Performance Grading
DEVICE NUMBER/DESCRIPTION
Am79514
Subscriber Line Interface Circuit
Valid Combinations
Valid Combinations
–1
Am7951X
JC
–2
Valid Combinations list configurations planned to
be supported in volume for this device. Consult
the local AMD sales office to confirm availability
of specific valid combinations, to check on newly
released combinations, and to obtain additional
data on AMD’s standard military grade products.
Note:
* Functionality of the device from 0°C to +70°C is guaranteed by production testing. Performance from –40°C to +85°C is
guaranteed by characterization and periodic sampling of production units.
2
Am79514 Data Sheet
CONNECTION DIAGRAMS
Top View
RINGOUT
VCC
VREG
BGND
B(RING)
A(TIP)
DB
Am79514
4
3
2
1
32
31
30
28
DA
L
7
27
RD
VBAT
8
26
HPB
QBAT
9
25
HPA
CHS
10
24
VTX
CHCLK
11
23
VEE
C4
12
22
RSN
E1
13
21
AGND
E0
14
Notes:
1. Pin 1 is marked for orientation.
2. TP is a thermal conduction pin tied to substrate.
15
16
17 18
19
20
DGND
6
RDC
TESTOUT
C1
TP
C3
29
C2
5
DET
TP
SLIC Products
3
PIN DESCRIPTIONS
Pin Names
Type
AGND
Gnd
A(TIP)
Output
BGND
Gnd
B(RING)
Output
Output of B(RING) power amplifier.
C3–C1
Inputs
Decoder. TTL compatible. C3 is MSB and C1 is LSB.
C4
Input
Test relay driver command. TTL compatible. A logic High enables the driver.
DGND
Gnd
Digital ground.
CHCLK
Input
Chopper clock. Input to switching regulator (TTL compatible) Frequency = 256 kHz (nominal).
CHS
Input
Chopper stabilization. Connection for external stabilization components.
DA
Input
Ring-Trip negative. Negative input to ring-trip comparator.
DB
Input
Ring-Trip positive. Positive input to ring-trip comparator.
DET
Output
E0
Input
Read enable. A logic High enables DET. A logic Low disables DET.
E1
Input
Ground key enable. E1 = High connects the ground-key detector to DET, and E1 = Low connects
the off-hook or ring-trip detector to DET.
HPA
Capacitor
High-pass filter capacitor. A(TIP) side of high-pass filter capacitor.
HPB
Capacitor
High-pass filter capacitor. B(RING) side of high-pass filter capacitor.
L
Output
Switching regulator power transistor. Connection point for filter inductor and anode of catch diode.
This pin will have up to 60 V of pulse waveform on it and must be isolated from sensitive circuits.
Extreme care must be taken to keep the diode connections short because of the high currents and
high di/dt.
QBAT
Battery
Quiet battery. Filtered battery supply for the signal processing circuits. An external 100 Ω, 1/8 Ω
resistor must be connected between QBAT and VBAT pins.
RD
Resistor
Detect resistor. Threshold modification and filter point for the off-hook detector.
RDC
Resistor
DC feed resistor. Connection point for the DC feed current programming network. The other end
of the network connects to the receiver summing node (RSN). The sign of VRDC is negative for normal polarity and positive for reverse polarity.
RINGOUT
Output
RSN
Input
TESTOUT
Output
TP
Thermal
Thermal pin. Connection for heat dissipation. Internally connected to substrate (QBAT).
Leave as open circuit or connected to QBAT. In both cases, the TP pins can connect to
an area of copper on the board to enhance heat dissipation.
VBAT
Battery
Battery Supply.
VCC
Power
+5 V power supply.
VEE
Power
–5 V power supply.
VREG
Input
VTX
Output
4
Description
Analog ground.
Output of A(TIP) power amplifier.
Battery (power) ground.
Detector. When enabled, a logic Low indicates that the selected detector is tripped. The detector
is selected by the logic inputs (C3–C1 and E1). The output is open-collector with a built-in 15 kΩ
pull-up resistor.
Ring relay driver. Sourcing from BGND with internal diode to QBAT.
Receive summing node. The metallic current (both AC and DC) between A(TIP) and B(RING) is
equal to 1000 times the current into this pin. The networks that program receive gain, two-wire
impedance, and feed current all connect to this node. This node is extremely sensitive. Care should
be taken to route the 256-kHz chopper clock and switch lines away from the RSN node.
Test relay driver. Sourcing from BGND with internal diode to QBAT.
Regulated voltage. Provides negative power supply for power amplifiers, connection point for
inductor, filter capacitor, and chopper stabilization.
Transmit audio. This output is a unity gain version of the A(TIP) and B(RING) metallic voltage. The
other end of the two-wire input impedance programming network connects here.
Am79514 Data Sheet
ABSOLUTE MAXIMUM RATINGS
OPERATING RANGES
Storage temperature ......................... –55°C to +150°C
Commercial (C) Devices
VCC with respect to AGND/DGND ..... –0.4 V to +7.0 V
Ambient temperature .............................0°C to +70°C*
VEE with respect to AGND/DGND...... +0.4 V to –7.0 V
VCC .....................................................4.75 V to 5.25 V
VBAT with respect to AGND/DGND ..... +0.4 V to –70 V
VEE .................................................–4.75 V to –5.25 V
Note: Rise time of VBAT (dv/dt) must be limited to 27 V/µs or
less when QBAT bypass = 0.33 µF.
VBAT ......................................................–40 V to –63 V
BGND with respect to AGND/DGND.. +1.0 V to –3.0 V
BGND with respect to
AGND/DGND........................ –100 mV to +100 mV
A(TIP) or B(RING) to BGND:
Continuous .................................... –70 V to +1.0 V
10 ms (f = 0.1 Hz) .......................... –70 V to +5.0 V
1 µs (f = 0.1 Hz) .............................. –90 V to +10 V
250 ns (f = 0.1 Hz) ........................ –120 V to +15 V
Current from A(TIP) or B(RING) ....................... ±150 mA
Voltage on RINGOUT ....... BGND to 70 V above QBAT
Voltage on TESTOUT ....... BGND to 70 V above QBAT
AGND/DGND .......................................................... 0 V
Load resistance on VTX to ground .............. 10 kΩ min
Operating Ranges define those limits between which the
functionality of the device is guaranteed.
* Functionality of the device from 0°C to +70°C is guaranteed
by production testing. Performance from –40°C to +85°C is
guaranteed by characterization and periodic sampling of
production units.
Current through relay drivers .............................60 mA
Voltage on ring-trip inputs DA and DB .......VBAT to 0 V
Current into ring-trip inputs.................................. ±10 mA
Peak current into regulator switch (L pin) ........150 mA
Switcher transient peak off voltage on L pin ......+1.0 V
C4–C1, E1, CHCLK,
to AGND/DGND ....................–0.4 V to VCC + 0.4 V
Maximum power dissipation, (see note) ...... TA = 70°C
In 32-pin PLCC package..............................1.74 W
Note: Thermal limiting circuitry on chip will shut down the
circuit at a junction temperature of about 165°C. The device
should never be exposed to this temperature. Operation
above 145°C junction temperature may degrade device
reliability. See the SLIC Packaging Considerations for more
information.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent device failure. Functionality at or above
these limits is not implied. Exposure to Absolute Maximum
Ratings for extended periods may affect device reliability.
SLIC Products
5
ELECTRICAL CHARACTERISTICS
Description
Test Conditions (See Note 1)
Min
Analog (VTX) output impedance
Analog (VTX) output offset
0°C to +70°C
–40°C to +85°C
Analog (RSN) input impedance
300 Hz to 3.4 kHz
Max
Unit
3
20
W
+35
+40
mV
–35
–40
1
Longitudinal impedance
at A or B
Overload level
Z2WIN = 600 Ω to 900 Ω
Typ
–3.1
–3.1
—
4
20
35
4-wire
2-wire
Note
+3.1
+3.1
W
Vpk
2
—
dB
4
—
—
Transmission Performance, 2-Wire Impedance
2-wire return loss
(See Test Circuit D)
300 Hz to 500 Hz
500 Hz to 2500 Hz
2500 Hz to 3400 Hz
26
26
20
Longitudinal Balance (2-Wire and 4-Wire, See Test Circuit C)
Longitudinal to
metallic L-T, L-4
200 Hz to 1 kHz:
normal polarity
0°C to +70°C
normal polarity
–40°C to+85°C
reverse polarity
–1*
50
–2
63
–2
–2
58
58
1 kHz to 3.4 kHz:
normal polarity
0°C to +70°C
normal polarity
–40°C to +85°C
reverse polarity
–1*
52
–2
58
–2
–2
54
54
5
dB
Longitudinal sum (L-T) + (T-L)
300 to 3400 Hz
95
Longitudinal signal generation
4-L or T-L
300 to 800 Hz
800 to 3400 Hz
40
35
Longitudinal current capability
per wire
Active state
OHT state
17
8
mArms
Insertion Loss (2- to 4-Wire and 4- to 2-Wire, See Test Circuits A and B)
Gain accuracy
Variation with frequency
Gain tracking
0 dBm, 1 kHz,
0°C to +70°C
0 dBm, 1 kHz,
–40°C to +85°C
0 dBm, 1 kHz,
0°C to +70°C
0 dBm, 1 kHz,
–40°C to +85°C
–0.15
+0.15
–0.20
+0.20
–1*
–0.1
+0.1
–1
–0.15
+0.15
300 Hz to 3400 Hz
Relative to 1 kHz
0°C to +70°C
–40°C to +85°C
–0.1
–0.15
+0.1
+0.15
+7 dBm to –55 dBm
0°C to +70°C
–40°C to +85°C
–0.1
–0.15
+0.1
+0.15
Note:
* P.G. = Performance Grade
6
Am79514 Data Sheet
4
dB
4
4
ELECTRICAL CHARACTERISTICS (CONTINUED)
Description
Test Conditions (See Note 1)
Min
Typ
Max
Unit
Note
Balance Return Signal (4-Wire to 4-Wire, See Test Circuit B)
Gain accuracy
Variation with frequency
Gain tracking
Group delay
0 dBm, 1 kHz,
0°C to +70°C
0 dBm, 1 kHz,
–40°C to +85°C
0 dBm, 1 kHz,
0°C to +70°C
0 dBm, 1 kHz,
–40°C to +85°C
–0.15
+0.15
–0.20
+0.20
–1*
–0.1
+0.1
–1
–0.15
+0.15
300 Hz to 3400 Hz
Relative to 1 kHz
0°C to +70°C
–40°C to +85°C
–0.1
–0.15
+0.1
+0.15
+7 dBm to –55 dBm
0°C to +70°C
–40°C to +85°C
–0.1
–0.15
+0.1
+0.15
f = 1 kHz
4
dB
4
4
µs
5.3
Total Harmonic Distortion (2- to 4-Wire or 4- to 2-Wire, See Test Circuits A and B)
Distortion level
0 dBm, 300 Hz to 3400 Hz
–64
–50
Distortion level
+9 dBm
–55
–40
dB
Idle Channel Noise
Psophometric weighted noise
2-wire
2-wire
0°C to +70°C
–40°C to +85°C
–83
–83
–78
–75
4-wire
4-wire
0°C to +70°C
–40°C to +85°C
–83
–83
–78
–75
dBmp
7
4, 7
7
4, 7
Single Frequency Out-of-Band Noise (See Test Circuit E)
Metallic
Longitudinal
4 kHz to 9 kHz
9 kHz to 1 MHz
256 kHz and harmonics
–76
–76
–57
1 kHz to 15 kHz
Above 15 kHz
256 kHz and harmonics
–70
–85
–57
dBm
4, 5, 9
4, 5
4, 5, 9
4, 5
DC Feed Current and Voltage (See Figure 1)
Unless otherwise noted, Battery = 60 V (VBAT = –59.3 V)
Active state
loop-current accuracy
ILOOP (nominal) = 40 mA
RL = 2000 Ω, Battery = 62 V
RL = 2080 Ω
On-hook loop voltage
RL = ∞
OHT state
Tip Open state
Disconnect state
RL = 600 Ω
RL = 600 Ω
RL = 0
–1*
–2
–7.5
23
22.7
+7.5
%
mA
mA
47.5
49
18
20
22
1.0
1.0
mA
50
175
260
500
650
120
250
400
750
1000
mW
4
V
Power Dissipation, Battery = –60 V
On-hook Open Circuit state
On-hook OHT state
On-hook Active state
Off-hook OHT state
Off-hook Active state
RL = 600 Ω
RL = 600 Ω
SLIC Products
7
ELECTRICAL CHARACTERISTICS (CONTINUED)
Description
Test Conditions (See Note 1)
Min
Typ
Max
Unit
Note
Supply Currents
VCC On-hook supply current
Open Circuit state
OHT state
Active state
3
6
7.5
4.5
10
12
VEE On-hook supply current
Open Circuit state
OHT state
Active state
1.0
2.2
2.7
2.3
3.5
6.0
Open Circuit state
OHT state
Active state
0.4
3.0
4.0
1.0
5.0
6.0
VBAT On-hook supply current
mA
Power Supply Rejection Ratio (VRIPPLE = 50 mVrms)
VCC
40 Hz to 3400 Hz
3.4 kHz to 50 kHz
20
20
35
30
VEE
40 Hz to 3400 Hz
3.4 kHz to 50 kHz
20
15
30
25
VBAT
40 Hz to 3400 Hz
3.4 kHz to 50 kHz
27
20
30
30
IDET = 365/RD
–20
6, 7
—
dB
6, 7
—
6, 7
—
Off-Hook Detector
Current threshold
+20
%
10.0
kΩ
Ground-Key Detector Thresholds Active State, Battery = –60 V
Ground-key resistance threshold B(RING) to GND
Ground-key current threshold
2.0
B(RING) or midpoint to GND
4.2
9
mA
Ring-Trip Detector Input
Bias current
Offset voltage
Source resistance = 0 to 200 kΩ
–5
–0.05
–50
0
µA
+50
mV
Logic Inputs (C4–C1, E1, and CHCLK)
Input High voltage
2.0
V
Input Low voltage
Input High current
0.8
All inputs except E1
Input E1
–75
–75
Input Low current
40
45
–0.4
µA
mA
Logic Output (DET)
Output Low voltage
IOUT = 0.8 mA
Output High voltage
IOUT = –0.1 mA
0.4
2.4
V
Relay Driver Outputs (RINGOUT, TESTOUT)
On voltage
50 mA source
BGND –2
Off leakage
Clamp voltage
8
V
0.5
50 mA sink
QBAT –2
Am79514 Data Sheet
100
µA
V
8
RELAY DRIVER SCHEMATICS
BGND
BGND
RINGOUT
TESTOUT
QBAT
QBAT
SWITCHING CHARACTERISTICS
Symbol
tgkde
Parameter
Test Conditions
E1 Low to DET High (E0 = 1)
E1 Low to DET Low (E0 = 1)
Ground-key Detect state
RL open, RG connected
(See Figure H)
Temperature
Ranges
Min
Typ
Max
0°C to +70°C
–40°C to +85°C
3.8
4.0
0°C to +70°C
–40°C to +85°C
1.1
1.6
0°C to +70°C
–40°C to +85°C
1.1
1.6
tgkdd
E0 High to DET Low (E1 = 0)
tgkd0
E0 Low to DET High (E1 = 0)
0°C to +70°C
–40°C to +85°C
3.8
4.0
tshde
E1 High to DET Low (E0 = 1)
0°C to +70°C
–40°C to +85°C
1.2
1.7
0°C to +70°C
–40°C to +85°C
3.8
4.0
tshdd
E1 High to DET High (E0 = 1) Switchhook Detect state
RL = 600 Ω, RG open
E0 High to DET Low (E1 = 1) (See Figure G)
0°C to +70°C
–40°C to +85°C
1.1
1.6
tshd0
E0 Low to DET High (E1 = 1)
0°C to +70°C
–40°C to +85°C
3.8
4.0
SLIC Products
Unit
Note
µs
4
9
SWITCHING WAVEFORMS
E1 to DET
E1
DET
tgkde
tshde
tgkde
tshde
E0 to DET
E1
E0
DET
tshdd
tshd0
tgkdd
tgkd0
Note:
All delays measured at 1.4 V level.
Notes:
1. Unless otherwise noted, test conditions are BAT = –60 V, VCC = +5 V, VEE = –5 V, RL = 600 Ω, CHP = 0.33 µF,
RDC1 = RDC2 = 31.25 kΩ, CDC = 0.1 µF, Rd = 51.1 kΩ, no fuse resistors, two-wire AC output impedance programming
impedance (ZT) = 600 kΩ resistive, receive input summing impedance (ZRX) = 300 kΩ resistive. (See Table 2 for
component formulas.)
2. Overload level is defined when THD = 1%.
3. Balance return signal is the signal generated at VTX by VRX. This specification assumes that the two-wire AC load impedance
matches the impedance programmed by ZT.
4. Not tested in production. This parameter is guaranteed by characterization or correlation to other tests.
5. These tests are performed with a longitudinal impedance of 90 Ω and metallic impedance of 300 Ω for frequencies below
12 kHz and 135 Ω for frequencies greater than 12 kHz. These tests are extremely sensitive to circuit board layout. Please
refer to application notes for details.
6. This parameter is tested at 1 kHz in production. Performance at other frequencies is guaranteed by characterization.
7. When the SLIC is in the Anti-Sat 2 operating region, this parameter is degraded. The exact degradation depends on system
design. The Anti-Sat 2 region occurs at high loop resistances when |VBAT| – |VAX –VBX| is less than approximately 15 V.
8. “Midpoint” is defined as the connection point between two 300 Ω series resistors connected between A(TIP) and B(RING).
9. Fundamental and harmonics from 256 kHz switch regulator chopper are not included.
10
Am79514 Data Sheet
Table 1. SLIC Decoding
DET Output
State
C3 C2 C1
Two-Wire Status
E1 = 0
E1 = 1
0
0
0
0
Open Circuit
Ring trip
Ring trip
1
0
0
1
Ringing
Ring trip
Ring trip
2
0
1
0
Active
Loop detector
Ground key
3
0
1
1
On-hook TX (OHT)
Loop detector
Ground key
4
1
0
0
Tip Open
Loop detector
5
1
0
1
Reserved
Loop detector
6
1
1
0
Active Polarity Reversal Loop detector
Ground key
7
1
1
1
OHT Polarity Reversal
Ground key
Table 2.
Loop detector
—
—
User-Programmable Components
Z T = 1000 ( Z 2WIN – 2R F )
Where ZT is connected between the VTX and RSN pins. The
fuse resistors are RF, and Z2WIN is the desired 2-wire AC input
impedance. When computing ZT, the internal current amplifier
pole and any external stray capacitance between VTX and
RSN must be taken into account.
ZL
1000 • Z T
Z RX = ----------- • ---------------------------------------------------G 42L Z T + 1000 ( Z L + 2R F )
Where ZRX is connected from VRX to the RSN pin, ZT is defined
above, G42L is the desired receive gain, and ZL is the 2-wire
load impedance.
2500
R DC1 + R DC2 = ------------I FEED
Where RDC1, RDC2, and CDC form the network
CDC = (1.5 ms)(RDC1 + RDC2)/(RDC1 • RDC2) connected to the
RDC pin. RDC1 and RDC2 are approximately equal.
365
R D = --------- ,
IT
Where RD and CD form the network connected from RD to –5 V
and IT is the threshold current between on hook and off hook.
0.5 ms
C D = ----------------RD
SLIC Products
11
DC FEED CHARACTERISTICS
3
4
2
1
1
VBAT = 62.3 V
Active state
RDC = 62.5 kΩ
OHT state
Notes:
1. Constant-current region:
Active state,
2500
I L = -----------R DC
OHT state,
1 2500
IL = --- • -----------2 R DC
2. Anti-sat cut-in:
3. Open Circuit voltage:
V AB = 46 V,
V BAT ≥ 58.9 V
V AB = 1.087 V BAT – 18.017,
V BAT < 58.9 V
V AB = 51.23 V,
V BAT ≥ 61.5 V
V AB = 1.073 V BAT – 14.72,
V BAT < 61.5 V
4. Anti-sat 1 region:
R DC
V AB = 51.23 – I L -----------488.3
5. Anti-sat 2 region:
R DC
V AB = 1.073 V BAT – 14.72 – I L ----------1071
a. VA–VB (VAB) Voltage vs. Loop Current (Typical)
12
Am79514 Data Sheet
DC FEED CHARACTERISTICS (continued)
VBAT = 62.3 V
RDC = 62.5 kΩ
b. Loop Current vs. Load Resistance (Typical)
A
a
RL
SLIC
IL
RSN
RDC1
b
RDC2
B
CDC
RDC
Feed current programmed by RDC1 and RDC2
c. Feed Programming
Figure 1. DC Feed Characteristics
SLIC Products
13
TEST CIRCUITS
A(TIP)
VTX
A(TIP)
VTX
RL
2
SLIC
VAB
VL
RL
2
SLIC
RT
AGND
RL
VAB
RT
AGND
RRX
RSN
RRX
B(RING)
B(RING) RSN
VRX
IL2–4 = 20 log (VTX / VAB)
IL4–2 = 20 log (VAB / VTX)
BRS = 20 log (VTX / VAB)
B. Four- to Two-Wire Insertion Loss and Balance Return Signal
A. Two- to Four-Wire Insertion Loss
ZD
1
ωC
<< RL
C
S1
RL
2
SLIC
AGND
VM
VS
RL
2
S2
RSN
RT
R
RT
VL
VL
A(TIP)
VTX
VTX
A(TIP)
RRX
SLIC
R
ZIN
B(RING)
VRX
RSN
B(RING)
S2 Open, S1 Closed
RRX
L-T Long. Bal. = 20 log (VAB / VL)
L-4 Long. Bal. = 20 log (VTX / VL)
Note:
ZD is the desired impedance (e.g., the
characteristic impedance of the line).
S2 Closed, S1 Open
4-L Long. Sig. Gen. = 20 log (VL / VRX)
RL = –20 log (2 VM / VS)
D. Two-Wire Return Loss Test Circuit
C. Longitudinal Balance
14
Am79514 Data Sheet
TEST CIRCUITS (continued)
68 Ω
C
RL
A(TIP)
SLIC
IDC
56 Ω
A(TIP)
SM
RL
B(RING)
68 Ω
C
RE
B(RING)
1
ωC
SE
<< 90 Ω
Current Feed
or Ground Key
F. Ground-Key Detection
E. Single-Frequency Noise
VCC
6.2 kΩ
A(TIP)
A(TIP)
DET
15 pF
RL = 600 Ω
B(RING)
RG = 3.9 kΩ
E1
B(RING)
G. Loop-Detector Switching
H. Ground-Key Switching
SLIC Products
15
PHYSICAL DIMENSION
PL032
.447
.453
.485
.495
.009
.015
.585
.595
.042
.056
.125
.140
Pin 1 I.D.
.080
.095
.547
.553
SEATING
PLANE
.400
REF.
.490
.530
.013
.021
.050 REF.
.026
.032
TOP VIEW
SIDE VIEW
16-038FPO-5
PL 032
DA79
6-28-94 ae
REVISION SUMMARY
Revision A to Revision B
•
Minor changes were made to the data sheet style and format to conform to AMD standards.
Revision B to Revision C
•
In Pin Description table, inserted/changed TP pin description to: “Thermal pin. Connection for heat dissipation.
Internally connected to substrate (QBAT). Leave as open circuit or connected to QBAT. In both cases, the TP
pins can connect to an area of copper on the board to enhance heat dissipation.”
•
Minor changes were made to the data sheet style and format to conform to AMD standards.
Revision C to Revision D
•
The physical dimension (PL032) was added to the Physical Dimension section.
•
Deleted the Ceramic DIP and Plastic DIP part (Am79512) and references to them.
•
Updated Pin Description table to correct inconsistencies.
16
Am79514 Data Sheet
The contents of this document are provided in connection with Advanced Micro Devices, Inc. ("AMD") products. AMD makes no representations
or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this publication. Except as set forth in AMD’s Standard Terms and Conditions of Sale, AMD assumes no
liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of
merchantability, fitness for a particular purpose, or infringement of any intellectual property right.
AMD’s products are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the
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situation where personal injury, death, or severe property or environmental damage may occur. AMD reserves the right to discontinue or make
changes to its products at any time without notice.
© 1999 Advanced Micro Devices, Inc.
All rights reserved.
Trademarks
AMD, the AMD logo and combinations thereof are trademarks of Advanced Micro Devices, Inc.
Product names used in this publication are for identification purposes only and may be trademarks of their respective companies.
SLIC Products
17
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