BWTECH BW6562A High pfc led driver Datasheet

BW6562A High PFC LED Driver
Features











Product Description
Single stage fly-back controller with PFC
Transition-mode operation
Ultra-low start-up current
Internal start-up timer
Low operating supply current
Low quiescent current
Disable function on error amplifier (E/A) input
Totem pole, push-pull output drive
Adjustable output over-voltage protection
Under-voltage lockout with hysteresis
1% Precision internal reference voltage
Typical Applications





Fly-back power converters
PFC pre-regulators to meet IEC61000-3-2
Hi-end AC-DC adapter/charger
Electronic single stage LED driver
Electronic Ballast
The BW6562A is a cost effective high performance
transition-mode (TM) power factor correction (PFC)
controller IC optimized for high PFC LED driver, battery
chargers and pre-regulator applications. The BW6562A
integrates an internal start-up timer, a highly linear
multiplier with Total Harmonics Distortion (THD) optimizer
for near unity power factor, a Zero Current Detector (ZCD)
to ensure transition-mode operation and a current sensing
comparator with built-in leading edge blanking. With ZCD
control, power MOSFET is always turned on with zero
inductor current. Consequently, transition-mode control
achieves lower switching loss and reduced noise. The
BW6562A offers great protection coverage including
system accurate adjustable over-voltage protection (OVP),
input under-voltage lockout (UVLO), multiplier output clamp
and GD output clamp for external power MOSFET
protection. The totem pole output stage is capable of
delivering sink/source drive current of +800mA/-600mA.
The BW6562A is available in SOP-8 package.
Typical Application Circuit
© 2012 Bruckewell Technology Corp., Ltd.
1
www.bruckewell-semi.com/
BW6562A High PFC LED Driver
Pin Assignments and Ordering Information
Device
Packaging
Quantity of Tape & Reel
BW6562A MST
SOP-8
3000
Pin Descriptions
Pin No.
Pin Name
Function
Inverting input pin of the error amplifier.
1
INV
The information on the output voltage of the PFC controller is fed into this pin through a
resistor divider. The pin can also be used as chip enable/disable control pin.
Output pin of the error amplifier.
2
COMP
3
MULT
A compensation network is placed between this pin and INV to achieve stability of the
voltage control loop and ensure high power factor and low THD.
Main input to the multiplier.
This pin is connected to the rectified mains voltage via a resistor divider and provides the
sinusoidal reference to the current loop.
Current sense input pin to the internal PWM comparator.
4
CS
The current flowing in the MOSFET is sensed through a resistor; the resulting voltage is
applied to this pin and compared with an internal sinusoidal-shaped reference, generated
by the multiplier, to switch on or off the external MOSFET. The pin is equipped with 200ns
leading-edge blanking for improved noise immunity.
Zero current detection pin.
5
ZCD
6
GND
Boost inductor’s demagnetization sensing input for transition-mode operation. A negativegoing edge triggers MOSFET’s turn-on.
Ground pin.
Current return for both the signal part of the IC and the gate driver.
Gate driver output pin.
7
GD
The totem pole output stage is able to drive power MOSFET’s with a peak current of
600mA source and 800mA sink. The high-level voltage of this pin is clamped at about 12V
to avoid excessive gate voltages in case the pin is supplied with a high VCC.
System power input pin.
8
VCC
Supply voltage of both the signal part of the IC and the gate driver. Upper limit is extended
to a maximum of 32V to provide a more headroom for supply voltage changes. This pin
has an internal 34V (min.) Zener diode to protect the IC itself from over-voltage transients.
© 2012 Bruckewell Technology Corp., Ltd.
2
www.bruckewell-semi.com/
BW6562A High PFC LED Driver
Absolute Maximum Ratings (Note 1)
Symbol
*
Parameter
VCC
IC supply voltage
IGD
Output totem pole peak current
Ratings
Unit
-0.3 ~ +40
V
-600 (source) / +800 (sink)
mA
-0.3 ~ +8.0
V
(Note 2)
Analog inputs & outputs
IZCD
Zero current detector maximum current
±10
mA
Continuous power dissipation (TA +25°C)
8 Pin SOP (de-rating 6.3mW/°C above +25°C)
0.63
W
Junction temperature
+150
°C
-65 ~ +150
°C
165
°C/W
TJ
TSTG
θJA
Storage temperature range
Junction-to-ambient thermal resistance
Note：
1. Exceeding these ratings could cause damage to the device. All voltages are with respect to ground. Currents are positive into,
negative out of the specified terminal.
2. * : Pin 1 (INV), pin 2 (COMP), pin 3 (MULT), pin 4 (CS)
Recommended Operating Conditions
Symbol
Parametar
Min.
Max.
Unit
VCC
DC input supply voltage range, VCC to GND
10.5
32
V
VINV
INV input pin voltage range relative to GND
2.455
2.545
V
MULT input pin voltage range relative to GND
0
3
V
CS input pin voltage range relative to GND
0
1.2
V
-40
+85
°C
VMULT
VCS
TA
Ambient temperature range
(Note 3)
Note :
3. Maximum ambient temperature range is limited by allowable power dissipation.
© 2012 Bruckewell Technology Corp., Ltd.
3
www.bruckewell-semi.com/
BW6562A High PFC LED Driver
Electrical Characteristics
(Over recommended operating conditions unless otherwise specified. VCC 12V, TJ
Parameter
Symbol
Min.
VCC
10.5
Turn-on threshold
VCC(ON)
11.7
Turn-off threshold
VCC(OFF)
8.7
ΔVCC
VZ
Typ.
- 25°C ~ +125°C, CO 1nF)
Max.
Unit
Condition
32
V
12.5
13.3
V
9.0
9.3
V
3.0
4.0
V
34
38
V
ICC 20mA
Supply voltage
Operating range
Hysteresis
Zener voltage
After turn-on
Supply current
Start-up current
ISTART
30
60
µA
Before turn-on, VCC 11V
Quiescent current
IQ
2.50
3.75
mA
After turn on
Operating supply current
ICC
3.5
5.0
mA
70kHz
IQ(OVP)
1.7
2.2
mA
During OVP, or VINV ≤ 150mV
2.500
2.545
V
10.5V < VCC < 32V
2
5
mV
VCC 10.5V ~ 32V
-1
µA
VINV 0V ~ 3V
80
dB
Open loop
1
MHz
Quiescent current
Error amplifier
Voltage feedback input
threshold
Line regulation
VINV
2.455
ΔVLINE
Input bias current
IINV
Voltage gain
GV
Gain-bandwidth product
GB
Source current
60
ICOMP(SOURCE)
-2.0
-3.5
-5.0
mA
VCOMP 4V, VINV 2.4V
Sink current
ICOMP(SINK)
2.4
4.5
mA
VCOMP 4V, VINV 2.6V
Upper clamp voltage
VCOMP(UP)
5.3
5.7
6.0
V
ISOURCE 0.5mA
Lower clamp voltage
VCOMP(LOW)
2.10
2.25
2.40
V
ISINK 0.5mA
Disable threshold
VINV(DIS)
150
200
250
mV
Re-start threshold
VINV(EN)
380
450
520
mV
-1
µA
Multiplier input
Input bias current
IMULT
Linear operation range
VMULT
0~3
ΔVCS /ΔVMULT
1.0
1.1
K
0.32
0.38
0.44
V
VMULT 1V, VCOMP 4V
Upper clamp voltage
VZCDH
5.0
5.7
6.5
V
IZCD 2.5mA
Lower clamp voltage
VZCDL
-0.3
0
0.3
V
IZCD -2.5mA
(Note 5)
VZCDA
V
Positive-going edge
Output max. slope
Gain
(Note 4)
VMULT 0V ~ 4V
V
V/V
VMULT 0V ~ 1V,
VCOMP Upper clamp
Zero current detector
Arming voltage
© 2012 Bruckewell Technology Corp., Ltd.
1.4
4
www.bruckewell-semi.com/
BW6562A High PFC LED Driver
Electrical Characteristics (continued)
(Over recommended operating conditions unless otherwise specified. VCC 12V, TJ - 25°C ~ +125°C, CO 1nF)
Parameter
Triggering voltage
Symbol
(Note 5)
Input bias current
Source current capability
Sink current capability
Min.
Typ.
Max.
Unit
Condition
VZCDT
0.7
V
Negative-going edge
IZCDB
2
µA
VZCD 1.0V ~ 4.5V
IZCD(SOURCE)
-2.5
mA
IZCD(SINK)
2.5
mA
Output over-voltage
Dynamic OVP triggering
current
Hysteresis
(Note 5)
Static OVP threshold
IOVP
27
µA
ΔIOVP
20
µA
VOVP(TH)
2.10
2.25
2.40
V
-1
µA
300
ns
Current sense comparator
Input bias current
ICS
Leading edge blanking
tLEB
Delay to output
Current sense clamp
Current sense offset
100
tD(H-L)
VCS
200
175
1.00
1.08
VCS(OS_0V)
25
VCS(OS_2.5V)
5
VCS 0V
ns
1.16
V
mV
VCOMP Upper clamp,
VMULT 1.5V
VMULT 0V
VMULT 2.5V
Starter
Start timer period
tSTART
75
190
300
µs
0.6
1.2
V
ISINK 100mA
V
ISOURCE 5mA
GATE driver
Output low voltage
VOL
Output high voltage
VOH
9.8
Peak source current
ISOURCE(PK)
-0.6
A
ISINK(PK)
0.8
A
Peak sink current
10.3
Voltage fall time
tFALL
30
70
ns
Voltage rise time
tRISE
60
110
ns
12
15
V
ISOURCE 5mA, VCC 20V
1.1
V
VCC 0V ~ VCC(ON), ISINK 2mA
Output clamp voltage
VO(CLAMP)
UVLO saturation
VUVLO(SAT)
10
Note：
4. The multiplier output is given by :
VCS K VMULT (VCOMP – 2.5)
5. Parameters guaranteed by design, functionality tested in production.
© 2012 Bruckewell Technology Corp., Ltd.
5
www.bruckewell-semi.com/
BW6562A High PFC LED Driver
Functional Block Diagram
Application Information
Operation Overview
PF
The BW6562A is an excellent transition-mode power
factor correction controller for AC-DC switching mode
power supply applications. It meets the IEC61000-3-2
requirement and is intended for the use in those
applications that demand low power harmonics distortion.
It integrates more functions to reduce the external
components counts and the size. Its major features are
described as below.
Power Factor Correction and THD
IRMS
cos(θ)
© 2012 Bruckewell Technology Corp., Ltd.
(8)
(9)
To consider current harmonics effect, IRMS is given by
(10)
The BW6562A features a one linear multiplier with THD
optimizer for near unity power factor. To explain PFC and
THD relation. First, average power is defined by
VRMS
(7)
(1)
6
where ISN is RMS value of n-th input harmonics current.
So, effective value of input distortion current is defined
by
www.bruckewell-semi.com/
BW6562A High PFC LED Driver
where θ is phase shift between input voltage and current.
Effective value of input voltage and current are defined by
as follows :
(3)
THD
So,
PF
(4)
(6)
where IRMS is the root mean square (RMS) value of iRMS.
Therefore, based on the above equations, obtained
power factor (PF) is defined by the ratio of average power
and apparent power :
The major cause of this THD distortion is the inability of
the system to transfer energy effectively when the
instantaneous line voltage is very low. This effect is
magnified by the high-frequency filter capacitor placed
after the bridge rectifier, which retains some residual
voltage that causes the diodes of the bridge rectifier to be
reverse-biased and the input current flow to temporarily
stop.
To overcome this issue, the circuit section designed in the
BW6562A forces the PFC regulator to process more
energy near the line voltage zero-crossings, as compared
to that commanded by the control loop. This results in
both, minimizing the time interval when energy transfer is
lacking, and fully discharging the high-frequency filter
capacitor after the bridge.
The BW6562A is designed with a special circuit that
reduces the conduction dead-angle occurring to the AC
© 2012 Bruckewell Technology Corp., Ltd.
7
(15)
If the current and voltage are in phase, then θ 0, which
will lead to cos(θ) 1, and the PF will be simplified as
PF
And apparent power is defined by
IRMS
(13)
(14)
(5)
VRMS
(12)
To quantify degree of current waveform distortion, THD
is written by
Therefore, PAV is written as :
i(t) ]
(11)
(2)
where vs(t) is instantaneous value of input voltage,
is(t) is instantaneous value of input current,
T is the cycle.
avg [ v(t)
ITH
(16)
Based on the equation 16, if THD is very small, then it
will get near unity power factor.
is shown in Typical Application Circuit on page 1. During
the start-up transient, the VCC is lower than the UVLO
threshold voltage (VCC(ON)) thus there is no gate pulse
produced from the BW6562A to drive power MOSFET.
Therefore, the current through R6 will provide the startup current and to charge the capacitor C2. Whenever
the VCC voltage is high enough to turn on the BW6562A
and further to deliver the gate drive signal. Once the
BW6562A is in normal operation, the supply current is
switched to and provided from the auxiliary winding of
the PFC choke (transformer). Lower start-up current
requirement on the PFC controller will help to increase
the value of R6 and then reduce the power consumption
on R6. By using CMOS process and the special circuit
design, the maximum start-up current of the BW6562A
is only 60µA. If a higher resistance value of R6 is
chosen, it usually takes more time to start-up. To
carefully select the value of R6 and C2 will optimize the
power consumption and start-up time.
www.bruckewell-semi.com/
BW6562A High PFC LED Driver
input current near the zero-crossings of the line voltage
(crossover distortion). In this way the THD of the current
is considerably reduced. The result will be near unity
power factor.
In essence, the circuit artificially increases the ON time of
the power switch with a positive offset added to the output
of the multiplier in the proximity of the line voltage zerocrossings. This offset is reduced as the instantaneous line
voltage increases, so that it becomes negligible as the
line voltage moves towards the peak of the sinusoidal
waveform.
Therefore, to maximize the benefit from the THD
improvement circuit, the high-frequency filter capacitor
after the bridge rectifier should be minimized, and kept
just to satisfy the EMI filtering requirements.
Output Voltage Setting
The BW6562A monitors the output voltage signal at INV
pin through a resistor divider pair R3 and R4. A transconductance amplifier is used instead of the
conventional voltage amplifier. This trans-conductance
amplifier (voltage controlled current source) also
provides the additional OVP function. Neglecting ripple
current, current flowing through R3, IR3, will equal to
current through R4, IR4, As the non-inverting input of the
error amplifier is biased inside the BW6562A at 2.5V,
and output voltage is determined by the following
relationship.
IR4
IR3
(17)
Under-Voltage Lockout
where R3 and R4 are top and bottom feedback resistor
values (as shown in the Typical Application Circuit on
page 1).
An UVLO comparator is implemented in it to detect the
voltage on the VCC pin. It would assure the supply voltage
enough to turn on the BW6562A PFC controller and
further to drive the power MOSFET. A hysteresis is built
in to prevent the shutdown from the voltage dip during
start up. The turn-on and turn-off threshold level are set at
12.5V and 9V, respectively.
If any abrupt change of output voltage, ΔVO > 0, occurs
due to a load drop, the voltage at pin INV will be kept at
2.5V by the local feedback of the EA, the network
connected between INV and COMP would introduces a
time constant to achieve high PF. The current through
R4 will remain equal to 2.5/R4 but IR3 will become :
Start-up Current and Start-up Circuit
I'R3
The typical start-up circuit to generate the BW6562A VCC
The extra current ΔIR3 will flow through the compensation
network and enter the error amplifier output via pin
COMP. When it reaches about 37µA, the output voltage
of the multiplier is forced to decrease which will reduce
the energy drawn from the mains. This action behaves
like braking will prevent the output voltage from
exceeding the regulated value too much.
OVP and Non-Latched Disable on INV pin
To prevent the over voltage on the output capacitor from
the fault condition, the BW6562A is implemented with a
dynamic OVP function on INV pin. If the output voltage
increases despite the braking and the current entering the
INV pin is higher than the IOVP threshold current 27µA, the
OVP (Dynamic OVP) is triggered and the output gate
drive circuit will be shutdown simultaneously thus to stop
the switching of the power MOSFET. This OVP condition
is maintained until the INV pin current falls below 7µA to
re-enable the internal starter and start switching again.
The output change that is able to trigger the dynamic
© 2012 Bruckewell Technology Corp., Ltd.
8
(18)
type protection. The INV pin also provides additional
function as a non-latched IC disable. A voltage below
0.2V shuts down the IC and reduces its consumption
below 1.7mA. To re-start the IC, the voltage on this pin
must exceed 0.45V. The main usage of this function is a
remote ON/OFF control input that can be driven by a
PWM controller for power management purposes.
However, it also offers a certain degree of additional
safety since it will cause the IC to shutdown in case
lower resistor of the output divider is shorted to ground
or if the upper resistor is missing or fails open.
Zero Current Detection
The zero current detection block switches on the
external MOSFET as the current through the boost
inductor has gone to zero using an auxiliary winding
coupled with the inductor. This feature allows transitionmode operation. If the voltage of the ZCD pin goes
higher than 1.4V, the ZCD comparator waits until the
voltage goes below 0.7V. If the voltage goes below
www.bruckewell-semi.com/
BW6562A High PFC LED Driver
OVP is calculate by
ΔVO (27 - 7)
R3
(19)
An important advantage of this technique is that the over
voltage level can be set independently from the regulated
output voltage; the latter depends on the ratio of R3 to
R4, the former on the individual value of R3. Another
advantage is the precision because the tolerance of the
detection current is about 12%, i.e. 12% tolerance on
ΔVO. Since ΔVO << VO, the tolerance on the absolute
value will be proportionally reduced.
When the loading of PFC pre-regulator becomes very
low, the output voltage tends to stay steadily above the
nominal value, which is not the case that OVP is triggered
by abrupt voltage increase. If this situation happens, the
error amplifier output will saturate low, hence, when this is
detected, the external power transistor is switched OFF,
and the IC is put in an idle state (Static OVP). Normal
operation is resumed as the error amplifier goes back into
its linear region. As a result, the device will work in burstmode, with a repetition rate that can be very low. When
either OVP is activated, the quiescent consumption of the
IC is reduced to minimum by the discharge of the VCC
capacitor and increase the hold-up capability of the IC
supply.
0.7V, the zero current detection turns on the MOSFET.
The ZCD pin is protected internally by two clamps, 5.7V
upper clamp and 0V lower clamp. The 190µs timer
generates a MOSFET turn on signal if the driver output
has been low for more than 190µs from the falling edge
of the driver output.
Current Sensing and Leading Edge Blanking
The typical current mode of PFC controller feedbacks
the current signals to close the control loop and achieve
regulation. The BW6562A detects the primary MOSFET
current from the CS pin; this is for the pulse-by-pulse
current limit. The maximum voltage threshold of the
current sensing pin is set at 1.08V. From above, the
MOSFET peak current can be obtained from below.
IPK
(20)
A 200ns leading edge blanking (LEB) time is included in
the input of CS pin to prevent the false-trigger from the
current spike. In the low power application, if the total
pulse width of the turn-on spikes is less than 200ns and
the negative spike on the CS pin doesn’t exceed -0.3V,
it could eliminated the RC filter.
However, the total pulse width of the turn-on spike is
decided by the output power, circuit design and PCB
The OVP function in the BW6562A is an auto-recovery
© 2012 Bruckewell Technology Corp., Ltd.
9
www.bruckewell-semi.com/
BW6562A High PFC LED Driver
layout. It is strongly recommended to adopt a smaller RC
filter for higher power application to avoid the CS pin
being damaged by the negative turn-on spike.
VCS K
Multiplier
The internal multiplier takes two inputs, one from a portion
of the instantaneous rectified line voltage (via pin 3 MULT)
and the other from the output of the E/A (via pin 2 COMP),
to feed the PWM comparator to determine the exact
instant when the MOSFET is to be switched off. The
output of multiplier would be rectified sinusoid as similar as
instantaneous rectified line voltage different only with
scaling factor determined by output of E/A. The output is
then fed into PWM comparator to compare with current
sense clamp voltage VCS (at 1.08V), to switch MOSFET
off.
Figure 1. Multiplier Characteristics
© 2012 Bruckewell Technology Corp., Ltd.
The formula governing all parameters is given by
multiplier output :
10
VMULT
(VCOMP – 2.5)
(21)
where K is the multiplier gain. System designer needs to
calculate R1 and R2, for different input mains
circumstances. Figure 1 and 2 explain multiplier
characteristics and VCS clamps vs. TJ respectively.
Output Drive Stage
An output stage of a push-pull buffer, with typical
+800mA/-600mA driving capability is incorporated to
drive a power MOSFET directly. The output voltage is
clamped at 12V to protect the MOSFET gate even when
the VCC voltage is higher than 12V.
Figure 2. VCS clamps vs. TJ
www.bruckewell-semi.com/
BW6562A High PFC LED Driver
Example Applications
Single Stage LED Driver with PFC
One of major applications of the BW6562A is to provide a
single stage power module with high PF for LED lighting.
The following circuit, Figure 4, shows a simplified fly-back
AC-DC converter with both constant current (CC) and
constant voltage (CV) feedback from output side, to
prevent overload and also provide an over-voltage
protection facility.
This solution uses an isolated feedback with an optocoupler and the SQ7103 (+2.5V voltage reference and
dual Op-Amps), each one for voltage and current
regulation respectively. As LED lighting application, the
BW6562A offers the following advantages that make this
solution an appropriate method against the traditionally
PWM controller, where a good PF value is required :
●The input capacitance can be reduced to replace bulky
and expensive high voltage electrolytic capacitor (as
required by regular offline SMPS) by a small size,
cheaper film capacitor
●Transition-mode ensures low turn-on losses in MOSFET
and higher efficiency can be achieved.
●Lower parts count means lower material cost as well as
lower assembly cost for limited space.
Few details information about this, please refer separate
Application Note for details.
High PF Battery Charger
The single stage PFC can also be adopted as battery
charger. Figure 5 presents an off-line universal mains
battery charger that can drive up to 30W.
This solution also uses an isolated feedback with an optocoupler and the BW7103. To use the BW6562A IC in a
lead-acid battery charger circuit with high PFC, the DC
output voltage and the maximum permissible DC output
charging current needs to be decided on the basis of the
specific battery to be charged. For the lead-acid batteries
of different nominal voltages, the fixed constant-voltage,
current limited, charging mode, the typical voltage level
suggested by most lead-acid battery manufactures are as
follows :
© 2012 Bruckewell Technology Corp., Ltd.
11
Nominal
6V
12 V
24 V
48 V
Suggested
Charging
Voltage
6.9 V
13.8 V
27.6 V
55.2 V
Battery
Discharged
5.25 V
10.50 V
21.00 V
42.00 V
The maximum lead-acid battery charging current is
decided by the battery amp-hour capacity, represented
as 'C'. The lead-acid battery manufacturers in general
prefer a low battery charging current set at “C/20” Amp
for slow-charging, for improved life of the battery.
However, in case of ‘fast-charging’ and if permitted by
the battery manufacturer, the maximum battery charging
current can be set at “C/10” Amp. A charge-depleted
battery will initially draw the maximum charging current.
As the battery gradually gets charged, the charging
current will gradually reduce.
The maximum “Current Limit” therefore helps avoid a
battery getting over-heated during charging and thus
avoid damage to the battery. It is advisable to avoid
deep discharge of the lead-acid battery, to increase the
usable battery life. The secondary side feedback
network for the required CV-CC characteristics will
therefore be tailored accordingly in the application
circuit. The advanced battery chargers take into account
the battery temperature while charging the battery and
include appropriate compensation for the same, which is
not in the scope of this document.
PFC Pre-Regulator
Major application of the BW6562A is to implement a
wide-range mains input PFC pre-regulator, which will be
acting the input stage for the cascaded isolation DC-DC
converter, and can deliver above 350W in general.
Typical application circuit diagram is showed on page 1.
There are two methods; in general, to design preregulator stage, one is with fixed frequency while the
other is with fixed on time.
The BW6562A can be implemented by fixed on time due
to its simplicity and less expensive, while the fixed
frequency technique is more complicated and beyond
the scope of this application note. In fixed on time mode,
the BW6562A is also working in transition mode where
the inductor current will be turn on when zero crossing is
detected. By using boost switching techniques, a PFC is
www.bruckewell-semi.com/
BW6562A High PFC LED Driver
shape the input current by drawing a quasi-sinusoidal
current to be in-phase with the line voltage. A simplified
circuit, shown in Figure 3, can explain the operation as
follows :
Figure 3. ZCD Pin Synchronization without Auxiliary
Winding
The output of the multiplier is fed into the non-inverting
pin of the internal PWM comparator. As the output from
multiplier, a sinusoidal reference for PWM, equals to the
voltage on the current sense CS pin (#4), the MOSFET
will be turned off. As a consequence, the peak inductor
current will be enveloped by a rectified sinusoid. After
the MOSFET is turned off, the boost inductor discharges
its stored energy to the load until zero current is
detected and turns on MOSFET again.
In case there is no auxiliary winding on the boost
inductor, a solution can be implemented by simply
connecting the ZCD pin to the drain of the power
MOSFET through an RC network as shown in Figure 3.
In this way the high-frequency edges experienced by the
drain will be transferred to the ZCD pin, hence arming
and triggering the ZCD comparator.
The AC mains voltage is rectified by a diode bridge and
delivered to the boost converter which boosts the rectified
input voltage to a higher regulated DC bus VO.
The error amplifier compares a portion of the output
voltage with an internal reference and generates a signal
error proportional to the difference between them. The
bandwidth of the internal error amplifier is set to be
narrow within 20kHz, the output would be a DC value
over a given half-cycle. Output of E/A fed into multiplier,
multiplied by portion of the rectified mains voltage, will
generate a scaled rectified sinusoid whose peak
amplitude depends on the rectified mains peak voltage as
well as the value of error signal.
© 2012 Bruckewell Technology Corp., Ltd.
12
Also in this case the resistance value must be properly
chosen to limit the current sourced/sunk by the ZCD pin.
In typical applications with output voltages around 400V,
recommended values for these components as 22pF (or
33pF) for CZCD and 330kΩ for RZCD. With these values
proper operation is ensured even with few volts
difference between the regulated output voltage and the
peak input voltage.
www.bruckewell-semi.com/
BW6562A High PFC LED Driver
Figure 4. Single-Stage PFC, Constant Voltage and Constant Current
Figure 5. High Power Factor Battery Charger
© 2012 Bruckewell Technology Corp., Ltd.
13
www.bruckewell-semi.com/
BW6562A High PFC LED Driver
Package Outline Dimensions
Package Type : SOP-8
Marking Information
SOP-8
BW6562A
XYYWWZ
X = A/T Site, YY = Year, WW = Working Week, Z = Device Version
© 2012 Bruckewell Technology Corp., Ltd.
14
www.bruckewell-semi.com/
BW6562A High PFC LED Driver
Legal Disclaimer Notice
Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Bruckewell Technology Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Bruckewell”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. Bruckewell makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. To the maximum extent permitted by applicable law, Bruckewell disclaims (i) Any and all liability arising out of the application or use of any product. (ii) Any and all liability, including without limitation special, consequential or incidental damages. (iii) Any and all implied warranties, including warranties of fitness for particular purpose, non-­‐
infringement and merchantability. Statements regarding the suitability of products for certain types of applications are based on Bruckewell’s knowledge of typical requirements that are often placed on Bruckewell products in generic applications. Such statements are not binding statements about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular product with the properties described in the product specification is suitable for use in a particular application. Parameters provided in datasheets and/or specifications may vary in different applications and performance may vary over time. Product specifications do not expand or otherwise modify Bruckewell’s terms and conditions of purchase, including but not limited to the warranty expressed therein. © 2012 Bruckewell Technology Corp., Ltd.
15
www.bruckewell-semi.com/