Cherry CS4172XDWFR16 Single air-core gauge driver Datasheet

CS4172
CS4172
Single Air-Core Gauge Driver
Features
Description
225¡, and 315¡ angles. This increased
torque reduces the error due to pointer
droop at these critical angles.
The CS4172 is a monolithic BiCMOS
integrated circuit used to translate a
digital 10-bit word from a microprocessor/microcontroller to complementary DC outputs. The DC outputs
drive an air-core meter commonly
used in vehicle instrument panels. The
10 bits of data are used to linearly control the quadrature coils of the meter
directly with a 0.35¡ resolution and
±1.0¡ accuracy over the full 360¡ range
of the gauge. The interface from the
microcontroller is by a Serial Peripheral Interface (SPI) compatible serial
connection using up to a 2MHz shift
clock rate.
Each output buffer is capable of supplying up to 80mA per coil and are
controlled by a common enable pin.
When OE is low the output buffers are
turned off but the logic portion of the
chip remains powered and continues
to operate normally.
The Serial Gauge Driver is self-protected against output short circuit conditions. The output drivers are disabled
anytime the on-chip protection circuitry detects a short circuit condition. The
outputs remain off until a falling edge
is presented on CS. If the short circuit
is still present the output drivers automatically disable themselves again. A
thermal protection circuit limits the
junction temperature to approximately
160¡C for conditions of high supply
voltage and high ambient temperature.
The digital code, which is directly proportional to the desired gauge pointer
deflection, is shifted into a DAC and
multiplexer. These two blocks provide
a tangential conversion function to
change the digital data into the appropriate DC coil voltage for the angle
demanded. The tangential algorithm
creates approximately 40% more
torque in the meter movement than
does a sin-cos algorithm at 45¡, 135¡,
The status pin (ST) reflects the state of
the outputs and is low whenever the
outputs are disabled.
Block Diagram
VBB
VCC
■ Serial Input Bus
■ 2 MHz Operating
Frequency
■ Tangential Drive
Algorithm
■ 80mA Drive Circuits
■ 0.5¡ Accuracy (Typ.)
■ Power-On-Reset
■ Protection Features
Output Short Circuit
Overtemperature
Package Options
16 Lead PDIP
SIN-
COS+
1
SIN+
COS-
Gnd
Gnd
VBB
Gnd
SO
NC
SI
ST
VCC
CS
OE
POR
SI
SCLK
CS
SIN+
Serial
to
Parallel
Shift
Register
SCLK
LOGIC
16 Lead SO Wide
VTOP
D0 Ð D6
7 Bit
DAC
VVAR
MUX
SIN
(internally fused leads)
Ð
SINCOS+
VBAT
SO
COS
D7 Ð D9
OC
R FAULT S
Latch S
Output
Amplifiers
POR
ST
Ð
COS+
1
SIN+
COS-
VBB
SO
Gnd
Gnd
Gnd
Gnd
SI
ST
VCC
CS
OE
SCLK
OE
Gnd
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: [email protected]
Web Site: www.cherry-semi.com
Rev. 4/19/99
1
A
¨
Company
CS4172
Absolute Maximum Ratings
Supply Voltage
VBB ....................................................................................................................................................................-1.0V to 15.0V
VCC ......................................................................................................................................................................-1.0V to 6.0V
Digital Inputs ..............................................................................................................................................................-1.0V to 6.0V
Ground Potential Difference (|AGnd-DGnd|)....................................................................................................................0.5V
Steady State Output Current ............................................................................................................................................±100mA
Forced Injection Current (Inputs and Supply).................................................................................................................±10mA
Operating Junction Temperature (TJ) ..................................................................................................................................150¡C
Storage Temperature Range .................................................................................................................................-65¡C to 150¡C
Lead Temperature Soldering
Wave Solder (through hole styles only) .....................................................................................10 sec. max, 260¡C peak
Reflow (SMD styles only) ......................................................................................60 sec. max above 183¡C, 230¡C peak
ESD Susceptibility (Human Body Model)..............................................................................................................................2kV
Electrical Characteristics: -40¡C ² TA ² 105¡C; 7.5V ² VBB ² 14V; 4.5V ² VCC ² 5.5V (unless otherwise specified)
PARAMETER
TEST CONDITIONS
MIN
■ Supply Voltages and Currents
VBB Quiescent Current
Output disabled (OE = 0V)
[RCOS, RSIN = RL(MIN)] @45¡
(code = XÕ080) VBB = 14V
VCC Quiescent Current
OE = high, VBB = 0V
SCLK = 2.0MHz
■ Digital Inputs and Outputs
Output High Voltage
Output Low Voltage
Output High Current
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
■ Analog Outputs
Output Function Accuracy
Output Shutdown Current,
Source
Output Shutdown Current,
Sink
Output Shutdown Current,
Source
Output Shutdown Current,
Sink
Coil Drive Output Voltage
Minimum Load Resistance
SO, IOH = 0.8mA
SO, IOL =0.8mA
ST, IOL = 2.5mA
ST, VCC = 5.0V
CS, SCLK, SI, OE
CS, SCLK, SI, OE
CS, SCLK, SI, OE; VIN = 0.7 ´ VCC
CS, SCLK, SI, OE; VIN = 0.3 ´ VCC
TYP
1
MAX
UNIT
5
175
mA
mA
1
mA
VCC - 0.8
0.3 ´ VCC
1
1
V
V
V
µA
V
V
µA
µA
0.4
0.8
25
0.7 ´ VCC
VBB = 14.0V
-1.2
70
+1.2
250
deg
mA
VBB = 14.0V
70
250
mA
VBB = 7.5V
43
250
mA
VBB = 7.5V
43
250
mA
0.748 ´ VBB
229
171
150
TA = 105¡C
TA = 25¡C
TA = -40¡C
2
V
½
½
½
PARAMETER
TEST CONDITIONS
Shift Clock Frequency
SCLK High Time
SCLK Low Time
SO Rise Time
SO Fall Time
SO Delay Time
SI Setup Time
SI Hold Time
CS Setup Time
CS Hold Time
MIN
TYP
MAX
2.0
175
175
0.75V to VCC - 1.2V; CL = 90pF
0.75V to VCC - 1.2V; CL = 90pF
CL = 90pF
150
150
150
75
75
0
75
UNIT
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
Package Pin Description
PACKAGE PIN#
PIN SYMBOL
FUNCTION
16 Lead SO Wide
1
2
3
4,5,12,13
6
16 Lead PDIP
1
2
4
3,13,14
6
SINSIN+
VBB
Gnd
SI
Negative output for SINE coil.
Positive output for SINE coil.
Analog supply. Nominally 13.5V.
Ground.
Serial data input. Data present at the rising edge of the
clock signal is shifted into the internal shift register.
7
7
VCC
8
8
OE
9
9
SCLK
10
10
CS
11
11
ST
14
5
SO
5V logic supply. The internal registers and latches are
reset by a POR generated by the rising edge of the voltage
on this pin.
Controls the state of the output buffers. A logic low on
this pin turns them off.
Serial clock for shifting in/out of data. Rising edge shifts
data on SI into the shift register and the falling edge
changes the data on SO.
When high allows data at SI to be shifted into part with
the rising edges of SCLK. The falling edge transfers the
shift register contents into the DAC and multiplexer to
update the output buffers. The falling edge also re-enables
the output drivers if they have been disabled by a fault.
STATUS reflects the state of the outputs and is low anytime the outputs are disabled, either by OE or the internal
protection circuitry. Requires external pull-up resistor.
Serial data output. Existing 10-bit data is shifted out when
new data is shifted in. Allows cascading of multiple
devices on common serial port.
15
15
COS-
16
12
COS+
16
Negative output for COSINE coil.
Positive output for COSINE coil.
No connection.
NC
3
CS4172
Electrical Characteristics: -40¡C ² TA ² 105¡C; 7.5V ² VBB ² 14V; 4.5V ² VCC ² 5.5V (unless otherwise specified)
CS4172
Applications Information
Quadrant II
Theory of Operation
q = 180¡ Ð Tan-1
The SACD is for interfacing between a microcontroller or
microprocessor and air-core meter movements commonly
used in automotive vehicles for speedometers and
tachometers. These movements are built using 2 coils
placed at a 90¡ orientation to each other. A magnetized
disc floats in the middle of the coils and responds to the
magnetic field generated by each coil. The disc has a shaft
attached to it that protrudes out of the assembly. A pointer indicator is attached to this shaft and in conjunction
with a separate printed scale displays the vehicleÕs speed
or the engineÕs speed.
For q = 135.176¡ to 179.824¡:
VSIN = Tan(180¡ Ð q) ´ 0.748 ´ VBB
VCOS = -0.748 ´ VBB
Quadrant III
q = 180¡ + Tan-1
90°
135°
180°
225°
270°
315°
[
]
VSIN+ Ð VSINVCOS+ Ð VCOS-
For q = 180.176¡ to 224.824¡:
VSIN = -Tan(q Ð 180¡) ´ 0.748 ´ VBB
VCOS = -0.748 ´ VBB
For q = 225.176¡ Ð 269.824¡:
VSIN = -0.748 ´ VBB
VCOS = -Tan(270¡ Ð q) ´ 0.748 ´ VBB
Degrees of Rotation
45°
]
VSIN+ Ð VSINVCOS+ Ð VCOS-
For q = 90.176¡ to 134.824¡:
VSIN = 0.748 ´ VBB
VCOS = -Tan(q Ð 90¡) ´ 0.748 ´ VBB
The disc (and pointer) respond to the vector sum of the
voltages applied to the coils. Ideally, this relationship folsine
lows a cosine equation. Since this is a transcendental and
non-linear function, devices of this type use an approximation for this relationship. The SACD uses a tangential
algorithm as shown in Figure 1. Only 1 output varies in
any 45 degree range.
0°
[
360°
Max (128)
SIN+
Output
Min (0)
Quadrant IV
Max (128)
SINÐ
Output
q = 360¡ Ð Tan-1
Min (0)
Max (128)
[
]
VSIN+ Ð VSINVCOS+ Ð VCOS-
For q = 270.176¡ to 314.824¡:
VSIN = -0.748 ´ VBB
VCOS = Tan(q Ð 270¡) ´ 0.748 ´ VBB
COS+
Output
Min (0)
Max (128)
COSÐ
Output
For q = 315.176¡ Ð 359.824¡:
VSIN = -Tan(360¡ Ð q) ´ 0.748 ´ VBB
VCOS = 0.748 ´ VBB
Min (0)
000
001
010
011
100
101
110
111
000
MUX bits (D9 Ð D7)
Figure 1. Major gauge outputs.
VCOS+
360/0°
Quadrant I
q = Tan-1
[
0.748VBB
VSIN+ Ð VSINVCOS+ Ð VCOS-
]
q
IV
For q = 0.176¡ to 44.824¡:
VSIN = Tanq ´ 0.748 ´ VBB
VCOS = 0.748 ´ VBB
I
270°
VSINÐ
0.748VBB
0.748VBB
II
III
For q = 45.176¡ to 89.824¡:
VSIN = 0.748 ´ VBB
VCOS = Tan(90¡ Ð q) ´ 0.748 ´ VBB
0.748VBB
180°
VCOS-
Graph 1. Major gauge response.
4
90°
VSIN+
register changes at SO on the falling edge of SCLK. This
arrangement allows the cascading of devices. SO is
always enabled. Data shifts through without affecting the
outputs until CS is brought low. At this time the internal
DAC is updated and the outputs change accordingly.
To drive the gaugeÕs pointer to a particular angle, the
microcontroller sends a 10-bit digital word into the serial
port. These 10 bits are divided as shown in Figure 2.
However, from a software programmers viewpoint, a
360¡ circle is divided into 1024 equal parts of .35¡ each.
Table 1 shows the data associated with the 45¡ divisions
of the 360¡ driver.
CS
CSHold
CSSetup
MSB
LSB
SCLK
Major
Gauge
(360°)
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
SI(Setup)
D9 Ð D7 select
which octant
Divides a 45° octant into 128 equal parts
to achieve a .35° resolution
Code 0 Ð 12710
SI(Hold)
SI
Figure 2. Definition of serial word.
SO(Rise, Fall)
10% - 90%
SO
VSIN
(V)
0.032
10.476
10.476
10.412
-0.032
-10.476
-10.476
-10.476
-0.032
VCOS
(V)
10.476
10.412
-0.032
-10.476
-10.476
-10.412
0.032
10.476
10.476
SO(tpd)
Figure 3. Serial data timing diagram.
VCC
CS
SI
Table 1. Nominal output for major gauge (VBB = 14V).
OE
The 10 bits are shifted into the deviceÕs shift register MSB
first using an SPI compatible scheme. This method is
shown in Figure 3. The CS must be high and remain high
for SCLK to be enabled. Data on SI is shifted in on the rising edge of the synchronous clock signal. Data in the shift
ST
10 Bits
10 Bits
REGISTERS
SET TO ZERO
Nominal
Degrees
0.176
45.176
90.176
135.176
180.176
225.176
270.176
315.176
359.826
REGISTERS
SET TO ZERO
Input Code
Ideal
(Decimal) Degrees
0
0
128
45
256
90
384
135
512
180
640
225
768
270
896
315
1023
359.65
OUTPUTS
ENABLED
Figure 4. Power-up sequence.
Application Diagram
VBAT
VREG
CS-8156
5V
12V
ENABLE
360° Gauge
10k
Microcontroller
SINSIN+
ST
CS
SI
SCLK
COS+
COSVBB
VCC
CS4172
SO
Next Driver
OE
5
OUTPUTS
ENABLED
CS4172
Applications Information: continued
CS4172
Package Specification
PACKAGE THERMAL DATA
PACKAGE DIMENSIONS IN mm (INCHES)
D
Lead Count
Metric
Max
Min
19.69
18.67
10.50
10.10
16 Lead PDIP
16 Lead SO Wide*
English
Max Min
.775 .735
.413 .398
Thermal
Data
RQJC typ
16 Lead
PDIP
42
16 Lead
SO Wide*
18
ûC/W
RQJA typ
80
75
ûC/W
Plastic DIP (N); 300 mil wide
7.11 (.280)
6.10 (.240)
8.26 (.325)
7.62 (.300)
1.77 (.070)
1.14 (.045)
2.54 (.100) BSC
3.68 (.145)
2.92 (.115)
.356 (.014)
.203 (.008)
0.39 (.015)
MIN.
.558 (.022)
.356 (.014)
REF: JEDEC MS-001
Some 8 and 16 lead
packages may have
1/2 lead at the end
of the package.
All specs are the same.
D
Surface Mount Wide Body (DW); 300 mil wide
7.60 (.299)
7.40 (.291)
10.65 (.419)
10.00 (.394)
0.51 (.020)
0.33 (.013)
1.27 (.050) BSC
2.49 (.098)
2.24 (.088)
1.27 (.050)
0.40 (.016)
2.65 (.104)
2.35 (.093)
0.32 (.013)
0.23 (.009)
D
REF: JEDEC MS-013
0.30 (.012)
0.10 (.004)
Ordering Information
Part Number
CS4172XN16
CS4172XDWF16
CS4172XDWFR16
Description
16 Lead PDIP
16 Lead SO Wide*
16 Lead SO Wide* (tape & reel)
Cherry Semiconductor Corporation reserves the right to
make changes to the specifications without notice. Please
contact Cherry Semiconductor Corporation for the latest
available information.
*Internally Fused Leads
Rev. 4/19/99
6
© 1999 Cherry Semiconductor Corporation
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