Cypress CY7C10211B-10ZC 1-mbit (64k x 16) static ram Datasheet

CY7C1021B
CY7C10211B
1-Mbit (64K x 16) Static RAM
Features
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O1 through I/O8), is
written into the location specified on the address pins (A0
through A15). If Byte High Enable (BHE) is LOW, then data
from I/O pins (I/O9 through I/O16) is written into the location
specified on the address pins (A0 through A15).
• Temperature Ranges
— Commercial: 0°C to 70°C
— Industrial: –40°C to 85°C
— Automotive: –40°C to 125°C
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing the
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O1 to I/O8. If Byte High Enable (BHE) is
LOW, then data from memory will appear on I/O9 to I/O16. See
the truth table at the back of this data sheet for a complete
description of read and write modes.
• High speed
— tAA = 10 ns (Commercial & Industrial)
— tAA = 15 ns (Automotive)
• CMOS for optimum speed/power
• Low active power
— 825 mW (max.)
• Automatic power-down when deselected
• Independent control of upper and lower bits
• Available in 44-pin TSOP II and 400-mil SOJ
• Also available in Lead (Pb)-Free 44-pin TSOP II
Functional Description[1]
The CY7C1021B/10211B is a high-performance CMOS static
RAM organized as 65,536 words by 16 bits. This device has
an automatic power-down feature that significantly reduces
power consumption when deselected.
The input/output pins (I/O1 through I/O16) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), the BHE and BLE
are disabled (BHE, BLE HIGH), or during a write operation (CE
LOW, and WE LOW).
The CY7C1021B/10211B is available in standard 44-pin
TSOP Type II and 400-mil-wide SOJ packages. Customers
should use part number CY7C10211B when ordering parts
with 10-ns tAA, and CY7C1021B when ordering 12- and 15-ns
tAA.
Logic Block Diagram
64K x 16
RAM Array
512 X 2048
SENSE AMPS
A7
A6
A5
A4
A3
A2
A1
A0
ROW DECODER
DATA IN DRIVERS
I/O1–I/O8
I/O9–I/O16
COLUMN DECODER
A8
A9
A10
A11
A12
A13
A14
A15
BHE
WE
CE
OE
BLE
Note:
1. For best-practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
Cypress Semiconductor Corporation
Document #: 38-05145 Rev. *A
•
3901 North First Street
•
San Jose, CA 95134
•
408-943-2600
Revised June 20, 2004
CY7C1021B
CY7C10211B
Selection Guide
7C10211B-10
7C1021B-12
7C1021B-15
10
12
15
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum CMOS Standby Current (mA)
Com’l / Ind’l
150
140
130
Automotive
-
-
150
Com’l / Ind’l
10
10
10
Automotive
-
-
15
0.5
0.5
0.5
L Version
Pin Configurations
SOJ / TSOP II
Top View
A4
A3
A2
A1
A0
CE
I/O1
I/O2
I/O3
I/O4
VCC
VSS
I/O5
I/O6
I/O7
I/O8
WE
A15
A14
A13
A12
NC
1
44
2
3
43
42
4
41
40
39
38
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
BHE
BLE
I/O16
I/O15
I/O14
I/O13
VSS
VCC
I/O12
I/O11
I/O10
I/O9
NC
A8
A9
A10
A11
NC
Pin Definitions
Pin Name
SOJ, TSOP–Pin Number
I/O Type
A0–A15
1–5,18–21, 24–27, 42–44
Input
I/O1–I/O16
7–10, 13–16, 29–32,
35–38
NC
22, 23, 28
WE
17
Input/Control Write Enable Input, active LOW. When selected LOW, a Write is
conducted. When deselected HIGH, a Read is conducted.
CE
6
Input/Control Chip Enable Input, active LOW. When LOW, selects the chip. When
HIGH, deselects the chip.
BHE, BLE
39, 40
Input/Control Byte Write Select Inputs, active LOW. BLE controls I/O8–I/O1, BHE
controls I/O16–I/O9.
OE
41
Input/Control Output Enable, active LOW. Controls the direction of the I/O pins.
When LOW, the I/O pins are allowed to behave as outputs. When
deasserted HIGH, I/O pins are three-stated, and act as input data
pins.
VSS
12, 34
VCC
11, 33
Document #: 38-05145 Rev. *A
Description
Address Inputs used to select one of the address locations.
Input/Output Bidirectional Data I/O lines. Used as input or output lines depending
on operation.
No Connect
Ground
No Connects. Not connected to the die.
Ground for the device. Should be connected to ground of the
system.
Power Supply Power Supply inputs to the device.
Page 2 of 10
CY7C1021B
CY7C10211B
Maximum Ratings
Static Discharge Voltage............................................ >2001V
(per MIL-STD-883, Method 3015)
(Above which the useful life may be impaired. For user guidelines,
not tested.)
Storage Temperature ................................. –65°C to +150°C
Latch-Up Current ..................................................... >200 mA
Operating Range
Ambient Temperature with
Power Applied............................................. –55°C to +125°C
[2]
Supply Voltage on VCC to Relative GND
.... –0.5V to +7.0V
DC Voltage Applied to Outputs
in High Z State[2] ......................................–0.5V to VCC+0.5V
DC Input Voltage[2] ...................................–0.5V to VCC+0.5V
Ambient
Temperature (TA)[3]
VCC
0°C to +70°C
5V ± 10%
Industrial
–40°C to +85°C
5V ± 10%
Automotive
–40°C to +125°C
5V ± 10%
Range
Commercial
Current into Outputs (LOW) .........................................20 mA
Electrical Characteristics Over the Operating Range
Parameter
Description
Test
Conditions
7C10211B-10 7C1021B-12
7C1021B-15
Min.
Min.
Max.
Max.
VOH
Output HIGH
Voltage
VCC = Min., IOH = –4.0 mA
VOL
Output LOW
Voltage
VCC = Min., IOL = 8.0 mA
VIH
Input HIGH
Voltage
2.2
6.0
2.2
6.0
VIL
Input LOW
Voltage[2]
−0.5
0.8
–0.5
IIX
Input Load
Current
GND < VI < VCC
Com’l / Ind’l
−1
+1
Automotive
-
Output Leakage
Current
GND < VI < VCC,
Output Disabled
Com’l / Ind’l
Automotive
IOS
Output Short
Circuit Current[4]
VCC = Max., VOUT = GND
−300
ICC
VCC Operating
Supply Current
VCC = Max., IOUT = 0
mA, f = fMAX = 1/tRC
Com’l / Ind’l
Automotive
Automatic CE
Power-Down
Current—TTL
Inputs
IOZ
ISB1
ISB2
2.4
Min.
2.4
0.4
Max. Unit
2.4
0.4
V
0.4
V
2.2
6.0
V
0.8
–0.5
0.8
V
–1
+1
–1
+1
µA
-
-
-
-4
+4
µA
−1
+1
–1
+1
–1
+1
µA
-
-
-
-
-4
+4
µA
–300
–300
mA
150
140
130
mA
-
-
150
mA
Max. VCC, CE > VIH
Com’l / Ind’l
VIN > VIH or VIN < VIL, f
Automotive
= fMAX
40
40
40
mA
-
-
50
mA
Automatic CE
Max. VCC, CE > VCC – Com’l / Ind’l
Power-Down
0.3V, VIN > VCC – 0.3V,
Automotive
Current—CMOS or VIN < 0.3V, f = 0
Inputs
L Version
10
10
10
mA
-
-
15
mA
0.5
0.5
0.5
mA
Thermal Resistance[5]
Parameter
ΘJA
ΘJC
Description
Test Conditions
Thermal Resistance Test conditions follow standard test methods and
(Junction to Ambient) procedures for measuring thermal impedance,
Thermal Resistance per EIA / JESD51.
(Junction to Case)
44-lead SOJ
44-lead
TSOP-II
Unit
64.32
76.89
°C/W
31.03
14.28
°C/W
Notes:
2. VIL (min.) = –2.0V and VIH(max) = VCC + 0.5V for pulse durations of less than 20 ns.
3. TA is the “Instant On” case temperature.
4. Not more than one output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds.
5. Tested initially and after any design or process changes that may affect these parameters.
Document #: 38-05145 Rev. *A
Page 3 of 10
CY7C1021B
CY7C10211B
Capacitance[5]
Parameter
Description
CIN
Input Capacitance
COUT
Output Capacitance
Test Conditions
TA = 25°C, f = 1 MHz,
VCC = 5.0V
Max.
Unit
8
pF
8
pF
AC Test Loads and Waveforms
R 481 Ω
5V
R 481 Ω
5V
OUTPUT
ALL INPUT PULSES
3.0V
90%
OUTPUT
R2
255 Ω
30 pF
INCLUDING
JIG AND
SCOPE
(a)
Equivalent to:
R2
255 Ω
5 pF
INCLUDING
JIG AND
SCOPE
(b)
OUTPUT
THÉVENIN
EQUIVALENT
167
90%
10%
10%
GND
Rise Time: 1 V/ns
Fall Time:1 V/ns
1.73V
30 pF
Switching Characteristics[6] Over the Operating Range
7C10211B-10
Parameter
Description
Min.
Max.
7C1021B-12
Min.
Max.
7C1021B-15
Min.
Max.
Unit
Read Cycle
tRC
Read Cycle Time
tAA
Address to Data Valid
tOHA
Data Hold from Address Change
tACE
CE LOW to Data Valid
tDOE
OE LOW to Data Valid
tLZOE
OE LOW to Low Z[7]
tHZOE
OE HIGH to High
10
10
3
15
12
3
10
15
6
0
5
ns
3
12
5
0
Z[7, 8]
Z[7]
12
ns
15
ns
7
ns
0
6
ns
ns
7
ns
7
ns
tLZCE
CE LOW to Low
tHZCE
CE HIGH to High Z[7, 8]
tPU
CE LOW to Power-Up
tPD
CE HIGH to Power-Down
10
12
15
ns
tDBE
Byte Enable to Data Valid
5
6
7
ns
tLZBE
Byte Enable to Low Z
tHZBE
Write
3
3
5
0
0
0
Byte Disable to High Z
3
6
0
0
5
ns
ns
0
6
ns
7
ns
Cycle[9]
tWC
Write Cycle Time
10
12
15
ns
tSCE
CE LOW to Write End
8
9
10
ns
tAW
Address Set-Up to Write End
7
8
10
ns
tHA
Address Hold from Write End
0
0
0
ns
tSA
Address Set-Up to Write Start
0
0
0
ns
tSD
Data Set-Up to Write End
5
6
8
ns
tHD
Data Hold from Write End
0
0
0
ns
Notes:
6. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
IOL/IOH and 30-pF load capacitance.
7. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device.
8. tHZOE, tHZBE, tHZCE, and tHZWE are specified with a load capacitance of 5 pF as in part (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage.
9. The internal write time of the memory is defined by the overlap of CE LOW, WE LOW and BHE / BLE LOW. CE, WE and BHE / BLE must be LOW to initiate a write,
and the transition of these signals can terminate the write. The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the write.
Document #: 38-05145 Rev. *A
Page 4 of 10
CY7C1021B
CY7C10211B
Switching Characteristics[6] Over the Operating Range (continued)
7C10211B-10
Parameter
Description
Min.
[7]
3
tLZWE
WE HIGH to Low Z
tHZWE
WE LOW to High Z[7, 8]
tBW
Byte Enable to End of Write
7C1021B-12
Max.
Min.
Max.
3
5
7
7C1021B-15
Min.
Max.
Unit
7
ns
3
ns
6
8
9
ns
Switching Waveforms
Read Cycle No. 1 [10, 11]
tRC
ADDRESS
tOHA
DATA OUT
tAA
PREVIOUS DATA VALID
DATA VALID
Read Cycle No. 2 (OE Controlled) [11, 12]
ADDRESS
tRC
CE
tACE
OE
tHZOE
tDOE
BHE, BLE
tLZOE
tHZCE
tDBE
tLZBE
DATA OUT
HIGH IMPEDANCE
tLZCE
VCC
SUPPLY
CURRENT
tHZBE
DATA VALID
HIGH
IMPEDANCE
tPD
tPU
50%
50%
IICC
CC
IISB
SB
Notes:
10. Device is continuously selected. OE, CE, BHE and/or BHE = VIL.
11. WE is HIGH for read cycle.
Document #: 38-05145 Rev. *A
Page 5 of 10
CY7C1021B
CY7C10211B
Switching Waveforms (continued)
Write Cycle No. 1 (CE Controlled) [13, 14]
tWC
ADDRESS
CE
tSA
tSCE
tAW
tHA
tPWE
WE
t BW
BHE, BLE
tSD
tHD
DATA I/O
Write Cycle No. 2 (BLE or BHE Controlled)
tWC
ADDRESS
BHE, BLE
tSA
tBW
tAW
tHA
tPWE
WE
tSCE
CE
tSD
tHD
DATA I/O
Notes:
12. Address valid prior to or coincident with CE transition LOW.
13. Data I/O is high impedance if OE or BHE and/or BLE= VIH.
14. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state.
Document #: 38-05145 Rev. *A
Page 6 of 10
CY7C1021B
CY7C10211B
Switching Waveforms (continued)
Write Cycle No. 3 (WE Controlled, LOW)
tWC
ADDRESS
tSCE
CE
tAW
tHA
tSA
tPWE
WE
tBW
BHE, BLE
tHZWE
tSD
tHD
DATA I/O
tLZWE
Truth Table
CE
OE
H
X
X
X
X
High Z
High Z
Power-Down
Standby (ISB)
L
L
H
L
L
Data Out
Data Out
Read - All bits
Active (ICC)
L
H
Data Out
High Z
Read - Lower bits only
Active (ICC)
H
L
High Z
Data Out
Read - Upper bits only
Active (ICC)
L
L
Data In
Data In
Write - All bits
Active (ICC)
L
H
Data In
High Z
Write - Lower bits only
Active (ICC)
H
L
High Z
Data In
Write - Upper bits only
Active (ICC)
L
X
WE
L
BLE
BHE
I/O1–I/O8
I/O9–I/O16
Mode
Power
L
H
H
X
X
High Z
High Z
Selected, Outputs Disabled
Active (ICC)
L
X
X
H
H
High Z
High Z
Selected, Outputs Disabled
Active (ICC)
Ordering Information
Speed
(ns)
10
12
Ordering Code
Package
Name
Package Type
Operating
Range
CY7C10211B-10VC
V34
44-Lead (400-Mil) Molded SOJ
Commercial
CY7C10211B-10ZC
Z44
44-Lead TSOP Type II
Commercial
CY7C10211BL-10ZC
Z44
44-Lead TSOP Type II
Commercial
CY7C1021B-12VC
V34
44-Lead (400-Mil) Molded SOJ
Commercial
CY7C1021B-12VI
V34
44-Lead (400-Mil) Molded SOJ
Industrial
CY7C1021BL-12VC
V34
44-Lead (400-Mil) Molded SOJ
Commercial
CY7C1021B-12ZC
Z44
44-Lead TSOP Type II
Commercial
CY7C1021B-12ZI
Z44
44-Lead TSOP Type II
Industrial
CY7C1021BL-12ZC
Z44
44-Lead TSOP Type II
Commercial
Document #: 38-05145 Rev. *A
Page 7 of 10
CY7C1021B
CY7C10211B
Ordering Information (continued)
Speed
(ns)
15
Package
Name
Ordering Code
Operating
Range
Package Type
CY7C1021B-15VC
V34
44-pin (400-Mil) Molded SOJ
Commercial
CY7C1021B-15VI
V34
44-pin (400-Mil) Molded SOJ
Industrial
CY7C1021BL-15VC
V34
44-pin (400-Mil) Molded SOJ
Commercial
CY7C1021B-15VE
V34
44-pin (400-Mil) Molded SOJ
Automotive
CY7C1021B-15ZC
Z44
44-pin TSOP Type II
Commercial
CY7C1021B-15ZXC
Z44
Lead (Pb)-Free, 44-pin TSOP Type II
Commercial
CY7C1021B-15ZI
Z44
44-pin TSOP Type II
Industrial
CY7C1021BL-15ZC
Z44
44-pin TSOP Type II
Commercial
CY7C1021B-15ZE
Z44
44-pin TSOP Type II
Automotive
Package Diagrams
44-Lead (400-Mil) Molded SOJ V34
44
23
DIMENSIONS IN INCHES MIN.
MAX.
0.395
0.405
0.435
0.445
22
1
SEATING PLANE
1.120
1.130
0.095
0.115
0.045
MAX.
0.128
0.148
0.023
0.033
0.013
0.023
Document #: 38-05145 Rev. *A
0.050
TYP.
0.082
MIN.
0.004
0.025
MIN.
0°-10°
0.365
0.375
0.007
0.013
51-85082-*B
Page 8 of 10
CY7C1021B
CY7C10211B
Package Diagrams (continued)
44-Pin TSOP II Z44
51-85087-*A
All products and company names mentioned in this document may be the trademarks of their respective holders.
Document #: 38-05145 Rev. *A
Page 9 of 10
© Cypress Semiconductor Corporation, 2004. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be
used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its
products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
CY7C1021B
CY7C10211B
Document History Page
Document Title: CY7C1021B/CY7C10211B 64K x 16 Static RAM
Document Number: 38-05145
REV.
ECN NO. Issue Date
Orig. of
Change
Description of Change
**
109889
09/22/01
SZV
Change from Spec number: 38-00951 to 38-05145
*A
238454
See ECN
RKF
1) Added Automotive Specs to Data Sheet
2) Added Pb-Free device offering in the Ordering Information
Document #: 38-05145 Rev. *A
Page 10 of 10
Similar pages