Central CP314 Small signal transistor npn - high current transistor chip Datasheet

PROCESS
CP314
Central
Small Signal Transistor
TM
Semiconductor Corp.
NPN - High Current Transistor Chip
PROCESS DETAILS
Process
EPITAXIAL PLANAR
Die Size
40 x 40 MILS
Die Thickness
9.0 MILS
Base Bonding Pad Area
7.9 x 8.7 MILS
Emitter Bonding Pad Area
9.0 x 14 MILS
Top Side Metalization
Al - 30,000Å
Back Side Metalization
Au - 18,000Å
GEOMETRY
GROSS DIE PER 4 INCH WAFER
7,070
PRINCIPAL DEVICE TYPES
CBCP68
CBCX68
CZT651
MPS650
MPS651
BACKSIDE COLLECTOR
145 Adams Avenue
Hauppauge, NY 11788 USA
Tel: (631) 435-1110
Fax: (631) 435-1824
www.centralsemi.com
R2 (1-August 2002)
Central
TM
Semiconductor Corp.
145 Adams Avenue
Hauppauge, NY 11788 USA
Tel: (631) 435-1110
Fax: (631) 435-1824
www.centralsemi.com
PROCESS
CP314
Typical Electrical Characteristics
R2 (1-August 2002)
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