1CY74FCT162240T Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered. CY74FCT16240T CY74FCT162240T 16-Bit Buffers/Line Drivers SCCS027B - August 1994 - Revised September 2001 Features Functional Description • Ioff supports partial-power-down mode operation • Edge-rate control circuitry for significantly improved noise characteristics • Typical output skew < 250 ps • ESD > 2000V • TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages • Industrial temperature range of –40˚C to +85˚C • VCC = 5V ± 10% CY74FCT16240T Features: • 64 mA sink current, 32 mA source current • Typical VOLP (ground bounce) <1.0V at VCC = 5V, TA = 25˚C These 16-bit buffer/line drivers are used in memory driver, clock driver, or other bus interface applications, where high speed and low power are required. With flow-through pinout and small shrink packaging, board layout is simplified. The three-state controls are designed to allow 4-, 8-, or 16-bit operation. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The CY74FCT16240T is ideally suited for driving high-capacitance loads and low-impedance backplanes. The CY74FCT162240T has 24-mA balanced output drivers with current limiting resistors in the outputs. This reduces the need for external terminating resistors and provides for minimal undershoot and reduced ground bounce. The CY74FCT162240T is ideal for driving transmission lines. CY74FCT162240T Features: • Balanced output drivers: 24 mA • Reduced system switching noise • Typical VOLP (ground bounce) <0.6V at VCC = 5V, TA= 25˚C Logic Block Diagrams Pin Configuration 1OE 3OE 1A1 3A1 1A2 1A3 1A4 1Y1 1Y2 1Y3 1Y4 3A2 3A3 3A4 2OE 4OE 2A1 4A1 2A2 2A3 2A4 2Y2 2Y3 2Y4 FCT16240–2 3Y1 3Y2 3Y3 3Y4 FCT16240–3 FCT16240–1 2Y1 SSOP/TSSOP Top View 4A2 4A3 4A4 4Y1 4Y2 4Y3 4Y4 FCT16240–4 1OE 1 48 1Y1 2 47 1A1 1Y2 3 46 1A2 GND 4 45 GND 1Y3 5 44 1A3 1Y4 6 43 1A4 VCC 7 42 VCC 2Y1 8 41 2A1 2Y2 9 40 2A2 GND 10 39 GND 2Y3 11 38 2A3 2Y4 37 2A4 3Y1 12 13 36 3A1 3Y2 14 35 3A2 GND 15 34 GND 3Y3 16 33 3A3 3Y4 17 32 3A4 VCC 18 31 VCC 4Y1 19 30 4A1 4Y2 20 29 4A2 GND 21 28 GND 4Y3 22 27 4A3 4Y4 23 26 4A4 4OE 24 25 3OE 2OE FCT16240–5 Copyright © 2001, Texas Instruments Incorporated CY74FCT16240T CY74FCT162240T Maximum Ratings[2, 3] Pin Summary Name (Above which the useful life may be impaired. For user guidelines, not tested.) Description OE Three-State Output Enable Inputs (Active LOW) A Data Inputs Y Three-State Outputs Storage Temperature ......................Com’l . –55°C to +125°C Ambient Temperature with Power Applied..................................Com’l . –55°C to +125°C DC Input Voltage ........................................... –0.5V to +7.0V Function Table[1] DC Output Voltage......................................... –0.5V to +7.0V Inputs Outputs OE A Y DC Output Current (Maximum Sink Current/Pin) ........................–60 to +120 mA L L H Power Dissipation .......................................................... 1.0W L H L H X Z Static Discharge Voltage (per MIL-STD-883, Method 3015) .............................>2001V Operating Range Range Industrial Ambient Temperature VCC –40°C to +85°C 5V ± 10% Electrical Characteristics Over the Operating Range Parameter Description Test Conditions Min. Typ.[4] Max. VIH Input HIGH Voltage VIL Input LOW Voltage VH Input Hysteresis[5] VIK Input Clamp Diode Voltage VCC = Min., IIN= –18 mA –1.2 V IIH Input HIGH Current VCC = Max., VI = VCC ±1 µA IIH Input HIGH Current VCC = Max., VI = VCC ±1 µA IIL Input LOW Current VCC = Max., VI = GND ±1 µA IIL Input LOW Current VCC = Max., VI = GND ±1 µA IOZH High Impedance Output Current (Three-State Output pins) VCC = Max., VOUT = 2.7V ±1 µA IOZL High Impedance Output Current (Three-State Output pins) VCC = Max., VOUT = 0.5V ±1 µA IOS Short Circuit Current[6] VCC = Max., VOUT = GND –80 –200 mA IO Output Drive Current[6] VCC = Max., VOUT = 2.5V –50 –180 mA Power-Off Disable VCC = 0V, VOUT ≤ ±1 µA Max. Unit IOFF 2.0 Unit V 0.8 100 –0.7 –140 4.5V[7] V mV Output Drive Characteristics for CY74FCT16240T Parameter VOH VOL Description Output HIGH Voltage Output LOW Voltage Min. Typ.[4] VCC = Min., IOH= –3 mA 2.5 3.5 V VCC = Min., IOH= –15 mA 2.4 3.5 V VCC = Min., IOH= –32 mA 2.0 3.0 V Test Conditions VCC = Min., IOL= 64 mA 0.2 0.55 V Notes: 1. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care. Z = High Impedance. 2. Operation beyond the limits set forth may impair the useful life of the device. Unless noted, these limits are over the operating free-air temperature range. 3. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground. 4. Typical values are at VCC=5.0V, TA= +25˚C ambient. 5. This parameter is specified but not tested. 6. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last. 7. Tested at +25˚C. 2 CY74FCT16240T CY74FCT162240T Output Drive Characteristics for CY74FCT162240T Parameter Description [6] Test Conditions Min. Typ.[4] Max. Unit IODL Output LOW Current VCC = 5V, VIN = VIH or VIL,VOUT = 1.5V 60 115 150 mA IODH Output HIGH Current[6] VCC = 5V, VIN = VIH or VIL, VOUT = 1.5V –60 –115 –150 mA VOH Output HIGH Voltage VCC = Min., IOH = –24 mA 2.4 3.3 VOL Output LOW Voltage VCC = Min., IOL = 24 mA V 0.3 0.55 V Typ.[4] Capacitance[5] (TA = +25˚C, f = 1.0 MHz) Parameter Description Test Conditions Max. Unit CIN Input Capacitance VIN = 0V 4.5 6.0 pF COUT Output Capacitance VOUT = 0V 5.5 8.0 pF Power Supply Characteristics Parameter Description Test Conditions Typ.[4] Max. Unit 5 500 µA ICC Quiescent Power Supply Current VCC=Max. VIN≤0.2V, VIN≥VCC–0.2V ∆ICC Quiescent Power Supply Current (TTL inputs HIGH) VCC=Max. VIN=3.4V[8] 0.5 1.5 mA ICCD Dynamic Power Supply Current[9] VCC=Max., One Input Toggling, 50% Duty Cycle, Outputs Open, OE=GND VIN=VCC or VIN=GND 60 100 µA/MHz IC Total Power Supply Current[10] VCC=Max., f1=10 MHz, 50% Duty Cycle, Outputs Open, One Bit Toggling, OE=GND VIN=VCC or VIN=GND 0.6 1.5 mA VIN=3.4V or VIN=GND 0.9 2.3 mA VIN=VCC or VIN=GND 2.4 4.5[11] mA VIN=3.4V or VIN=GND 6.4 16.5[11] mA VCC=Max., f1=2.5 MHz, 50% Duty Cycle, Outputs Open, Sixteen Bits Toggling, OE=GND Notes: 8. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND. 9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations. 10. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC+∆ICCDHNT+ICCD(f0/2 + f1N1) ICC = Quiescent Current with CMOS input levels ∆ICC = Power Supply Current for a TTL HIGH input (VIN=3.4V) DH = Duty Cycle for TTL inputs HIGH NT = Number of TTL inputs at DH ICCD = Dynamic Current caused by an input transition pair (HLH or LHL) f0 = Clock frequency for registered devices, otherwise zero f1 = Input signal frequency N1 = Number of inputs changing at f1 All currents are in milliamps and all frequencies are in megahertz. 11. Values for these conditions are examples of the ICC formula. These limits are specified but not tested. 3 CY74FCT16240T CY74FCT162240T Switching Characteristics Over the Operating Range[12] CY74FCT16240AT Parameter Description CY74FCT162240CT Min. Max. Min. Max. Unit Fig. No.[13] tPLH tPHL Propagation Delay Data to Output 1.5 4.8 1.5 4.3 ns 1, 2 tPZH tPZL Output Enable Time 1.5 6.2 1.5 5.8 ns 1, 7, 8 tPHZ tPLZ Output Disable Time 1.5 5.6 1.5 5.2 ns 1, 7, 8 tSK(O) Output Skew[14] 0.5 ns — 0.5 Note: 12. Minimum limits are specified but not tested on Propagation Delays. 13. See “Parameter Measurement Information” in the General Information section. 14. Skew between any two outputs of the same package switching in the same direction. This parameter is ensured by design. Ordering Information CY74FCT16240 Speed (ns) 4.8 Ordering Code CY74FCT16240ATPVC/PVCT Package Name O48 Package Type 48-Lead (300-Mil) SSOP Operating Range Industrial Ordering Information CY74FCT162240 Speed (ns) 4.3 Ordering Code Package Name Package Type 74FCT162240CTPACT Z48 48-Lead (240-Mil) TSSOP CY74FCT162240CTPVC O48 48-Lead (300-Mil) SSOP 74FCT162240CTPVCT O48 48-Lead (300-Mil) SSOP Document #: 38-00395-C 4 Operating Range Industrial CY74FCT16240T CY74FCT162240T Package Diagrams 48-Lead Shrunk Small Outline Package O48 5 CY74FCT16240T CY74FCT162240T Package Diagrams 48-Lead Thin Shrunk Small Outline Package 6 PACKAGE OPTION ADDENDUM www.ti.com 24-Apr-2015 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) 74FCT162240ATPACT ACTIVE TSSOP DGG 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT162240A 74FCT162240CTPACT ACTIVE TSSOP DGG 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT162240C 74FCT162240CTPVCT ACTIVE SSOP DL 48 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT162240C 74FCT162240ETPACT OBSOLETE TSSOP DGG 48 TBD Call TI Call TI -40 to 85 74FCT162240ETPVCT OBSOLETE SSOP DL 48 TBD Call TI Call TI -40 to 85 74FCT16240ATPVCG4 ACTIVE SSOP DL 48 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT16240A 74FCT16240ATPVCTG4 ACTIVE SSOP DL 48 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT16240A CY74FCT162240CTPVC ACTIVE SSOP DL 48 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT162240C CY74FCT162240ETPAC OBSOLETE TSSOP DGG 48 TBD Call TI Call TI -40 to 85 CY74FCT162240ETPVC OBSOLETE SSOP DL 48 TBD Call TI Call TI -40 to 85 CY74FCT16240ATPACT ACTIVE TSSOP DGG 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT16240A CY74FCT16240ATPVC ACTIVE SSOP DL 48 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT16240A CY74FCT16240ATPVCT ACTIVE SSOP DL 48 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT16240A CY74FCT16240ETPVC OBSOLETE SSOP DL 48 TBD Call TI Call TI -40 to 85 CY74FCT16240ETPVCT OBSOLETE SSOP DL 48 TBD Call TI Call TI -40 to 85 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 24-Apr-2015 Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 8.6 15.8 1.8 12.0 24.0 Q1 74FCT162240ATPACT TSSOP DGG 48 2000 330.0 24.4 74FCT162240CTPACT TSSOP DGG 48 2000 330.0 24.4 8.6 15.8 1.8 12.0 24.0 Q1 74FCT162240CTPVCT SSOP DL 48 1000 330.0 32.4 11.35 16.2 3.1 16.0 32.0 Q1 CY74FCT16240ATPACT TSSOP DGG 48 2000 330.0 24.4 8.6 15.8 1.8 12.0 24.0 Q1 CY74FCT16240ATPVCT SSOP DL 48 1000 330.0 32.4 11.35 16.2 3.1 16.0 32.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) 74FCT162240ATPACT TSSOP DGG 48 2000 367.0 367.0 45.0 74FCT162240CTPACT TSSOP DGG 48 2000 367.0 367.0 45.0 74FCT162240CTPVCT SSOP DL 48 1000 367.0 367.0 55.0 CY74FCT16240ATPACT TSSOP DGG 48 2000 367.0 367.0 45.0 CY74FCT16240ATPVCT SSOP DL 48 1000 367.0 367.0 55.0 Pack Materials-Page 2 MECHANICAL DATA MTSS003D – JANUARY 1995 – REVISED JANUARY 1998 DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 48 PINS SHOWN 0,27 0,17 0,50 48 0,08 M 25 6,20 6,00 8,30 7,90 0,15 NOM Gage Plane 1 0,25 24 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 48 56 64 A MAX 12,60 14,10 17,10 A MIN 12,40 13,90 16,90 DIM 4040078 / F 12/97 NOTES: A. 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