October 2003 ASM3P2821B rev 1.0 The ASM3P2821B reduces electromagnetic interference Features (EMI) at the clock source, allowing system wide reduction FCC approved method of EMI attenuation. Generates a 1X low EMI spread spectrum clock of the input frequency. Internal loop filter minimizes external components and board space. Frequency deviation: -2.5% implemented in a proprietary all digital method. TTL or CMOS compatible inputs and outputs. Ultra-low power CMOS design. The ASM3P2821B modulates the output of a single PLL TBD mA @ 3.3V, 24MHz with Cypress that are traditionally required to pass EMI regulations. modulation profile approved by the FCC and is 3.3V operating voltage. compatible ferrite beads, shielding and other passive components The ASM3P2821B uses the most efficient and optimized Low inherent cycle-to-cycle jitter. Pinout down stream clock and data dependent signals. The ASM3P2821B allows significant system cost savings by reducing the number of circuit board layers Input frequency range: 15MHz – 27MHz. o of EMI of CY25811. Products are available for industrial temperature range. in order to “spread” the bandwidth of a synthesized clock, and more importantly, decreases the peak amplitudes of its harmonics. This results in significantly lower system EMI compared to the typical narrow band signal produced Available in 8-pin SOIC and TSSOP. by oscillators and most frequency generators. Lowering Product Description EMI by increasing a signal’s bandwidth is called ‘spread The ASM3P2821B is a versatile spread spectrum spectrum clock generation’. frequency modulator designed specifically for input clock frequencies in the range of 15MHz - 27MHz. The Applications ASM3P2821B can generate an EMI reduced clock from a ceramic resonator or system clock. The ASM3P2821B The ASM3P2821B is targeted towards EMI management offers a percentage deviation of –2.5%. for high speed digital applications such as PC peripheral devices, consumer electronics and embedded controller systems. VDD Block Diagram PLL Modulation XIN Crystal Oscillator Frequency Divider Feedback Divider Phase Detector Loop Filter VCO Output Divider MODOUT VSS Alliance Semiconductor 2575, Augustine Drive • Santa Clara, CA • Tel: 408.855.4900 • Fax: 408.855.4999 • www.alsc.com Notice: The information in this document is subject to change without notice. ASM3P2821B Pin Configuration XIN 1 VSS 2 8 NC 7 VDD ASM3P2821B NC 3 6 NC NC 4 5 ModOUT Pin Description Pin# Pin Name Type 1 XIN I External reference clock input. 2 VSS P Ground to entire chip. 3 NC No Connect. 4 NC No Connect. 5 MODOUT 6 NC 7 VDD 8 NC O Description Spread spectrum low EMI output. No Connect. P Power supply for the entire chip (3.3V). No Connect. Low Power EMI Reduction IC Notice: The information in this document is subject to change without notice. 2 of 7 ASM3P2821B Absolute Maximum Ratings Symbol Parameter VDD, VIN Voltage on any pin with respect to GND TSTG Storage temperature TA Operating temperature Rating Unit -0.5 to + 7.0 V -65 to +125 °C 0 to 70 °C Note: These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for extended periods may affect device reliability. DC Electrical Characteristics Symbol Parameter Min Typ Max Unit VIL Input low voltage GND – 0.3 - TBD V VIH Input high voltage TBD - VDD + 0.3 V IIL Input low current TBD µA IIH Input high current TBD µA VOL Output low voltage (VDD = 3.3V, IOL = 4mA) TBD V VOH Output high voltage (VDD = 3.3V, IOH = 4mA) TBD V ICC Dynamic supply current normal mode (3.3V and 10pF loading) TBD mA IDD Static supply current standby mode TBD µA VDD Operating voltage tON ZOUT TBD 3.3 TBD V Power up time (first locked clock cycle after power up) - TBD - mS Clock out impedance - TBD - Ω Low Power EMI Reduction IC Notice: The information in this document is subject to change without notice. 3 of 7 ASM3P2821B AC Electrical Characteristics Symbol Parameter Min Typ Max Unit XIN Input frequency 15 24 27 MHz MODOUT Output frequency 15 24 27 MHz tLH* Output rise time (measured at 0.8V to 2.0V) TBD ns tHL* Output fall time (measured at 2.0V to 0.8V) TBD ns tJC Jitter (cycle to cycle) - - TBD ps tD Output duty cycle - TBD - % * tLH and tHL are measured into a capacitive load of 15pF Low Power EMI Reduction IC Notice: The information in this document is subject to change without notice. 4 of 7 ASM3P2821B Package Information 8-Pin SOIC H E D A2 A C A1 D θ e L B Symbol Dimensions in inches Dimensions in millimeters Min Max Min Max A 0.057 0.071 1.45 1.80 A1 0.004 0.010 0.10 0.25 A2 0.053 0.069 1.35 1.75 B 0.012 0.020 0.31 0.51 C 0.004 0.01 0.10 0.25 D 0.186 0.202 4.72 5.12 E 0.148 0.164 3.75 4.15 e 0.050 BSC 1.27 BSC H 0.224 0.248 5.70 6.30 L 0.012 0.028 0.30 0.70 0° 8° 0° 8° Low Power EMI Reduction IC Notice: The information in this document is subject to change without notice. 5 of 7 ASM3P2821B 8-Pin TSSOP H E D A2 A C θ e A1 L B Symbol Dimensions in inches Min Max Dimensions in millimeters Min Max A 0.047 A1 0.002 0.006 0.05 0.15 A2 0.031 0.041 0.80 1.05 `B 0.007 0.012 0.19 0.30 C 0.004 0.008 0.09 0.20 D 0.114 0.122 2.90 3.10 E 0.169 0.177 4.30 4.50 e 1.10 0.026 BSC 0.65 BSC H 0.244 0.260 6.20 6.60 L 0.018 0.030 0.45 0.75 θ 0° 8° 0° 8° Low Power EMI Reduction IC Notice: The information in this document is subject to change without notice. 6 of 7 ASM3P2821B Alliance Semiconductor Corporation 2595, Augustine Drive, Santa Clara, CA 95054 Tel# 408-855-4900 Fax: 408-855-4999 www.alsc.com Copyright © Alliance Semiconductor All Rights Reserved Preliminary Information Part Number: ASM3P2821B Document Version: v1.0 © Copyright 2003 Alliance Semiconductor Corporation. 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Alliance does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of Alliance products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use. Low Power EMI Reduction IC Notice: The information in this document is subject to change without notice. 7 of 7