ETC ADC100CA Precision 22 bit integrating a/d converter Datasheet

ADC100
Precision 22 Bit
Integrating A/D Converter
THALER CORPORATION • 2015 N. FORBES BOULEVARD • TUCSON, AZ. 85745 • (520) 882-4000
FEATURES
· 22-BIT RESOLUTION
· ±10.48 INPUT RANGE
· 1ppm/°C MAX. SCALE FACTOR ERROR
APPLICATIONS
· TEST EQUIPMENT
· DATA ACQUISITION
· SCIENTIFIC INSTRUMENTS
· 2 ppm MAX. LINEARITY ERROR
· MEDICAL INSTRUMENTS
· AUTO ZERO
· SEISMOLOGICAL EQUIPMENT
· BUS COMPATIBLE
· ROBOTIC SYSTEMS
· INTERNAL CLOCK and REFERENCE
· LOW POWER CONSUMPTION (0.4 WATTS)
· WEIGHING SYSTEMS
DESCRIPTION
ADC100 is a high performance 22-bit A/D
converter based on a patented architecture
which
provides
outstanding
performance
(accuracy) comparable to the best digital meters.
The ADC100 is available in two operating
temperature ranges, -25°C to +85°C and -55°C
to +125°C. "M" versions are screened for high
reliability and quality.
ADC100 offers 3 ppm max. linearity error and
1ppm/°C max. scale factor error over the military
temperature range. It also has excellent offset
stability at 2 ppm max. which the user can auto
zero if desired.
Type
Temperature
Operating Range
Max. Scale
Factor Deviation
ADC100C
-25°C to +85°C
60ppm
ADC100CA
-25°C to +85°C
30ppm
ADC100M
-55°C to +125°C
100ppm
ADC100's compatibility with popular microcomputer buses increases its ease of application in smart
systems. An on-board microprocessor controls all internal functions of the ADC100. Thaler designers
have minimized external connections to greatly reduce the problem often encountered when applying
ADC's.
Operating from ±15VDC and a +5VDC power supply, ADC100 is packaged in a hermetically sealed 40pin ceramic DIP package. Precision test equipment, scientific and medical instruments, and data
acquisition systems are primary application areas for the unusually high resolution and accuracy of this
ADC.
ADC100DS REV. E MAR 00
MAXIMUM RATING SPECIFICATIONS
ADC100
ADC100
MODEL
PARAMETER
MIN
MAX
UNITS
TEMPERATURE
Operating
Storage
POWER SUPPLY
-55
0
125
160
°C
°C
+14
-14
+4
+16
-16
+6
VDC
VDC
VDC
VEE
0
VCC
VDD
VCC
VEE
VDD
INPUTS
Analog Inputs
Digital Inputs
NOTES:
EXTERNAL CONNECTIONS
(TOP VIEW)
N.C.
1
40
ANALOG LOW
N.C.
2
39
ANALOG HIGH
N.C.
3
38
N.C.
Vee (-15V)
4
37
N.C.
Vee (+15V)
5
36
N.C.
Vdd (+5V)
6
35
GND
7
34
N.C.
8
33
N.C.
N.C.
9
32
N.C.
N.C.
10
31
N.C.
N.C.
11
30
N.C.
N.C.
12
29
D0
13
28
AUTO ZERO
RESET
N.C.
D1
14
27
N.C.
D2
15
26
N.C.
D3
16
25
N.C.
D4
17
24
STATUS 1
D5
18
23
STATUS 0
D6
19
22
CONVERT
D7
20
21
OUTPUT ENABLE
ADC100
INTEGRATION
CAPACITOR
1. Power Supply Decoupling
The ADC100 has internal 0.1µF decoupling
capacitors for all power supply inputs. The
internal decoupling capacitors are adequate
for applications with relatively short power
supply leads (approx. 5") or if additional
capacitors are located on a circuit board.
For applications with long power supply
leads an external capacitor of 10 mF on the
+/- 15V inputs and 33 mF on the +5V input is
recommended.
2. Ground
The ground connection (pin 7) should be
made as solid as possible since ground
noise can result in a loss of accuracy. Use
of a ground plane is a good approach to
maintain the full accuracy of the ADC100.
3. External Components
A 0.68 µF polystyrene integration capacitor
must be connected to pins 34 and 35 with a
lead length not exceeding 2".
4. Analog Inputs
In order to avoid differential noise pickup it is
recommended to use parallel adjacent lines
for the analog inputs (pins 39, 40) on PC
boards and shielded lines outside of the PC
connections.
ADC100DS REV. E MAR 00
ELECTRICAL SPECIFICATIONS
ADC100
(Vps = +/- 15V, + 5V, T = 25 Deg. C.)
ADC100CA
ADC100C
MODEL
PARAMETER
MIN
TYP
MAX
MIN
TYP
ADC100M
MAX
MIN
TYP
MAX
ACCURACY
22
1
Resolution
Input Equivalent Noise
Offset without Auto Zero
Offset with Auto Zero
Full Scale
Noise (.1-10Hz) @ 10V
Nonlinearity
Normal Mode Rejection 1
*
*
4
1
100
*
*
2
0.5
50
6
*
*
*
*
3
60
*
2
*
*
*
Bits
µV
ppm
ppm
ppm
µVpp
ppm
dB
TEMPERATURE STABILITY
0.2
1.0
Offset
Full Scale
0.1
0.5
*
*
ppm/o C
ppm/o C
TIME STABILITY
.1
2
Offset
Full Scale 2
*
*
*
*
ppm/month
ppm/24 hrs.
ERROR ALL SOURCES
24 hrs, +/- 1 Deg. C Amb.
90 days, +/- 5 Deg. C Amb.
1 year, +/- 5 Deg. C Amb.
CONVERSION TIME
WARM-UP TIME
.0007, 2
.0010, 2
.0015, 2
.0005, 2
.0008, 2
.0013, 2
*
*
*
%, +/- Counts
%, +/- Counts
%, +/- Counts
320
*
*
ms
5
*
*
minutes
POWER SUPPLY REJECTION
80
80
+/- 15 VDC
5 VDC
*
*
*
*
dB
dB
ANALOG INPUT CHARACTERISTICS
Input Range
Bias Current
Input Impedance
-10.485760
1.2
200
10.485755
3
*
15.5
15.5
5.5
*
*
*
*
*
*
*
*
*
*
*
*
*
*
V
nA
GΩ
*
*
*
*
*
*
V
V
V
*
*
*
*
*
POWER SUPPLY VOLTAGES
+15 V
-15 V
5v
14.5
14.5
4.5
POWER SUPPLY CURRENTS
+15 V
-15 V
5v
15
15
5
23
24
42
*
*
*
*
*
*
mA
mA
mA
DIGITAL INPUTS
Low
High
0.8
4.0
*
*
*
V
V
*
V
V
*
V
V
*
V
V
125
oC
*
DIGITAL OUTPUTS
Low
High
0.8
4.0
*
*
*
AUTO ZERO INPUT
Low
High
*
0.8
4.0
*
*
CONVERT INPUT
Low
High
TEMPERATURE RANGE
0.8
4.0
-25
* Same as ADC100C
Note: 1) 60 Cycle
2) ( Max-Min Value) - Noise(.1-10Hz)
*
*
*
85
*
*
-55
ADC100DS REV. E MAR 00
THEORY OF OPERATION
The timing control circuitry governs the counters that
measure the integration time in both directions.
The ADC100's on-board microprocessor is used to
calculate the results of the integration equation above.
It is also used to perform error corrections and to
control the built-in-auto-zero function. Note that the
mP automatically performs an auto-zero function at
start-up, but it is recommended, to achieve maximum
accuracy, that an auto-zero be performed again after
the ADC100 is fully warmed up.
When the µP detects a convert signal, it lowers the
status lines to indicate that the ADC is involved in a
conversion. When it detects a change in slope
direction, the µP will collect the counts for the
integration time. When sufficient counts have been
collected, the µP performs the calculations described
above.
When the calculations are complete, the µmP places
the most significant byte in the output buffer and
raises the S0 flag. When another pulse is placed on
the convert line, the middle byte is placed on the
output, the S0 flag is lowered and the S1 flag raised.
When the last pulse is placed in the convert line, the
least significant byte is placed in the output buffer and
both status flags are high indicating that the ADC100
is ready for another conversion.
Status line summary:
In the ADC100 block diagram (see Figure 1), Vhi
and Vlow are the inputs. Both are buffered and fed
into a differential, voltage controlled, single output
current source. This current is added to the
reference current at the input of the op amp
integrator. The output of the integrator is fed into
a Schmitt trigger, which in turn, is fed into the
ADC's timing control circuitry.
When the
integrator output actuates the Schmitt trigger, the
timing circuit changes the direction of the
reference current source and the integrator
begins integrating in the opposite direction. This
continues until the Schmitt trigger is actuated
again by the integrator and reverses the direction
of the reference current.
The equation for integration times are:
Tp=
VXC
I ref + I inp
Tm=
VXC
-I ref + I inp
V = Voltage
C= Integration Capacitor Value
I ref = Reference Current
I inp = Input Current
Resolving these equations produces:
I inp = I ref
Tp - Tm
Tp + Tm
Tp = Time Positive
Tm = Time Negative
S1
S0
0
0
1
1
0
1
0
1
Conversion in progress.
Conversion complete. MSB in output.
Middle byte in output register.
LSB in output. Ready for next conversion.
Vhi
Auto
Zero
Switch
Differential
Voltage Controlled
Current Source
Schmitt
Trigger
Vlow
+15V
Bidirectional
Reference
Current Source
Data
Output
ï ï
Output
Buffer
Output Enable
FIGURE 1. BLOCK DIAGRAM
Microprocessor
Auto
Zero
Convert
Current
Directional
Switch
ï
Timing
Control
and
Counter
-15V
Clock
Status
Lines
ADC100DS REV. E MAR 00
CONNECTING THE ADC100
POWER SUPPLIES
The power supply lines are connected to pins 4-7.
Pin 4 is -15V, pin 5 is +15v, pin 6 is +5V and pin 7 is
GND.
OUTPUT DATA LINES
The output data is available in byte form on pins
13-20. Pin 20 is the Most Significant Bit and pin 13
the Least Significant Bit. The data lines go to a high
impedance state when the Output Enable line is at a
logic one level.
OUTPUT ENABLE (PIN 21)
Data is placed on the Output Data Lines by a logic
zero on this line.
CONVERT (Pin22)
This line is used to initiate a conversion cycle and
to retrieve the output data. The status lines indicate
which function will be executed. The first pulse
(transition from logic one to logic zero) starts the
conversion cycle. Two subsequent pulses are used
to place the lower two bytes on the Output Data
Lines.
AUTO-ZERO / RESET (Pin 29)
A logic zero on this input will autozero the ADC1503 by internally connecting the analog high to analog
low. Since the µP is reset the status lines S1 and
S0 are tristate before going to the low position. The
status lines will remain low until the autozero is
complete.
INTEGRATION CAPACITOR (Pin 34, 35)
A .68 µF polystyrene capacitor must be connected
to these pins. Lead length should be as short as
possible and not exceed 2".
ANALOG INPUTS (Pin 39, 40)
Both analog inputs are buffered by op-amps and
have a common mode rejection of approximately
80dB. min. To maintain the full accuracy at the
ADC it is recommended to keep the input to analog
common to less than 0.1VDC.
STATUS LINES (Pins 23, 24)
These lines indicate the present state of the ADC. When the Convert line receives the first pulse in a
conversion cycle the Status Lines go to logic zero, indicating that a conversion cycle is in progress. When
the conversion is complete the microprocessor places the MSB of the output data in the output buffer and
then raises S0 to a logic one, indicating that the MSB at the output data is available in the output buffer.
When the Convert Line is pulsed again the middle byte of the output data is placed in that output buffer and
S1 changes to logic one and S0 to logic zero. The third pulse places the LSB of the output data in the buffer
and both status lines go to the logic one. The converter is now ready for the next conversion cycle.
The table below shows a summary of the status code.
S1 S0
Conversion in progress.
0
0
Conversion complete. MSB in output.
0
1
Middle byte in output register.
1
0
LSB in output. Ready for next conversion.
1
1
OUTPUT DATA REPRESENTATION
The output data is represented in BOB (Bipolar Offset Binary)
format. One LSB is scaled to be exactly 5mV. The table below
shows the output data codes for zero and plus-minus full scale
input voltage.
Input Voltage
-10.485760 V
0.0 V
+10.485755 V
High Byte
Output Data
Middle Byte
Low Byte
00
20
3F
00
00
FF
00
00
FF
ADC100DS REV. E MAR 00
TIMING DIAGRAMS
CONVERT
→
→
AZ
tAZD
S1
S0
tTRST →
→
tAZ
Symbol
Parameter
Min.
Typ.
Max.
Unit
tAZD
AZ Pulse Width
0.2
tTRST
Tristate Time
30
ms
tAZ
AZ Time
400
ms
µs
FIGURE 2. AUTO ZERO
→
→
CONVERT
tCONZ
S1
→
tSZ →
S0
tCONV
Symbol
Parameter
Min.
Typ.
Max.
Unit
tCONZ
Convert Pulse
5.0
tSZ
Status Delay
8.0
µs
tCONV
Convert Time
320
ms
µs
FIGURE 3. CONVERSION
ADC100DS REV. E MAR 00
TIMING DIAGRAMS
OE
tSIR →
→
tOEDV →
MIB
LSB
→
CONVERT
MSB
→
D0 - D7
→
tSIR
S1
S0
Symbol
Parameter
tOEDV
OE Delay
tSIR
Status Delay
Min.
Typ.
3.0
Max.
Unit
45
ns
µs
40-PIN HYBRID PACKAGE
FIGURE 4. DATA OUTPUT
INCHES
DIM
MIN
MAX
E
1.080
1.100
D
2.075
2.115
A
0.155
0.185
L
0.220
0.240
B2
.100 typ
B
.018 typ
Q
.015
.035
C
.009
.012
P
.012
.018
G1
.890
.910
B1
.040 typ
NOTES:
1. GOLD PLATING 60 MICRO INCHES MINIMUM
THICKNESS OVER 100 MICRO INCHES NOMINAL
THICKNESS OF NICKEL
FIGURE 5. MECHANICAL SPECIFICATIONS
ADC100DS REV. E MAR 00
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