ASML-5822 Schottky Assisted Low Power PIN Diode Limiter Data Sheet Description Features The ASML-5822 is specifically designed for low power limiter applications, where it can be used to protect the receiver system from being damaged by large input signals, and allow the receiver system to function normally with the absence of large signal. The Schottky enhanced limiter will have a lower limiting threshold compared to the more conventional self-biased PIN limiter. The PIN diode is placed at the input, to protect the Schottky from high RF power levels. • Low Power Limiter with unique combination of PIN and Schottky Diode • Low limiting threshold power (OP1dB : 2.85 dBm @900MHz) • Semi integrated solution in Surface Mount SOT-323 Package – design simplicity – save board space – reduce cost Pin Connections and Package Marking, SOT-323 • PIN Diode features: – Power Limiting /Circuit Protection – Low Failure in Time (FIT) Rate[1] • Schottky Diode features: PIN Diode Schottky Diode – Low Turn-On Voltage (As Low as 0.34 V at 1 mA) – Low FIT (Failure in Time) Rate[1] Note: 1. For more information see the Surface Mount PIN Reliability Data Sheet. F6? Notes: F6 = Device Code ? = Month code indicates the month of manufacture Table 1. Absolute Maximum Rating [1] Tc = +25°C Symbol Parameter Units Absolute Max. for PIN Diode Absolute Max. for Schottky DIode IF Forward Current (1µs Pulse) Amp 1 1 PIV Peak Inverse Voltage V 50 15 TJ Junction Temperature °C 150 TSTG Storage Temperature °C -65 to 150 θJC Thermal Resistance [2] °C/W 500 Notes: 1. Operation in excess of anyone of these conditions may result in permanent damage to the device. 2. TC = 25°C, TC where is defined to be the temperature at the package pins where contacts is made to the circuit board. Table 2. Electrical Specifications, Tc = +25°C, PIN diode Symbol Parameter and Test Condition Units Min. Typ Max. VBR Breakdown Voltage, IR ≤ 10µA V 50 60 – VF Forward Voltage, IF = 100mA V – 0.93 – RS Typical Series Resistance, Freq = 100MHz & IF = 1mA Ohm – 1.2 – RS Typical Series Resistance, Freq = 100MHz & IF = 10mA Ohm – 0.5 0.6 CT Typical Total Capacitance, Freq = 1MHz & VR = 0V pF – 0.9 – CT Typical Total Capacitance, Freq = 1MHz & VR = 20V pF – 0.53 0.8 τ Carrier Lifetime @ IF =10mA & IR =6mA ns – 70 – Table 3. Electrical Specifications, Tc = +25°C, Schottky diode Symbol Parameter and Test Condition Units Min. Typ Max. VBR Breakdown Voltage, IR ≤ 100µA V 15 22 – IR Reverse Leakage Current @ VBR = 1V nA – 40 100 VF Forward Voltage, IF = 1mA V – 0.32 0.34 VF Forward Voltage, IF = 10mA V – 0.45 0.50 CT Typical Total Capacitance, Freq = 1MHz & VR = 0V pF – 0.7 1.0 RD Typical Dynamic Resistance, IF =5mA Ohm – 12 – 2 5 5 0 0 -5 -5 S11 & S21 (dB) S11 & S21 (dB) ASML-5822 Typical Performance, Tc = +25°C -10 -15 -20 S11 S21 -25 -30 0 1 2 3 Frequency (GHz) 4 5 0 5 10 Pin (dBm) 15 20 25 Pout (dBm) fundamental second harmonic -10 -5 0 5 10 Pin (dBm) 15 20 Figure 5. Pout fundamental & Pout second harmonic vs Pin at freq = 1.8GHz 3 0 1 2 3 4 Frequency (GHz) 5 6 20 10 0 -10 -20 -30 -40 -50 -60 -70 -80 fundamental second harmonic -10 -5 0 5 10 Pin (dBm) 15 20 25 Figure 4. Pout fundamental & Pout second harmonic vs Pin at freq = 900MHz Pout (dBm) Pout (dBm) Figure 3. Pout fundamental & Pout second harmonic vs Pin at freq = 450MHz 20 10 0 -10 -20 -30 -40 -50 -60 -70 -80 S11 S21 Figure 2. S11 & S21 vs Frequency at Input Power = -30dBm Pout (dBm) -5 -20 -30 6 fundamental second harmonic -10 -15 -25 Figure 1. S11 & S21 vs Frequency at Input Power = 0dBm 20 10 0 -10 -20 -30 -40 -50 -60 -70 -80 -10 25 20 10 0 -10 -20 -30 -40 -50 -60 -70 -80 -10 fundamental second harmonic -5 0 5 10 Pin (dBm) 15 20 Figure 6. Pout fundamental & Pout second harmonic vs Pin at freq = 2.0GHz 25 Pout (dBm) Pout (dBm) 20 10 0 -10 -20 -30 -40 -50 -60 -70 -80 fundamental second harmonic -10 -5 0 5 10 Pin (dBm) 15 20 25 Figure 7. Pout fundamental & Pout second harmonic vs Pin at freq = 2.5GHz 20 10 0 -10 -20 -30 -40 -50 -60 -70 -80 fundamental second harmonic -10 -5 e1 XXX E1 e L B C D DIMENSIONS (mm) A A1 Notes: XXX-package marking Drawings are not to scale 4 SYMBOL A A1 B C D E1 e e1 E L 5 10 Pin (dBm) 15 20 Figure 8. Pout fundamental & Pout second harmonic vs Pin at freq = 2.7GHz SOT-323 Package Outline E 0 MIN. MAX. 0.80 1.00 0.00 0.10 0.15 0.40 0.10 0.20 1.80 2.25 1.10 1.40 0.65 typical 1.30 typical 1.80 2.40 0.425 typical 25 Part Number Ordering Information Part Number No. of Devices Container ASML-5822-BLK 100 Bulk, per Antistatic bag ASML-5822-TR1 3000 Tape & Reel, per 7” Reel ASML-5822-TR2 10000 Tape & Reel, per 13” Reel Tape and Reeling conforms to Electronic Industries RS-481, “Taping of Surface Mounted Components for Automated Placement”. For lead-free option, the part number will have the character “G” at the end, eg. –TR2G for a 10K pc lead-free reel. Recommended PCB Pad Layout for AVAGO’s SOT-323 Products 0.026 0.079 0.039 0.022 Dimensions in inches Device Orientation REEL TOP VIEW END VIEW 4 mm CARRIER TAPE USER FEED DIRECTION COVER TAPE 5 8 mm ABC ABC ABC Note: "AB" represents package marking code. "C" represents date code. ABC Tape Dimensions and Product Orientation P P2 D P0 E F C D1 t1 (CARRIER TAPE THICKNESS) An DESCRIPTION SYMBOL SIZE (mm) LENGTH A0 2.40 ± 0.10 WIDTH 2.40 ± 0.10 B0 DEPTH 1.20 ± 0.10 K0 PITCH P 4.00 ± 0.10 BOTTOM HOLE DIAMETER D1 1.00 + 0.25 PERFORATION DIAMETER D 1.55 ± 0.05 P0 4.00 ± 0.10 PITCH POSITION E 1.75 ± 0.10 8.00 ± 0.30 W CARRIER TAPE WIDTH 0.254 ± 0.02 THICKNESS t1 COVER TAPE WIDTH C 5.4 ± 0.10 TAPE THICKNESS Tt 0.062 ± 0.001 DISTANCE 3.50 ± 0.05 CAVITY TO PERFORATION F (WIDTH DIRECTION) 2.00 ± 0.05 CAVITY TO PERFORATION P2 (LENGTH DIRECTION) ANGLE FOR SOT-323 (SC70-3 LEAD) An 8°C MAX FOR SOT-363 (SC70-6 LEAD) 10°C MAX CAVITY Tt (COVER TAPE THICKNESS) KO An A0 B0 SIZE (INCHES) 0.094 ± 0.004 0.094 ± 0.004 0.047 ± 0.004 0.157 ± 0.004 0.039 + 0.010 0.061 ± 0.002 0.157 ± 0.004 0.069 ± 0.004 0.315 ± 0.012 0.0100 ± 0.0008 0.205 ± 0.004 0.0025 ± 0.00004 0.138 ± 0.002 0.079 ± 0.002 For product information and a complete list of distributors, please go to our web site: W www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright © 2005-2009 Avago Technologies. All rights reserved. AV02-1691EN - February 25, 2009