Fairchild FDW256P 30v p-channel powertrench mosfet Datasheet

FDW256P
30V P-Channel PowerTrench MOSFET
General Description
Features
This P-Channel MOSFET is a rugged gate version of
Fairchild Semiconductor’s advanced PowerTrench
process. It has been optimized for power management
applications requiring a wide range of gave drive
voltage ratings (4.5V – 25V).
• –8 A, –30 V
Applications
• High performance trench technology for extremely
low RDS(ON)
RDS(ON) = 13.5 mΩ @ V GS = –10 V
RDS(ON) = 20 mΩ @ V GS = –4.5 V
• Extended V GSS range (±25V) for battery applications
• Battery protection
• Low profile TSSOP-8 package
• DC/DC conversion
• Power management
• Load switch
D
S
S
D
G
S
S
D
TSSOP-8
5
4
6
3
7
2
8
1
Pin 1
Absolute Maximum Ratings
Symbol
TA=25oC unless otherwise noted
Ratings
Units
V DSS
Drain-Source Voltage
–30
V
V GSS
Gate-Source Voltage
± 25
V
ID
Drain Current
(Note 1)
–8
A
PD
– Pulsed
Power Dissipation
(Note 1a)
–50
1.3
W
(Note 1b)
0.6
TJ , TSTG
Parameter
– Continuous
–55 to +150
°C
(Note 1a)
96
°C/W
(Note 1b)
208
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA
Thermal Resistance, Junction-to-Ambient
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
256P
FDW256P
13’’
16mm
2500 units
2008 Fairc hild Semiconductor Corporation
FDW256P Rev C1(W)
FDW256P
July 2008
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Min
Typ
Max Units
Off Characteristics
BV DSS
∆BV DSS
∆TJ
IDSS
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
V GS = 0 V, ID = –250 µA
V DS = –24 V, V GS = 0 V
–1
µA
IGSSF
Gate–Body Leakage, Forward
V GS = 25 V,
V DS = 0 V
100
nA
IGSSR
Gate–Body Leakage, Reverse
V GS = –25 V, V DS = 0 V
–100
nA
–3
V
On Characteristics
–30
ID = –250 µA, Referenced to 25°C
V
–23
mV/°C
(Note 2)
V GS(th)
∆V GS(th)
∆TJ
RDS(on)
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
V DS = V GS ,
ID = –250 µA
ID = –250 µA, Referenced to 25°C
ID(on)
On–State Drain Current
V GS = –10 V,
V DS = –5 V
gFS
Forward Transconductance
V DS = –5 V,
ID = –8.0 A
30
S
V DS = –15 V,
f = 1.0 MHz
V GS = 0 V,
2267
pF
599
pF
315
pF
–1
–1.7
5
V GS = –10 V, ID = –8.0 A
V GS = –4.5 V, ID = –6.5 A
V GS =–10 V, ID =–8.0A, TJ =125°C
11
16
15
mV/°C
13.5
20
19
–50
mΩ
A
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Switching Characteristics
td(on)
Turn–On Delay Time
tr
Turn–On Rise Time
td(off)
(Note 2)
V DD = –15 V,
V GS = –10 V,
15
27
ns
11
35
ns
Turn–Off Delay Time
78
125
ns
tf
Turn–Off Fall Time
45
72
ns
Qg
Total Gate Charge
28
38
nC
Qgs
Gate–Source Charge
Qgd
Gate–Drain Charge
V DS = –15 V,
V GS = –5.0V
ID = –1 A,
RGEN = 6 Ω
ID = –8.0 A,
7
nC
12
nC
Drain–Source Diode Characteristics and Maximum Ratings
IS
V SD
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
V GS = 0 V, IS = –1.2 A
Voltage
(Note 2)
–0.7
–1.2
A
–1.2
V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) RθJA is 96 °C/W (steady state) when mounted on a 1 inch² copper pad on FR-4.
b) RθJA is 208 °C/W (steady state) when mounted on a minimum copper pad on FR-4.
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDW256P Rev C1(W)
FDW256P
Electrical Characteristics
FDW256P
Typical Characteristics
50
-6.0V
2.2
-4.5V
-4.0V
-3.5V
40
-I D, DRAIN CURRENT (A)
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
VGS = -10V
30
-3.0V
20
10
2
VGS = -3.5V
1.8
1.6
-4.0V
-4.5V
1.4
-5.0V
-6.0V
1.2
-10V
1
0
0
0.5
1
1.5
2
2.5
0.8
3
0
-V DS , DRAIN TO SOURCE VOLTAGE (V)
30
40
50
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
1.6
0.05
ID = -8A
V GS = -10V
RDS(ON), ON-RESISTANCE (OHM)
ID = -4.0A
1.4
1.2
1
0.8
0.6
0.04
0.03
TA = 125o C
0.02
T A = 25o C
0.01
0
-50
-25
0
25
50
75
100
125
150
2
4
TJ , JUNCTION TEMPERATURE (oC)
6
8
10
-V GS, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
50
100
T A = -55o C
25oC
-I S, REVERSE DRAIN CURRENT (A)
V DS = -5.0V
40
-ID, DRAIN CURRENT (A)
20
-I D, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
10
125o C
30
20
10
0
V GS = 0V
10
T A = 125o C
1
25o C
0.1
-55 oC
0.01
0.001
0.0001
1
1.5
2
2.5
3
3.5
-V GS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
4
0
0.2
0.4
0.6
0.8
1
1.2
1.4
-V SD , BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDW256P Rev C1(W)
FDW256P
Typical Characteristics
4000
V DS = -10V
ID = -8A
f = 1 MHz
V GS = 0 V
-15V
8
3200
-20V
CAPACITANCE (pF)
-V GS, GATE-SOURCE VOLTAGE (V)
10
6
4
CISS
2400
1600
COSS
2
800
0
0
CRSS
0
10
20
30
40
50
0
5
Q g, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics.
20
25
30
50
RDS(ON) LIMIT
10
P(pk), PEAK TRANSIENT POWER (W)
1ms
-ID, DRAIN CURRENT (A)
15
Figure 8. Capacitance Characteristics.
100
10ms
100ms
1s
10s
1
DC
V GS = -10V
SINGLE PULSE
Rθ JA = 208o C/W
0.1
T A = 25o C
0.01
0.01
0.1
1
10
SINGLE PULSE
RθJA = 208°C/W
TA = 25°C
40
30
20
10
0
0.01
100
0.1
-V DS, DRAIN-SOURCE VOLTAGE (V)
1
10
100
t 1, TIME (sec)
Figure 9. Maximum Safe Operating Area.
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
10
-V DS , DRAIN TO SOURCE VOLTAGE (V)
Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
RθJA(t) = r(t) + RθJA
o
RθJA = 208 C/W
0.2
0.1
0.1
0.05
P(pk)
0.02
0.01
t1
0.01
t2
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
SINGLE PULSE
0.001
0.0001
0.001
0.01
0.1
1
10
100
1000
t1, TIME (sec)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
FDW256P Rev C1(W)
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tm
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®
tm
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Datasheet contains the design specifications for product development. Specifications
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Rev. I35
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