DM74LS169A Synchronous 4-Bit Up/Down Binary Counter General Description This synchronous presettable counter features an internal carry look-ahead for cascading in high-speed counting applications. Synchronous operation is provided by having all flip-flops clocked simultaneously, so that the outputs all change at the same time when so instructed by the count-enable inputs and internal gating. This mode of operation helps eliminate the output counting spikes that are normally associated with asynchronous (ripple clock) counters. A buffered clock input triggers the four master-slave flip-flops on the rising edge of the clock waveform. This counter is fully programmable; that is, the outputs may each be preset either high or low. The load input circuitry allows loading with the carry-enable output of cascaded counters. As loading is synchronous, setting up a low level at the load input disables the counter and causes the outputs to agree with the data inputs after the next clock pulse. The carry look-ahead circuitry permits cascading counters for n-bit synchronous applications without additional gating. Both count-enable inputs (P and T) must be low to count. The direction of the count is determined by the level of the up/down input. When the input is high, the counter counts up; when low, it counts down. Input T is fed forward to enable the carry outputs. The carry output thus enabled will produce a low-level output pulse with a duration approximately equal to the high portion of the QA output when counting up, and approximately equal to the low portion of the QA output when counting down. This low-level overflow carry pulse can be used to enable successively cascaded stages. Transitions at the enable P or T inputs are allowed regardless of the level of the clock input. All inputs are diode clamped to minimize transmission-line effects, thereby simplifying system design. This counter features a fully independent clock circuit. Changes at control inputs (enable P, enable T, load, up/ down), which modify the operating mode, have no effect until clocking occurs. The function of the counter (whether enabled, disabled, loading, or counting) will be dictated solely by the conditions meeting the stable setup and hold times. Features n Fully synchronous operation for counting and programming. n Internal look-ahead for fast counting. n Carry output for n-bit cascading. n Fully independent clock circuit Connection Diagram Dual-In-Line Package DS006401-1 Order Number 54LS169DMQB, 54LS169FMQB, 54LS169LMQB, DM54LS169AJ, DM54LS169AW, DM74LS169AM or DM74LS169AN See Package Number E20A, J16A, M16A, N16E or W16A © 1998 Fairchild Semiconductor Corporation DS006401 www.fairchildsemi.com DM74LS169A Synchronous 4-Bit Up/Down Binary Counter April 1998 Absolute Maximum Ratings (Note 1) Supply Voltage Input Voltage Operating Free Air Temperature Range DM54LS and 54LS DM74LS Storage Temperature Range 7V 7V −55˚C to +125˚C 0˚C to +70˚C −65˚C to +150˚C Recommended Operating Conditions Symbol Parameter DM54LS169A DM74LS169A Units Min Nom Max Min Nom Max 4.5 5 5.5 4.75 5 5.25 VCC Supply Voltage VIH High Level Input Voltage VIL Low Level Input Voltage 0.7 0.8 V IOH High Level Output Current −0.4 −0.4 mA IOL Low Level Output Current fCLK Clock Frequency (Note 2) 2 2 4 0 25 20 8 mA 0 25 MHz 0 20 MHz Clock Frequency (Note 3) 0 tW Clock Pulse Width (Note 4) 25 25 tSU Setup Time Data 20 20 Enable 20 20 Load 25 25 U/D 30 30 (Note 4) ns T or P tH Hold Time (Note 4) TA Free Air Operating Temperature V V ns 0 0 −55 125 ns 0 70 ˚C Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the “Electrical Characteristics” table are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 2: CL = 15 pF, RL = 2 kΩ, TA = 25˚C and VCC = 5V. Note 3: CL = 50 pF, RL = 2 kΩ, TA = 25˚C and VCC = 5V. Note 4: TA = 25˚C and VCC = 5V. Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units (Note 5) VI Input Clamp Voltage VOH High Level Output Voltage VOL Low Level Output Voltage Input Current @ Max II Input Voltage IIH High Level Input Current IIL Low Level Input Current IOS Short Circuit Output Current ICC Supply Current VCC = Min, II = −18 mA VCC = Min, IOH = Max VIL = Max, VIH = Min VCC = Min, IOL = Max VIL = Max, VIH = Min IOL = 4 mA, VCC = Min VCC = Max VI = 7V VCC = Max −1.5 DM54 2.5 DM74 2.7 3.4 3.4 DM54 0.25 DM74 0.35 0.4 0.5 DM74 0.25 0.4 Enable T 0.2 Others 0.1 Enable T 40 VI = 2.7V VCC = Max Others 20 Enable T −0.8 VI = 0.4V VCC = Max Others −0.4 DM54 −20 −100 (Note 6) VCC = Max(Note 7) DM74 −20 −100 20 34 Note 5: All typicals are at VCC = 5V and TA = 25˚C. Note 6: Not more than one output should be shorted at a time, and the duration should not exceed one second. Note 7: ICC is measured after a momentary 4.5V, then ground, is applied to the CLOCK with all other inputs grounded and all the outputs open. www.fairchildsemi.com 2 V V V mA µA mA mA mA Switching Characteristic at VCC = 5V and TA = 25˚C (for Test Waveforms and Output Load) RL = 2 kΩ From (Input) Symbol Parameter To (Output) CL = 15 pF Min fMAX Maximum Clock Max 25 CL = 50 pF Min Units Max 20 MHz Frequency tPLH Propagation Delay Time Low to High Level Output tPHL Propagation Delay Time High to Low Level Output tPLH Propagation Delay Time Low to High Level Output tPHL Propagation Delay Time High to Low Level Output tPLH tPHL tPLH Clock to Clock to Clock to Enable T to Propagation Delay Time Enable T to High to Low Level Output Ripple Carry High to Low Level Output ns 35 44 ns 20 24 ns 23 32 ns 18 24 ns 18 28 ns 25 30 ns 29 38 ns Any Q Ripple Carry Propagation Delay Time 39 Any Q Propagation Delay Time Propagation Delay Time 35 Ripple Carry Low to High Level Output Low to High Level Output tPHL Clock to Ripple Carry Up/Down to Ripple Carry (Note 8) Up/Down to Ripple Carry (Note 8) Note 8: The propagation delay from UP/DOWN to RIPPLE CARRY must be measured with the counter at either a minimum or a maximum count. As the logic level of the up/down input is changed, the ripple carry output will follow. If the count is minimum, the ripple carry output transition will be in phase. If the count is maximum, the ripple carry output will be out of phase. 3 www.fairchildsemi.com Logic Diagram LS169A Binary Counter DS006401-2 www.fairchildsemi.com 4 Timing Diagram LS169A Binary Counters Typical Load, Count, and Inhibit Sequences DS006401-3 5 www.fairchildsemi.com Physical Dimensions inches (millimeters) unless otherwise noted Ceramic Leadless Chip Carrier Package (E) Order Number 54LS169LMQB Package Number E20A 16-Lead Ceramic Dual-In-Line Package (J) Order Number 54LS169DMQB or DM54LS169AJ Package Number J16A www.fairchildsemi.com 6 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Small Outline Molded Package (M) Order Number DM74LS169AM Package Number M16A 16-Lead Molded Dual-In-Line Package (N) Order Number DM74LS169AN Package Number N16E 7 www.fairchildsemi.com DM74LS169A Synchronous 4-Bit Up/Down Binary Counter Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Ceramic Flat Package (W) Order Number 54LS169FMQB or DM54LS169AW Package Number W16A LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or sysdevice or system whose failure to perform can be reatems which, (a) are intended for surgical implant into sonably expected to cause the failure of the life support the body, or (b) support or sustain life, and (c) whose device or system, or to affect its safety or effectiveness. failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. Fairchild Semiconductor Corporation Americas Customer Response Center Tel: 1-888-522-5372 www.fairchildsemi.com Fairchild Semiconductor Europe Fax: +49 (0) 1 80-530 85 86 Email: [email protected] Deutsch Tel: +49 (0) 8 141-35-0 English Tel: +44 (0) 1 793-85-68-56 Italy Tel: +39 (0) 2 57 5631 Fairchild Semiconductor Hong Kong Ltd. 13th Floor, Straight Block, Ocean Centre, 5 Canton Rd. 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