TI1 CY74FCT377ATSOC 8-bit register Datasheet

CY54FCT377T, CY74FCT377T
8-BIT REGISTERS
SCCS023A – MAY 1994 – REVISED OCTOBER 2001
D
D
D
D
D
D
D
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
O7
D7
D6
O6
O5
D5
D4
O4
CP
SN54FCT377T . . . L PACKAGE
(TOP VIEW)
D1
O1
O2
D2
D3
O7
D
CE
O0
D0
D1
O1
O2
D2
D3
O3
GND
CE
VCC
D
SN74FCT377T . . . Q OR SO PACKAGE
(TOP VIEW)
D0
O0
D
Function, Pinout, and Drive Compatible
With FCT and F Logic
Reduced VOH (Typically = 3.3 V) Versions of
Equivalent FCT Functions
Edge-Rate Control Circuitry for
Significantly Improved Noise
Characteristics
Ioff Supports Partial-Power-Down Mode
Operation
Matched Rise and Fall Times
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
Fully Compatible With TTL Input and
Output Logic Levels
Clock Enable for Address and Data
Synchronization Application
Eight Edge-Triggered D-Type Flip-Flops
CY54FCT377T
– 32-mA Output Sink Current
– 12-mA Output Source Current
CY74FCT377T
– 64-mA Output Sink Current
– 32-mA Output Source Current
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
D7
D6
O6
O5
D5
O3
GND
CP
O4
D4
D
description
The ’FCT377T devices have eight triggered D-type flip-flops with individual data (D) inputs. The common
buffered clock (CP) inputs load all flip-flops simultaneously when the clock-enable (CE) input is low. The register
is fully edge triggered. The state of each D input at one setup time before the low-to-high clock transition is
transferred to the corresponding flip-flop output (O). CE must be stable only one setup time prior to the
low-to-high clock transition for predictable operation.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow through the device when it is powered down.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
CY54FCT377T, CY74FCT377T
8-BIT REGISTERS
SCCS023A – MAY 1994 – REVISED OCTOBER 2001
ORDERING INFORMATION
SPEED
(ns)
PACKAGE†
TA
QSOP – Q
SOIC – SO
–40°C to 85°C
QSOP – Q
SOIC – SO
QSOP – Q
55°C to 125°C
–55°C
LCC – L
ORDERABLE
PART NUMBER
Tape and reel
5.2
CY74FCT377CTQCT
Tube
5.2
CY74FCT377CTSOC
Tape and reel
5.2
CY74FCT377CTSOCT
Tape and reel
7.2
CY74FCT377ATQCT
Tube
7.2
CY74FCT377ATSOC
Tape and reel
7.2
CY74FCT377ATSOCT
Tape and reel
13
CY74FCT377TQCT
Tube
5.5
CY54FCT377CTLMB
Tube
8.3
TOP-SIDE
MARKING
FCT377C
FCT377C
FCT377A
FCT377A
FCT377
CY54FCT377ATLMB
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
INPUTS
CP
CE
D
OUTPUT
O
OPERATING
MODE
↑
l
h
H
Load 1
↑
l
l
L
Load 0
↑
X
h
H
X
X
No change
Hold
H = High logic level, h = High logic level one setup time prior
to the low-to-high clock transition, L = Low logic level,
l = Low logic level one setup time prior to the low-to-high
clock transition, X = Don’t care, ↑ = Low-to-high clock
transition
logic diagram
CP
CE
D0
11
1
CP
Q
3
D
To Seven Other Channels
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
2
O0
CY54FCT377T, CY74FCT377T
8-BIT REGISTERS
SCCS023A – MAY 1994 – REVISED OCTOBER 2001
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range to ground potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
DC input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
DC output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
DC output current (maximum sink current/pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 mA
Package thermal impedance, θJA (see Note 1): Q package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68°C/W
SO package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
Ambient temperature range with power applied, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 135°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 2)
CY54FCT377T
CY74FCT377T
MIN
NOM
MAX
MIN
NOM
MAX
4.5
5
5.5
4.75
5
5.25
UNIT
VCC
VIH
Supply voltage
VIL
IOH
Low-level input voltage
0.8
0.8
V
High-level output current
–12
–32
mA
IOL
TA
Low-level output current
32
64
mA
85
°C
High-level input voltage
2
Operating free-air temperature
–55
2
125
–40
V
V
NOTE 2: All unused inputs of the device must be held at VCC or GND to ensure proper device operation.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
CY54FCT377T, CY74FCT377T
8-BIT REGISTERS
SCCS023A – MAY 1994 – REVISED OCTOBER 2001
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
CY54FCT377T
TYP†
MAX
TEST CONDITIONS
VCC = 4.5 V,
VCC = 4.75 V,
IIN = –18 mA
IIN = –18 mA
VCC = 4.5 V,
IOH = –12 mA
IOH = –32 mA
VCC = 4
4.75
75 V
MIN
–0.7
–1.2
–0.7
2.4
2.4
Vhys
All inputs
II
VCC = 5.5 V,
VCC = 5.25 V,
VIN = VCC
VIN = VCC
5
IIH
VCC = 5.5 V,
VCC = 5.25 V,
VIN = 2.7 V
VIN = 2.7 V
±1
IIL
VCC = 5.5 V,
VCC = 5.25 V,
VIN = 0.5 V
VIN = 0.5 V
±1
IOS‡
VCC = 5.5 V,
VCC = 5.25 V,
VOUT = 0 V
VOUT = 0 V
VCC = 0 V,
VCC = 5.5 V,
VOUT = 4.5 V
VIN ≤ 0.2 V,
∆ICC
0.3
3.3
0.55
IOL = 64 mA
0.3
0.2
0.55
0.2
±1
±1
–120
–225
–60
–120
±1
VIN ≥ VCC – 0.2 V
VCC = 5.25 V,
VIN ≤ 0.2 V,
VIN ≥ VCC – 0.2 V
VCC = 5.5 V, VIN = 3.4 V§, f1 = 0, Outputs open
VCC = 5.25 V, VIN = 3.4 V§, f1 = 0, Outputs open
0.1
0.5
V
V
5
–60
V
V
2
IOH = –15 mA
IOL = 32 mA
VCC = 4.5 V,
VCC = 4.75 V,
ICC
–1.2
UNIT
3.3
VOL
Ioff
CY74FCT377T
TYP†
MAX
MIN
–225
±1
0.2
0.1
0.2
0.5
2
2
µA
µA
µA
mA
µA
mA
mA
† Typical values are at VCC = 5 V, TA = 25°C.
‡ Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus
and/or sample-and-hold techniques are preferable to minimize internal chip heating and more accurately reflect operational values. Otherwise,
prolonged shorting of a high output can raise the chip temperature well above normal and cause invalid readings in other parametric tests. In
any sequence of parameter tests, IOS tests should be performed last.
§ Per TTL-driven input (VIN = 3.4 V); all other inputs at VCC or GND
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
CY54FCT377T, CY74FCT377T
8-BIT REGISTERS
SCCS023A – MAY 1994 – REVISED OCTOBER 2001
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted) (continued)
PARAMETER
ICCD¶
CY54FCT377T
TYP†
MAX
TEST CONDITIONS
MIN
VCC = 5.5 V, Outputs open,
One bit switching at 50% duty cycle, CE = GND,
VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V
VCC = 5.25 V, Outputs open,
One bit switching at 50% duty cycle, CE = GND,
VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V
VCC = 5.5 V,
Outputs open,,
f0 = 10 MHz,
CE = GND
IC#
VCC = 5.25 V,
Outputs open,,
f0 = 10 MHz,
CE = GND
0.06
CY74FCT377T
TYP†
MAX
MIN
UNIT
0.12
mA/
MHz
0.06
0.12
One bit
switching at
f1 = 5 MHz at
50% duty cycle
VIN ≤ 0.2 V or
VIN ≥ VCC – 0.2 V
0.7
1.4
VIN = 3.4 V or GND
1.2
3.4
Eight bits
switching at
5 MHz at
f1 = 2
2.5
50% duty cycle
VIN ≤ 0.2 V or
VIN ≥ VCC – 0.2 V
1.6
3.2||
VIN = 3.4 V or GND
3.9
12.2||
One bit
switching at
f1 = 5 MHz at
50% duty cycle
VIN ≤ 0.2 V or
VIN ≥ VCC – 0.2 V
0.7
1.4
VIN = 3.4 V or GND
1.2
3.4
Eight bits
switching at
f1 = 2
2.5
5 MHz at
50% duty cycle
VIN ≤ 0.2 V or
VIN ≥ VCC – 0.2 V
1.6
3.2||
VIN = 3.4 V or GND
3.9
12.2||
mA
Ci
5
10
5
10
pF
Co
9
12
9
12
pF
† Typical values are at VCC = 5 V, TA = 25°C.
¶ This parameter is derived for use in total power-supply calculations.
# IC
= ICC + ∆ICC × DH × NT + ICCD (f0/2 + f1 × N1)
Where:
IC
= Total supply current
ICC = Power-supply current with CMOS input levels
∆ICC = Power-supply current for a TTL high input (VIN = 3.4 V)
DH
= Duty cycle for TTL inputs high
NT
= Number of TTL inputs at DH
ICCD = Dynamic current caused by an input transition pair (HLH or LHL)
f0
= Clock frequency for registered devices, otherwise zero
f1
= Input signal frequency
N1
= Number of inputs changing at f1
All currents are in milliamperes and all frequencies are in megahertz.
|| Values for these conditions are examples of the ICC formula.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
CY54FCT377T, CY74FCT377T
8-BIT REGISTERS
SCCS023A – MAY 1994 – REVISED OCTOBER 2001
timing requirements over recommended operating free-air temperature range (unless otherwise
noted) (see Figure 1)
CY54FCT377AT
CY54FCT377CT
MIN
Pulse duration, CP high or low†
tw
tsu
Setup time,
time high or low
th
time high or low
Hold time,
MAX
CY74FCT377T
CY74FCT377AT
CY74FCT377CT
MIN
7
6
2
2
CE before CP↑
3.5
3.5
Data after CP↑
1.5
1.5
CE after CP↑
1.5
1.5
Data before CP↑
UNIT
MAX
ns
ns
ns
† With one data channel switching, tw(L) = tw(H) = 4 ns and tr = tf = 1 ns.
switching characteristics over operating free-air temperature range (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
CP
O
CY54FCT377AT
CY54FCT377CT
MIN
MAX
MIN
MAX
2
8.3
2
5.5
2
8.3
2
5.5
UNIT
ns
switching characteristics over operating free-air temperature range (see Figure 1)
6
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
CP
O
POST OFFICE BOX 655303
CY74FCT377T
CY74FCT377AT
CY74FCT377CT
MIN
MAX
MIN
MAX
MIN
MAX
2
13
2
7.2
2
5.2
2
13
2
7.2
2
5.2
• DALLAS, TEXAS 75265
UNIT
ns
CY54FCT377T, CY74FCT377T
8-BIT REGISTERS
SCCS023A – MAY 1994 – REVISED OCTOBER 2001
PARAMETER MEASUREMENT INFORMATION
7V
From Output
Under Test
From Output
Under Test
Test
Point
CL = 50 pF
(see Note A)
Open
GND
CL = 50 pF
(see Note A)
500 Ω
S1
500 Ω
TEST
S1
Open
7V
Open
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
500 Ω
LOAD CIRCUIT FOR
3-STATE OUTPUTS
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
3V
Timing Input
tw
tsu
3V
1.5 V
Input
1.5 V
0V
th
3V
Data Input
0V
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
3V
1.5 V
Input
1.5 V
0V
tPLH
tPHL
1.5 V
1.5 V
VOL
tPHL
Out-of-Phase
Output
tPLZ
≈3.5 V
1.5 V
tPZH
VOH
1.5 V
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
1.5 V
0V
Output
Waveform 1
(see Note B)
tPLH
1.5 V
1.5 V
tPZL
VOH
In-Phase
Output
3V
Output
Control
Output
Waveform 2
(see Note B)
VOL + 0.3 V
VOL
tPHZ
1.5 V
VOH – 0.3 V
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2014
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
5962-9221902M2A
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
59629221902M2A
5962-9221903M2A
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
59629221903M2A
CY54FCT
377CTLMB
CY54FCT377CTLMB
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
59629221903M2A
CY54FCT
377CTLMB
CY74FCT377ATQCT
ACTIVE
SSOP
DBQ
20
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
FCT377A
CY74FCT377ATSOC
ACTIVE
SOIC
DW
20
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
FCT377A
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2014
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
18-Aug-2014
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
CY74FCT377ATQCT
Package Package Pins
Type Drawing
SSOP
DBQ
20
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
2500
330.0
16.4
Pack Materials-Page 1
6.5
B0
(mm)
K0
(mm)
P1
(mm)
9.0
2.1
8.0
W
Pin1
(mm) Quadrant
16.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
18-Aug-2014
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
CY74FCT377ATQCT
SSOP
DBQ
20
2500
367.0
367.0
38.0
Pack Materials-Page 2
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non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.
Products
Applications
Audio
www.ti.com/audio
Automotive and Transportation
www.ti.com/automotive
Amplifiers
amplifier.ti.com
Communications and Telecom
www.ti.com/communications
Data Converters
dataconverter.ti.com
Computers and Peripherals
www.ti.com/computers
DLP® Products
www.dlp.com
Consumer Electronics
www.ti.com/consumer-apps
DSP
dsp.ti.com
Energy and Lighting
www.ti.com/energy
Clocks and Timers
www.ti.com/clocks
Industrial
www.ti.com/industrial
Interface
interface.ti.com
Medical
www.ti.com/medical
Logic
logic.ti.com
Security
www.ti.com/security
Power Mgmt
power.ti.com
Space, Avionics and Defense
www.ti.com/space-avionics-defense
Microcontrollers
microcontroller.ti.com
Video and Imaging
www.ti.com/video
RFID
www.ti-rfid.com
OMAP Applications Processors
www.ti.com/omap
TI E2E Community
e2e.ti.com
Wireless Connectivity
www.ti.com/wirelessconnectivity
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