AD ADM1491EBRMZ 16 mbps, esd protected, full-duplex rs-485 transceiver Datasheet

16 Mbps, ESD Protected,
Full-Duplex RS-485 Transceivers
ADM1490E/ADM1491E
APPLICATIONS
RS-485/RS-422 interfaces
Industrial field networks
High data rate motor control
Multipoint data transmission systems
Single-ended-to-differential signal conversion
FUNCTIONAL BLOCK DIAGRAMS
VCC
ADM1490E
A
RO
R
B
Z
DI
D
Y
07430-001
RS-485/RS-422 full-duplex transceiver for high speed motor
control applications
16 Mbps data rate
±8 kV ESD protection on RS-485 input/output pins
Complies with ANSI/TIA/EIA-485-A-1998
Open circuit fail-safe
Suitable for 5 V power supply applications
32 nodes on the bus (1 unit load)
Thermal shutdown protection
Operating temperature range: −40°C to +85°C
ADM1490E packages
Narrow body, 8-lead SOIC
8-lead MSOP
ADM1491E packages
Narrow-body, 14-lead SOIC
10-lead MSOP
GND
Figure 1.
VCC
ADM1491E
A
RO
R
B
RE
DE
Z
DI
D
Y
GND
07430-002
FEATURES
Figure 2.
GENERAL DESCRIPTION
The ADM1490E/ADM1491E are RS-485/RS-422 transceivers
with ±8 kV ESD protection and are suitable for high speed, fullduplex communication on multipoint transmission lines. In
particular, the ADM1490E/ADM1491E are designed for use in
motor control applications requiring communications at data rates
up to 16 Mbps.
The ADM1490E/ADM1491E are designed for balanced transmission lines and comply with TIA/EIA-485-A-98. The devices
each have a 12 kΩ receiver input impedance for unit load RS485 operation, allowing up to 32 nodes on the bus.
The differential transmitter outputs and receiver inputs feature
electrostatic discharge circuitry that provides protection to ±8 kV
using the human body model (HBM).
The ADM1490E/ADM1491E operate from a single 5 V power
supply. Excessive power dissipation caused by bus contention or
output shorting is prevented by short-circuit protection and
thermal circuitry. Short-circuit protection circuits limit the
maximum output current to ±250 mA during fault conditions.
A thermal shutdown circuit senses if the die temperature rises
above 150°C and forces the driver outputs into a high impedance
state under this condition.
The receiver of the ADM1490E/ADM1491E contains a fail-safe
feature that results in a logic high output state if the inputs are
unconnected (floating).
The ADM1490E/ADM1491E feature extremely fast and closely
matched switching times. Minimal driver propagation delays
permit transmission at data rates up to 16 Mbps, and low skew
minimizes EMI interference.
The ADM1490E/ADM1491E are fully specified over the
commercial and industrial temperature ranges. The ADM1490E
is available in two packages: a narrow body, 8-lead SOIC and an
8-lead MSOP. The ADM1491E is also available in two packages:
a narrow body, 14-lead SOIC and a 10-lead MSOP.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2008–2009 Analog Devices, Inc. All rights reserved.
ADM1490E/ADM1491E
TABLE OF CONTENTS
Features .............................................................................................. 1
Typical Performance Characteristics ..............................................7
Applications ....................................................................................... 1
Test Circuits ........................................................................................9
Functional Block Diagrams ............................................................. 1
Theory of Operation ...................................................................... 10
General Description ......................................................................... 1
Truth Tables................................................................................. 10
Revision History ............................................................................... 2
ESD Transient Protection Scheme ........................................... 10
Specifications..................................................................................... 3
Applications Information .............................................................. 12
Timing Specifications .................................................................. 4
Differential Data ......................................................................... 12
Absolute Maximum Ratings............................................................ 5
Cable and Data Rate ................................................................... 12
Thermal Resistance ...................................................................... 5
Typical Applications ................................................................... 12
ESD Caution .................................................................................. 5
Outline Dimensions ....................................................................... 14
Pin Configurations and Function Descriptions ........................... 6
Ordering Guide .......................................................................... 15
REVISION HISTORY
7/09—Rev. A to Rev. B
Added ADM1490E, 8-Lead SOIC, and 8-Lead MSOP ....... Universal
Changes to Table 4 ..................................................................................... 5
Added Figure 8; Renumbered Sequentially .......................................... 6
Changes to Table 5 ..................................................................................... 6
Changes to Typical Applications Section ............................................ 12
Changes to Figure 28 ............................................................................... 12
Added Figure 29 ....................................................................................... 13
Updated Outline Dimensions ............................................................... 14
Changes to Ordering Guide................................................................... 15
2/09—Rev. 0 to Rev. A
Change to Table 9 ........................................................................... 11
12/08—Revision 0: Initial Version
Rev. B | Page 2 of 16
ADM1490E/ADM1491E
SPECIFICATIONS
4.75 V ≤ VCC ≤ 5.25 V; all minimum/maximum specifications apply over the entire recommended operation range, unless otherwise
noted. All typical specifications are at TA = 25°C, VCC = 5.0 V, unless otherwise noted.
Table 1.
Parameter
SUPPLY CURRENT
Outputs Enabled
Outputs Disabled
DRIVER
Differential Outputs
Differential Output Voltage, Loaded
∆|VOD| for Complementary Output States
Common-Mode Output Voltage
∆|VOC| for Complementary Output States
Output Leakage Current (Y, Z)
Output Short-Circuit Current
Logic Inputs DE, RE, DI
Input Low Voltage
Input High Voltage
Input Current
RECEIVER
Differential Inputs
Differential Input Threshold Voltage
Input Voltage Hysteresis
Input Current (A, B)
Line Input Resistance
Logic Outputs
Output Voltage Low
Output Voltage High
Short-Circuit Current
Three-State Output Leakage Current
Symbol
Min
ICC1
ICC2
|VOD2|
|VOD3|
∆|VOD2|
VOC
∆|VOC|
IO
IO
IOS
VIL
VIH
II
VTH
VHYS
II
Max
Unit
Test Conditions
1.2
0.8
2.0
1.5
mA
mA
Outputs unloaded, digital inputs = VCC or GND
Outputs unloaded, digital inputs = VCC or GND
5.0
5.0
5.0
0.2
3.0
0.2
100
V
V
V
V
V
V
μA
μA
mA
RL = 100 Ω (RS-422), see Figure 21
RL = 54 Ω (RS-485), see Figure 21
−7 V ≤ VTEST ≤ +12 V, see Figure 22
RL = 54 Ω or 100 Ω, see Figure 21
RL = 54 Ω or 100 Ω, see Figure 21
RL = 54 Ω or 100 Ω, see Figure 21
DE = 0 V, VDD = 0 V or 5 V, VIN = 12 V
DE = 0 V, VDD = 0 V or 5 V, VIN = −7 V
−7 V < VOUT < +12 V
V
V
μA
DE, RE, DI
DE, RE, DI
DE, RE, DI
V
mV
mA
mA
kΩ
−7 V < VCM < +12 V
VCM = 0 V
VCM = 12 V
VCM = −7 V
−7 V ≤ VCM ≤ +12 V
V
V
mA
μA
IOUT = +4.0 mA, VA − VB = −0.2 V
IOUT = −4.0 mA, VA − VB = +0.2 V
2.0
1.5
1.5
−100
250
0.8
2.0
−1
+1
−0.2
+0.2
30
1.0
RIN
−0.8
12
VOL
VOH
4.0
IOZR
Typ
30
0.4
85
±1
Rev. B | Page 3 of 16
VCC = 5.25 V, 0.4 V < VOUT < 2.4 V
ADM1490E/ADM1491E
TIMING SPECIFICATIONS
TA = −40°C to +85°C.
Table 2.
Parameter
DRIVER
Maximum Data Rate
Propagation Delay
Driver Output Skew
Symbol
Min
Typ
Max
Unit
tDPLH, tDPHL
tSKEW
11
0.5
17
2
Mbps
ns
ns
tDR, tDF
tZH, tZL
tHZ, tLZ
8
15
20
20
ns
ns
ns
RL = 54 Ω, CL = 100 pF, see Figure 23 and Figure 3
RL = 54 Ω, CL = 100 pF, see Figure 23 and Figure 3,
tSKEW = |tDPLH − tDPHL|
RL = 54 Ω, CL = 100 pF, see Figure 23 and Figure 3
RL = 110 Ω, CL = 50 pF, see Figure 24 and Figure 5
RL = 110 Ω, CL = 50 pF, see Figure 24 and Figure 5
tPLH, tPHL
tSKEW
tZH, tZL
tHZ, tLZ
12
0.4
20
2
13
13
ns
ns
ns
ns
CL = 15 pF, see Figure 25 and Figure 4
CL = 15 pF, see Figure 25 and Figure 4
RL = 1 kΩ, CL = 15 pF, see Figure 26 and Figure 6
RL = 1 kΩ, CL = 15 pF, see Figure 26 and Figure 6
16
Rise Time/Fall Time
Enable Time
Disable Time
RECEIVER
Propagation Delay
Skew |tPLH − tPHL|
Enable Time
Disable Time
Test Conditions
Timing Diagrams
Switching Characteristics
VCC
VCC
VCC/2
VCC/2
DE
0.5VCC
0.5VCC
0V
0V
tDPLH
tZL
tDPHL
tLZ
2.3V
Z
1/2VO
Y, Z
VO
VOL + 0.5V
VOL
tZH
Y
tHZ
2.3V
90% POINT
VDIFF
–VO
90% POINT
VDIFF = V(Y) – V(Z)
0V
10% POINT
10% POINT
tDR
tDF
07430-009
+VO
07430-011
VOH
VOH – 0.5V
Y, Z
Figure 5. Driver Enable/Disable Timing
Figure 3. Driver Propagation Delay Rise/Fall Timing
0.7VCC
A–B
0V
0V
RE
0.5VCC
0.5VCC
0.3VCC
tPHL
VOH
1.5V
tSKEW = |tPLH – tPHL|
1.5V
VOL
1.5V
RO
VOL + 0.5V
OUTPUT LOW
tZH
07430-010
RO
tLZ
VOL
tHZ
OUTPUT HIGH
RO
1.5V
VOH
VOH – 0.5V
0V
Figure 6. Receiver Enable/Disable Timing
Figure 4. Receiver Propagation Delay Timing
Rev. B | Page 4 of 16
07430-012
tPLH
tZL
ADM1490E/ADM1491E
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
THERMAL RESISTANCE
Table 3.
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Parameter
VCC to GND
Digital I/O Voltage (DE, RE)
Driver Input Voltage (DI)
Receiver Output Voltage (RO)
Driver Output/Receiver Input Voltage
(A, B, Y, Z)
Operating Temperature Range
Storage Temperature Range
ESD (HBM) on A, B, Y, and Z
Rating
−0.3 V to +7 V
−0.3 V to VCC + 0.3 V
−0.3 V to VCC + 0.3 V
−0.3 V to VCC + 0.3 V
−9 V to +14 V
−40°C to +85°C
−55°C to +150°C
±8 kV
Table 4. Thermal Resistance
Package Type
8-Lead SOIC
14-Lead SOIC
8-Lead MSOP
10-Lead MSOP
ESD CAUTION
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. B | Page 5 of 16
θJA
121
86
133
133
Unit
°C/W
°C/W
°C/W
°C/W
ADM1490E/ADM1491E
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
ADM1491E
ADM1490E
DI
GND
2
3
TOP VIEW
(Not to Scale)
4
7
6
5
A
1
B
Z
Y
12 A
ADM1491E
TOP VIEW
11 B
(Not to Scale)
10 Z
DI 5
RO 1
DE 3
GND 6
9
Y
GND 7
8
NC
NC = NO CONNECT
Figure 7. 8-Lead MSOP and 8-Lead SOIC
Pin Configuration
10 VCC
RE 2
07430-013
RO
8
1
13 VCC
RE 3
DE 4
07430-034
VCC
14 VCC
RO 2
Figure 8. 14-Lead, Narrow Body SOIC
Pin Configuration
DI 4
GND 5
TOP VIEW
(Not to Scale)
9
A
8
B
7
Z
6
Y
07430-015
NC 1
Figure 9. 10-Lead MSOP
Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
8-Lead SOIC,
8-Lead MSOP
N/A 1
2
N/A1
14-Lead SOIC
1
2
3
10-Lead MSOP
N/A1
1
2
Mnemonic
NC
RO
RE
N/A1
4
3
DE
3
5
4
DI
4
N/A1
N/A1
5
6
7
8
1
N/A1
6
7
8
9
10
11
12
13
14
5
N/A1
N/A1
6
7
8
9
10
N/A1
GND
GND
NC
Y
Z
B
A
VCC
VCC
1
Description
No Connect. This pin is available on the 14-lead SOIC only.
Receiver Output.
Receiver Output Enable. A low level enables the receiver output, whereas
a high level places the receiver output in a high impedance state.
Driver Output Enable. A logic high enables the differential driver outputs,
A and B, whereas a logic low places the differential driver outputs in a
high impedance state.
Driver Input. When the driver is enabled, a logic low on DI forces Pin A low
and Pin B high, whereas a logic high on DI forces Pin A high and Pin B low.
Ground.
Ground. This pin is available on the 14-lead SOIC only.
No Connect. This pin is available on the 14-lead SOIC only.
Noninverting Driver Output Y.
Inverting Driver Output Z.
Inverting Receiver Input B.
Noninverting Receiver Input A.
Power Supply (5 V ± 5%).
Power Supply (5 V ± 5%). This pin is available on the 14-lead SOIC only.
N/A indicates not applicable.
Rev. B | Page 6 of 16
ADM1490E/ADM1491E
35
0.50
30
0.45
OUTPUT VOLTAGE (V)
25
20
15
10
0.40
0.35
0.30
0.25
0.20
0
0
0.25
0.50
0.75
1.00
1.25
OUTPUT VOLTAGE (V)
1.50
1.75
2.00
07430-016
5
Figure 10. Output Current vs. Receiver Output Low Voltage
0.15
–50
–25
0
25
TEMPERATURE (°C)
75
50
85
07430-019
OUTPUT CURRENT (mA)
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 13. Receiver Output Low Voltage vs. Temperature (IOUT = 8 mA)
0
80
70
–5
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
60
–10
–15
–20
50
40
30
20
10
–25
4.00
4.25
4.50
OUTPUT VOLTAGE (V)
4.75
5.00
07430-017
3.75
–10
0
Figure 11. Output Current vs. Receiver Output High Voltage
0.5
1.0
1.5
2.0
2.5
3.0
OUTPUT VOLTAGE (V)
3.5
4.0
4.5
07430-020
0
–30
3.50
Figure 14. Output Current vs. Driver Differential Output Voltage
4.75
3.00
2.95
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
4.70
4.65
4.60
2.90
2.85
2.80
2.75
2.70
4.55
–25
0
25
TEMPERATURE (°C)
50
75
85
Figure 12. Receiver Output High Voltage vs. Temperature (IOUT = 8 mA)
2.60
–50
–25
0
25
TEMPERATURE (°C)
50
75
85
07430-021
4.50
–50
07430-018
2.65
Figure 15. Driver Differential Output Voltage vs. Temperature (RL = 56.3 Ω)
Rev. B | Page 7 of 16
ADM1490E/ADM1491E
80
1
60
50
40
30
3
20
07430-032
OUTPUT CURRENT (mA)
70
0
0
0.5
1.0
1.5
2.0
2.5
OUTPUT VOLTAGE (V)
3.0
3.5
4.0
07430-022
10
CH1 5V
CH3 2V
CH2 2V
M200ns
A CH1
1.6V
Figure 19. Unloaded Driver Differential Outputs
Figure 16. Output Current vs. Driver Output Low Voltage
0
OUTPUT CURRENT (mA)
–10
1
–20
–30
–40
–50
3
–60
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
OUTPUT VOLTAGE (V)
4.0
4.5
5.0
Figure 17. Output Current vs. Driver Output High Voltage
1.25
1.10
1.05
1.00
0.95
DRIVER DISABLED
0.85
0.80
–50
–25
0
25
TEMPERATURE (°C)
50
75
85
07430-024
OUTPUT CURRENT (mA)
DRIVER ENABLED
1.15
0.90
CH1 5V
CH3 2V
CH2 2V
M200ns
A CH1
Figure 20. Loaded Driver Differential Outputs
(RL Differential = 54 Ω, CL = 100 pF)
1.30
1.20
07430-033
–80
07430-023
–70
Figure 18. Output Current vs. Temperature
Rev. B | Page 8 of 16
1.6V
ADM1490E/ADM1491E
TEST CIRCUITS
Y
RL
2
VOD2
VOUT
Y
VOC
07430-003
DI
Figure 21. Driver Voltage Measurements
Y
Z
A
60Ω
375Ω V
TEST
Z
07430-004
B
Figure 22. Driver Voltage Measurements
VOUT
RE
CL
Figure 25. Receiver Propagation Delay
+1.5V
Y
CL
RL
–1.5V
RE
RL
Z
CL
07430-005
DI
VCC
S1
S2
CL
VOUT
RE
Figure 23. Driver Propagation Delay
Figure 26. Receiver Enable/Disable Timing
Rev. B | Page 9 of 16
07430-008
VOD3
S2
CL
50pF
Figure 24. Driver Enable/Disable Timing
375Ω
DI
S1
DE
VCC
RL
110Ω
07430-006
RL
2
Z
07430-007
DI
ADM1490E/ADM1491E
THEORY OF OPERATION
The ADM1490E/ADM1491E are RS-422/RS-485 transceivers that
operate from a single 5 V ± 5% power supply. The ADM1490E/
ADM1491E are intended for balanced data transmission and
comply with both TIA/EIA-485-A and TIA/EIA-422-B. Each
device contains a differential line driver and a differential line
receiver and is suitable for full-duplex data transmission.
ESD TRANSIENT PROTECTION SCHEME
The input impedance of the ADM1490E/ADM1491E is 12 kΩ,
allowing up to 32 transceivers on the differential bus. A thermal
shutdown circuit prevents excessive power dissipation caused by
bus contention or by output shorting. This feature forces the driver
output into a high impedance state if, during fault conditions, a
significant temperature increase is detected in the internal
driver circuitry.
ESD Testing
The ADM1490E/ADM1491E feature very low propagation
delay, ensuring maximum baud rate operation. The balanced
driver ensures distortion-free transmission.
Another important specification is a measure of the skew
between the complementary outputs. Excessive skew impairs
the noise immunity of the system and increases the amount
of electromagnetic interference (EMI).
TRUTH TABLES
Table 6. Abbreviations in Truth Tables
Letter
H
I
L
X
Z
Description
High level
Indeterminate
Low level
Irrelevant
High impedance (off )
Two coupling methods are used for ESD testing: contact discharge and air gap discharge. Contact discharge calls for a direct
connection to the unit being tested; air gap discharge uses a higher
test voltage but does not make direct contact with the unit under
test. With air discharge, the discharge gun is moved toward the
unit under test, developing an arc across the air gap; therefore,
the term air discharge. This method is influenced by humidity,
temperature, barometric pressure, distance, and rate of closure
of the discharge gun. The contact discharge method, though
less realistic, is more repeatable and is gaining acceptance and
preference over the air gap method.
Although very little energy is contained within an ESD pulse,
the extremely fast rise time, coupled with high voltages, can cause
failures in unprotected semiconductors. Catastrophic destruction
can occur immediately because of arcing or heating. Even if catastrophic failure does not occur immediately, the device can suffer
from parametric degradation, resulting in degraded performance.
The cumulative effects of continuous exposure can eventually
lead to complete failure.
HIGH
VOLTAGE
GENERATOR
C1
DE
H
H
L
Z
L
H
Z
DEVICE
UNDER TEST
NOTES
1. THE ESD TEST METHOD USED IS THE
HUMAN BODY MODEL (±8kV) WITH
R2 = 1500Ω AND C1 = 100pF.
Table 7. Transmitting
Inputs
DI
H
L
X
R2
Figure 27. ESD Generator
Outputs
Y
H
L
Z
I/O lines are particularly vulnerable to ESD damage. Simply
touching or plugging in an I/O cable may result in a static discharge that can damage or destroy the interface product connected
to the I/O port. It is, therefore, extremely important to have high
levels of ESD protection on the I/O lines.
Table 8. Receiving
RE
Inputs
A−B
RO
L
L
L
L
H
≥ +0.2 V
≤ −0.2 V
−0.2 V ≤ A − B ≤ +0.2 V
Inputs open
X
H
L
I
H
Z
07430-025
The receiver contains a fail-safe feature that results in a logic
high output state if the inputs are unconnected (floating).
The ADM1490E/ADM1491E use protective clamping
structures on their inputs and outputs to clamp the voltage to a
safe level and dissipate the energy present in ESD (electrostatic).
The protection structure achieves ESD protection up to ±8 kV
human body model (HBM).
Output
The ESD discharge can induce latch-up in the device under test.
Therefore, it is important to conduct ESD testing on the I/O pins
while power is applied to the device. This type of testing is more
representative of a real-world I/O discharge in which the equipment is operating normally when the discharge occurs.
Rev. B | Page 10 of 16
ADM1490E/ADM1491E
100%
IPEAK
90%
36.8%
tRL
TIME (t)
tDL
07430-026
10%
Figure 28. Human Body Model ESD Current Waveform
Table 9. ADM1490E/ADM1491E ESD Test Results
ESD Test Method
Human Body Model
Input/Output Pins
±8 kV
Rev. B | Page 11 of 16
Other Pins
±4 kV
ADM1490E/ADM1491E
APPLICATIONS INFORMATION
DIFFERENTIAL DATA
CABLE AND DATA RATE
Differential data transmission reliably transmits data at high
rates over long distances and through noisy environments.
Differential transmission nullifies the effects of ground shifts
and noise signals that appear as common-mode voltages on the
line. There are two main standards approved by the Electronics
Industries Association (EIA) that specify the electrical characteristics of transceivers used in differential data transmission.
Twisted pair is the transmission line of choice for RS-485
communications. Twisted pair cable tends to cancel commonmode noise and causes cancellation of the magnetic fields
generated by the current flowing through each wire, thereby
reducing the effective inductance of the pair.
The RS-422 standard specifies data rates of up to 10 MBaud and
line lengths of up to 4000 feet. A single driver can drive a transmission line with as many as 10 receivers.
The RS-485 standard addresses true multipoint communications.
This standard meets or exceeds all of the requirements of RS-422,
and it allows as many as 32 drivers and 32 receivers to connect
to a single bus. An extended common-mode range of −7 V to
+12 V is defined. The most significant difference between the
RS-422 and the RS-485 is that the drivers with RS-485 can be
disabled, allowing more than one driver to be connected to a
single line, with as many as 32 drivers connected to a single line.
Only one driver should be enabled at a time, but the RS-485
standard contains additional specifications to guarantee device
safety in the event of line contention.
An RS-485 transmission line can have as many as 32 transceivers on the bus. Only one driver can transmit at a time, but
multiple receivers may be enabled simultaneously.
As with any transmission line, it is important to minimize
reflections. This can be achieved by terminating the extreme
ends of the line using resistors equal to the characteristic
impedance of the line. Keep stub lengths of the main line as
short as possible. A properly terminated transmission line
appears purely resistive to the driver.
TYPICAL APPLICATIONS
Figure 29 shows a typical configuration for a full-duplex pointto-point application using the ADM1490E. Figure 30 shows a
typical configuration for a full-duplex multipoint application
using the ADM1491E. To minimize reflections, the lines must
be terminated at the receiving end in its characteristic impedance,
and stub lengths off the main line must be kept as short as possible.
VCC
VCC
VCC
ADM1490E
A
R
RO
B
Y
ADM1490E
D
RT
DI
Z
VCC
Z
D
RT
Y
GND
A
R
GND
NOTES
1. MAXIMUM NUMBER OF NODES = 32.
Figure 29. Typical Point-to-Point Full-Duplex Application
Rev. B | Page 12 of 16
RO
07430-027
DI
B
ADM1490E/ADM1491E
MAXIMUM NUMBER OF NODES = 32
VCC
MASTER
SLAVE
A
R
B
D
RT
RE
DI
DE
VCC
Z
DE
D
DI
Z
B
RT
Y
A
ADM1491E
RE
R
RO
ADM1491E
A
B
Z
Y
A
B
Z
Y
SLAVE
SLAVE
ADM1491E
R
ADM1491E
R
D
RO
RE
DE
D
DI
RO
RE
DE
NOTES
1. RT IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE.
Figure 30. Typical RS-485 Full-Duplex Application
Rev. B | Page 13 of 16
DI
07430-028
RO
Y
ADM1490E/ADM1491E
OUTLINE DIMENSIONS
8.75 (0.3445)
8.55 (0.3366)
8
14
1
7
6.20 (0.2441)
5.80 (0.2283)
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0039)
COPLANARITY
0.10
0.50 (0.0197)
0.25 (0.0098)
1.75 (0.0689)
1.35 (0.0531)
SEATING
PLANE
0.51 (0.0201)
0.31 (0.0122)
8°
0°
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012-AB
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 31. 14-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-14)
Dimensions shown in millimeters and (inches)
3.10
3.00
2.90
10
3.10
3.00
2.90
1
6
5.15
4.90
4.65
5
PIN 1
0.50 BSC
0.95
0.85
0.75
0.15
0.05
1.10 MAX
0.33
0.17
SEATING
PLANE
45°
0.23
0.08
8°
0°
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187-BA
Figure 32. 10-Lead Mini Small Outline Package [MSOP]
(RM-10)
Dimensions shown in millimeters
Rev. B | Page 14 of 16
0.80
0.60
0.40
060606-A
4.00 (0.1575)
3.80 (0.1496)
ADM1490E/ADM1491E
5.00 (0.1968)
4.80 (0.1890)
5
1
6.20 (0.2441)
5.80 (0.2284)
4
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0040)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
SEATING
PLANE
0.50 (0.0196)
0.25 (0.0099)
1.75 (0.0688)
1.35 (0.0532)
45°
8°
0°
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012-A A
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
012407-A
8
4.00 (0.1574)
3.80 (0.1497)
Figure 33. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
3.20
3.00
2.80
8
3.20
3.00
2.80
5
1
5.15
4.90
4.65
4
PIN 1
0.65 BSC
0.95
0.85
0.75
1.10 MAX
0.15
0.00
0.38
0.22
COPLANARITY
0.10
0.23
0.08
8°
0°
0.80
0.60
0.40
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 34. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
ORDERING GUIDE
Model
ADM1490EBRZ 1
ADM1490EBRZ-REEL71
ADM1490EBRMZ1
ADM1490EBRMZ-REEL71
ADM1491EBRZ1
ADM1491EBRZ-REEL71
ADM1491EBRMZ1
ADM1491EBRMZ-REEL71
1
Temperature
Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Package Description
8-Lead Standard Small Outline Package, Narrow Body [SOIC_N]
8-Lead Standard Small Outline Package, Narrow Body [SOIC_N]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
14-Lead Standard Small Outline Package, Narrow Body [SOIC_N]
14-Lead Standard Small Outline Package, Narrow Body [SOIC_N]
10-Lead Mini Small Outline Package [MSOP]
10-Lead Mini Small Outline Package [MSOP]
Z = RoHS Compliant Part.
Rev. B | Page 15 of 16
Package
Option
R-8
R-8
RM-8
RM-8
R-14
R-14
RM-10
RM-10
Branding
F0E
F0E
F0D
F0D
ADM1490E/ADM1491E
NOTES
©2008–2009 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D07430-0-7/09(B)
Rev. B | Page 16 of 16
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