ATMEL AT24C01-10MI-2.7 2-wire serial eeprom Datasheet

Features
• Low Voltage and Standard Voltage Operation
•
•
•
•
•
•
•
•
•
– 5.0 (VCC = 4.5V to 5.5V)
– 2.7 (VCC = 2.7V to 5.5V)
– 2.5 (VCC = 2.5V to 5.5V)
– 1.8 (VCC = 1.8V to 5.5V)
Internally Organized 128 x 8
2-Wire Serial Interface
Bidirectional Data Transfer Protocol
100 kHz (1.8V, 2.5V, 2.7V) and 400 kHz (5V) Compatibility
4-Byte Page Write Mode
Self-Timed Write Cycle (10 ms max)
High Reliability
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
– ESD Protection: >3000V
Automotive Grade and Extended Temperature Devices Available
8-Pin PDIP, 8-Pin MSOP, 8-Pin TSSOP and 8-Pin JEDEC SOIC Packages
2-Wire Serial
EEPROM
1K (128 x 8)
AT24C01
Description
The AT24C01 provides 1024 bits of serial electrically erasable and programmable
read only memory (EEPROM) organized as 128 words of 8 bits each. The device is
optimized for use in many industrial and commercial applications where low power
and low voltage operation are essential. The AT24C01 is available in space saving
8-pin PDIP, 8-pin MSOP, 8-pin TSSOP, and 8-pin JEDEC SOIC packages and is
accessed via a 2-wire serial interface. In addition, the entire family is available in 5.0V
(4.5V to 5.5V), 2.7V (2.7V to 5.5V), 2.5V (2.5V to 5.5V) and 1.8V (1.8V to 5.5V) versions.
8-Pin MSOP
8-Pin TSSOP
Pin Configurations
Pin Name
Function
NC
No Connect
SDA
Serial Data
SCL
Serial Clock Input
Test
Test Input (GND or VCC)
NC
NC
NC
GND
8-Pin PDIP
NC
NC
NC
GND
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
VCC
TEST
SCL
SDA
2-Wire, 1K
Serial EEPROM
8-Pin SOIC
VCC
TEST
SCL
SDA
NC
NC
NC
GND
1
2
3
4
8
7
6
5
VCC
TEST
SCL
SDA
Rev. 0134C–07/98
1
Absolute Maximum Ratings*
Operating Temperature .................................. -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
Voltage on Any Pin
with Respect to Ground .....................................-1.0V to +7.0V
Maximum Operating Voltage........................................... 6.25V
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability.
DC Output Current........................................................ 5.0 mA
Block Diagram
Pin Description
Memory Organization
SERIAL CLOCK (SCL): The SCL input is used to positive
edge clock data into each EEPROM device and negative
edge clock data out of each device.
SERIAL DATA (SDA): The SDA pin is bidirectional for
serial data transfer. This pin is open-drain driven and may
be wire-ORed with any number of other open-drain or open
collector devices.
AT24C01, 1K SERIAL EEPROM: Internally organized with
128 pages of 1 byte each. The 1K requires a 7-bit data
word address for random word addressing.
2
AT24C01
AT24C01
Pin Capacitance
Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +1.8V.
Symbol
Test Condition
Max
Units
Condition
CI/O
Input/Output Capacitance (SDA)
8
pF
VI/O = 0V
CIN
Input Capacitance (A0, A1, A2, SCL)
6
pF
VIN = 0V
DC Characteristics
Applicable over recommended operating range from: TAI = -40°C to +85°C, VCC = +1.8V to +5.5V, TAC = 0°C to +70°C,
VCC = +1.8V to +5.5V (unless otherwise noted).
Symbol
Parameter
VCC1
Supply Voltage
VCC2
Test Condition
Max
Units
1.8
5.5
V
Supply Voltage
2.5
5.5
V
VCC3
Supply Voltage
2.7
5.5
V
VCC4
Supply Voltage
4.5
5.5
V
ICC
Supply Current VCC = 5.0V
READ at 100 KHz
0.4
1.0
mA
ICC
Supply Current VCC = 5.0V
WRITE at 100 KHz
2.0
3.0
mA
ISB1
Standby Current VCC = 1.8V
VIN = VCC or VSS
0.6
3.0
µA
ISB2
Standby Current VCC = 2.5V
VIN = VCC or VSS
1.4
4.0
µA
ISB3
Standby Current VCC = 2.7V
VIN = VCC or VSS
1.6
4.0
µA
ISB4
Standby Current VCC = 5.0V
VIN = VCC or VSS
8.0
18.0
µA
ILI
Input Leakage Current
VIN = VCC or VSS
0.10
3.0
µA
ILO
Output Leakage Current
VOUT = VCC or VSS
0.05
3.0
µA
VIL
Input Low Level(1)
-0.6
VCC × 0.3
V
VCC × 0.7
VCC + 0.5
V
(1)
Min
Typ
VIH
Input High Level
VOL2
Output Low Level VCC = 3.0V
IOL = 2.1 mA
0.4
V
VOL1
Output Low Level VCC = 1.8V
IOL = 0.15 mA
0.2
V
Note:
1. VIL min and VIH max are reference only and are not tested.
3
AC Characteristics
Applicable over recommended operating range from TA = -40°C to +85°C, VCC = +1.8V to +5.5V, CL = 1 TTL Gate and
100 pF (unless otherwise noted).
2.7-, 2.5-, 1.8-volt
Symbol
Parameter
fSCL
Clock Frequency, SCL
tLOW
Clock Pulse Width Low
tHIGH
Clock Pulse Width High
Min
Max
5.0-volt
Min
100
Max
Units
400
KHz
4.7
1.2
µs
4.0
0.6
µs
(1)
tI
Noise Suppression Time
tAA
Clock Low to Data Out Valid
0.1
tBUF
Time the bus must be free before a new
transmission can start(1)
4.7
1.2
µs
tHD.STA
Start Hold Time
4.0
0.6
µs
tSU.STA
Start Set-up Time
4.7
0.6
µs
tHD.DAT
Data In Hold Time
0
0
µs
tSU.DAT
Data In Set-up Time
200
100
ns
tR
Inputs Rise Time(1)
1.0
0.3
µs
tF
Inputs Fall Time(1)
300
300
ns
tSU.STO
Stop Set-up Time
4.7
0.6
µs
tDH
Data Out Hold Time
100
50
ns
tWR
Write Cycle Time
Endurance(1)
5.0V, 25°C, Page Mode
Note:
100
4.5
0.1
10
1M
50
ns
0.9
µs
10
1M
ms
Write
Cycles
1. This parameter is characterized and is not 100% tested.
Device Operation
CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an external device. Data on the SDA
pin may change only during SCL low time periods (refer to
Data Validity timing diagram). Data changes during SCL
high periods will indicate a start or stop condition as
defined below.
START CONDITION: A high-to-low transition of SDA with
SCL high is a start condition which must precede any other
command (refer to Start and Stop Definition timing diagram).
STOP CONDITION: A low-to-high transition of SDA with
SCL high is a stop condition which terminates all communications. After a read sequence, the stop command will
place the EEPROM in a standby power mode (refer to Start
and Stop Definition timing diagram).
ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words.
Any device on the system bus receiving data (when com-
4
AT24C01
municating with the EEPROM) must pull the SDA bus low
to acknowledge that it has successfully received each
word. This must happen during the ninth clock cycle after
each word received and after all other system devices have
freed the SDA bus. The EEPROM will likewise acknowledge by pulling SDA low after receiving each address or
data word (refer to Acknowledge Response from Receiver
timing diagram).
STANDBY MODE: The AT24C01 features a low power
standby mode which is enabled: (a) upon power-up and (b)
after the receipt of the STOP bit and the completion of any
internal operations.
MEMORY RESET: After an interruption in protocol, power
loss or system reset, any 2-wire part can be reset by following these steps:
(a) Clock up to 9 cycles, (b) look for SDA high in each cycle
while SCL is high and then (c) create a start condition as
SDA is high.
AT24C01
Bus Timing
SCL: Serial Clock, SDA: Serial Data I/O
Write Cycle Timing
SCL: Serial Clock, SDA: Serial Data I/O
SCL
SDA
8th BIT
ACK
WORD n
(1)
tWR
STOP
CONDITION
Note:
1.
START
CONDITION
The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the internal clear/write
cycle.
5
Data Validity
Start and Stop Definition
Output Acknowledge
6
AT24C01
AT24C01
Write Operations
Read Operations
BYTE WRITE: Following a start condition, a write operation
requires a 7-bit data word address and a low write bit. Upon
receipt of this address, the EEPROM will again respond
with a zero and then clock in the first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will outp ut a z e r o an d t h e a d dr e s s i n g d e v i c e, s uc h a s a
microcontroller, must terminate the write sequence with a
stop condition. At this time the EEPROM enters an internally-timed write cycle to the nonvolatile memory. All inputs
are disabled during this write cycle , tWR, and the EEPROM
will not respond until the write is complete (refer to Figure
1).
PAGE WRITE: The AT24C01 is capable of a 4-byte page
write.
A page write is initiated the same as a byte write but the
microcontroller does not send a stop condition after the first
data word is clocked in. Instead, after the EEPROM
acknowledges receipt of the first data word, the microcontroller can transmit up to three more data words. The
EEPROM will respond with a zero after each data word
received. The microcontroller must terminate the page
write sequence with a stop condition (refer to Figure 2).
The data word address lower 2 bits are internally incremented following the receipt of each data word. The higher
five data word address bits are not incremented, retaining
the memory page row location. When the word address,
internally generated, reaches the page boundary, the following byte is placed at the beginning of the same page. If
more than four data words are transmitted to the EEPROM,
the data word address will “roll over” and previous data will
be overwritten.
ACKNOWLEDGE POLLING: Once the internally-timed
write cycle has started and the EEPROM inputs are disabled, acknowledge polling can be initiated. This involves
sending a start condition followed by the device address
word. The read/write bit is representative of the operation
desired. Only if the internal write cycle has completed will
the EEPROM respond with a zero allowing the read or
write sequence to continue.
Read operations are initiated the same way as write operations with the exception that the read/write select bit in the
device address word is set to one. There are two read
operations: byte read and sequential read.
BYTE READ: A byte read is initiated with a start condition
followed by a 7-bit data word address and a high read bit.
The AT24C01 will respond with an acknowledge and then
serially output 8 data bits. The microcontroller does not
respond with a zero but does generate a following stop
condition (refer to Figure 3).
SEQUENTIAL READ: Sequential reads are initiated the
same as a byte read. After the microcontroller receives an
8-bit data word, it responds with an acknowledge. As long
as the EEPROM receives an acknowledge, it will continue
to increment the data word address and serially clock out
sequential data words. When the memory address limit is
reached, the data word address will “roll over” and the
sequential read will continue. The sequential read operation is terminated when the microcontroller does not
respond with an input zero but does generate a following
stop condition (refer to Figure 4).
Figure 1. Byte Write
7
Figure 2. Page Write
Figure 3. Byte Read
Figure 4. Sequential Read
8
AT24C01
AT24C01
Ordering Information
tWR (max)
(ms)
ICC (max)
(µA)
ISB (max)
(µA)
fMAX
(kHz)
10
3000
18
3000
10
10
10
Ordering Code
Package
Operation Range
400
AT24C01-10PC
AT24C01-10SC
AT24C01-10MC
AT24C01-10TC
8P3
8S1
8M
8T
Commercial
(0°C to 70°C)
18
400
AT24C01-10PI
AT24C01-10SI
AT24C01-10MI
AT24C01-10TI
8P3
8S1
8M
8T
Industrial
(-40°C to 85°C)
1500
4
100
AT24C01-10PC-2.7
AT24C01-10SC-2.7
AT24C01-10MC-2.7
AT24C01-10TC-2.7
8P3
8S1
8M
8T
Commercial
(0°C to 70°C)
1500
4
100
AT24C01-10PI-2.7
AT24C01-10SI-2.7
AT24C01-10MI-2.7
AT24C01-10TI-2.7
8P3
8S1
8M
8T
Industrial
(-40°C to 85°C)
1000
4
100
AT24C01-10PC-2.5
AT24C01-10SC-2.5
AT24C01-10MC-2.5
AT24C01-10TC-2.5
8P3
8S1
8M
8T
Commercial
(0°C to 70°C)
1000
4
100
AT24C01-10PI-2.5
AT24C01-10SI-2.5
AT24C01-10MI-2.5
AT24C01-10TI-2.5
8P3
8S1
8M
8T
Industrial
(-40°C to 85°C)
800
3
100
AT24C01-10PC-1.8
AT24C01-10SC-1.8
AT24C01-10MC-1.8
AT24C01-10TC-1.8
8P3
8S1
8M
8T
Commercial
(0°C to 70°C)
800
3
100
AT24C01-10PI-1.8
AT24C01-10SI-1.8
AT24C01-10MI-1.8
AT24C01-10TI-1.8
8P3
8S1
8M
8T
Industrial
(-40°C to 85°C)
Package Type
8M
8-Lead, 0.118” Wide, Miniature Small Outline Package (MSOP)
8P3
8-Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)
8S1
8-Lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC)
8T
8-Lead, 0.170” Wide, Thin Shrink Small Outline Package (TSSOP)
Options
Blank
Standard Operation (4.5V to 5.5V)
-2.7
Low-Voltage (2.7V to 5.5V)
-2.5
Low-Voltage (2.5V to 5.5V)
-1.8
Low-Voltage (1.8V to 5.5V)
9
Packaging Information
8M, 8-Lead, 0.118” Wide, Miniature Small Outline
Package (MSOP)
8P3, 8-Lead, 0.300” Wide, Plastic Dual Inline
Package (PDIP)
Dimensions in Inches and (Millimeters)
JEDEC STANDARD MS-001 BA
.400 (10.16)
.355 (9.02)
0.40 (0.016)
0.25 (0.010)
PIN
1
3.10 (0.122)
2.90 (0.114)
.280 (7.11)
.240 (6.10)
PIN 1
0.65 (0.026) TYP
.037 (.940)
.027 (.690)
.300 (7.62) REF
.210 (5.33) MAX
3.10 (0.122)
2.90 (0.114)
1.10 (0.043)
0.97 (0.038)
.100 (2.54) BSC
SEATING
PLANE
.015 (.380) MIN
.150 (3.81)
.115 (2.92)
0.15 (0.006)
0.05 (0.002)
.022 (.559)
.014 (.356)
.070 (1.78)
.045 (1.14)
0.23 (0.009)
0.13 (0.005)
3.81
(0.150)
REF
.325 (8.26)
.300 (7.62)
0
REF
15
.012 (.305)
.008 (.203)
4.90 (0.193)
REF
.430 (10.9) MAX
8S1, 8-Lead, 0.150” Wide, Plastic Gull Wing Small
Outline (JEDEC SOIC)
Dimensions in Inches and (Millimeters)
8T, 8-Lead 0.170” Wide, Thin Shrink Small Outline
Package (TSSOP)
Dimensions in Millimeters and (Inches)*
PIN 1
.020 (.508)
.013 (.330)
6.50 (.256)
6.25 (.246)
.157 (3.99)
.150 (3.81)
PIN 1
.244 (6.20)
.228 (5.79)
0.30 (.012)
0.19 (.008)
.050 (1.27) BSC
.196 (4.98)
.189 (4.80)
.068 (1.73)
.053 (1.35)
3.10 (.122)
2.90 (.114)
1.05 (.041)
0.80 (.033)
.65 (.026) BSC
.010 (.254)
.004 (.102)
0
REF
8
0.15 (.006)
0.05 (.002)
4.5 (.177)
4.3 (.169)
0.20 (.008)
0.09 (.004)
.010 (.254)
.007 (.203)
0 REF
8
.050 (1.27)
.016 (.406)
10
1.20 (.047) MAX
0.75 (.030)
0.45 (.018)
*Controlling dimension: millimeters
AT24C01
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