AD AD829JCHIPS High-speed, low-noise video op amp Datasheet

FEATURES
High Speed
120 MHz Bandwidth, Gain = –1
230 V/␮s Slew Rate
90 ns Settling Time to 0.1%
Ideal for Video Applications
0.02% Differential Gain
0.04ⴗ Differential Phase
Low Noise
1.7 nV/√Hz Input Voltage Noise
1.5 pA/√Hz Input Current Noise
Excellent DC Precision
1 mV max Input Offset Voltage (Over Temp)
0.3 ␮V/ⴗC Input Offset Drift
Flexible Operation
Specified for ⴞ5 V to ⴞ15 V Operation
ⴞ3 V Output Swing into a 150 ⍀ Load
External Compensation for Gains 1 to 20
5 mA Supply Current
Available in Tape and Reel in Accordance with
EIA-481A Standard
CONNECTION DIAGRAMS
8-Lead Plastic Mini-DIP (N),
Cerdip (Q) and SOIC (R) Packages
OFFSET NULL 1
8
OFFSET NULL
–IN 2
7
+VS
+IN 3
6
OUTPUT
AD829
TOP VIEW 5 CCOMP
(Not to Scale)
–VS 4
20-Lead LCC Pinout
NC
OFFSET
NULL
NC
OFFSET
NULL
NC
a
High-Speed, Low-Noise
Video Op Amp
AD829
3
2
1 20 19
18 NC
NC 4
17 +V
–IN 5
AD829
NC 6
TOP VIEW
(Not to Scale)
+IN 7
16 NC
15 OUTPUT
14 NC
NC 8
PRODUCT DESCRIPTION
The AD829’s external compensation pin gives it exceptional
versatility. For example, compensation can be selected to optimize the bandwidth for a given load and power supply voltage.
As a gain-of-two line driver, the –3 dB bandwidth can be increased to 95 MHz at the expense of 1 dB of peaking. In addition, the AD829’s output can also be clamped at its external
compensation pin.
The AD829 has excellent dc performance. It offers a minimum
open-loop gain of 30 V/mV into loads as low as 500 Ω, low
input voltage noise of 1.7 nV/√Hz, and a low input offset voltage of 1 mV maximum. Common-mode rejection and power
supply rejection ratios are both 120 dB.
The AD829 is also useful in multichannel, high speed data
conversion where its fast (90 ns to 0.1%) settling time is of
importance. In such applications, the AD829 serves as an input
buffer for 8-to-10-bit A/D converters and as an output I/V converter for high speed D/A converters.
NC = NO CONNECT
NC
NC
CCOMP
–V
9 10 11 12 13
NC
The AD829 is a low noise (1.7 nV/√Hz), high speed op amp
with custom compensation that provides the user with gains
from ± 1 to ± 20 while maintaining a bandwidth greater than
50 MHz. The AD829’s 0.04° differential phase and 0.02%
differential gain performance at 3.58 MHz and 4.43 MHz,
driving reverse-terminated 50 Ω or 75 Ω cables, makes it ideally
suited for professional video applications. The AD829 achieves
its 230 V/µs uncompensated slew rate and 750 MHz gain bandwidth product while requiring only 5 mA of current from the
power supplies.
The AD829 provides many of the same advantages that a transimpedance amplifier offers, while operating as a traditional
voltage feedback amplifier. A bandwidth greater than 50 MHz
can be maintained for a range of gains by changing the external
compensation capacitor. The AD829 and the transimpedance
amplifier are both unity gain stable and provide similar voltage
noise performance (1.7 nV/√Hz). However, the current noise of
the AD829 (1.5 pA/√Hz) is less than 10% of the noise of transimpedance amps. Furthermore, the inputs of the AD829 are
symmetrical.
PRODUCT HIGHLIGHTS
1. Input voltage noise of 2 nV/√Hz, current noise of 1.5 pA/
√Hz and 50 MHz bandwidth, for gains of 1 to 20, make the
AD829 an ideal preamp.
2. Differential phase error of 0.04° and a 0.02% differential
gain error, at the 3.58 MHz NTSC and 4.43 MHz PAL and
SECAM color subcarrier frequencies, make it an outstanding
video performer for driving reverse-terminated 50 Ω and
75 Ω cables to ± 1 V (at their terminated end).
3. The AD829 can drive heavy capacitive loads.
4. Performance is fully specified for operation from ± 5 V to
± 15 V supplies.
5. Available in plastic, cerdip, and small outline packages.
Chips and MIL-STD-883B parts are also available.
REV. E
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000
AD829–SPECIFICATIONS (@ T = +25ⴗC and V = ⴞ15 V dc, unless otherwise noted)
A
Model
Conditions
INPUT OFFSET VOLTAGE
TMIN to TMAX
Offset Voltage Drift
INPUT BIAS CURRENT
S
VS
Min
AD829J/AR
Typ
Max
± 5 V, ± 15 V
0.2
± 5 V, ± 15 V
0.3
± 5 V, ± 15 V
3.3
7
8.2/9.5
± 5 V, ± 15 V
50
500
500
± 5 V, ± 15 V
0.5
TMIN to TMAX
INPUT OFFSET CURRENT
TMIN to TMAX
Offset Current Drift
VO = ± 2.5 V
RLOAD = 500 Ω
TMIN to TMAX
RLOAD = 150 Ω
VOUT = ± 10 V
RLOAD = 1 kΩ
TMIN to TMAX
RLOAD = 500 Ω
OPEN-LOOP GAIN
DYNAMIC PERFORMANCE
Gain Bandwidth Product
Full Power Bandwidth1, 2
VO = 2 V p-p
RLOAD = 500 Ω
VO = 20 V p-p
RLOAD = 1 kΩ
RLOAD = 500 Ω
RLOAD = 1 kΩ
AV = –19
–2.5 V to +2.5 V
10 V Step
CLOAD = 10 pF
RLOAD = 1 kΩ
Slew Rate2
Settling Time to 0.1%
Phase Margin2
Min
1
1
AD829AQ/S
Typ
Max
0.1
Units
0.5
0.5
mV
mV
µV/°C
3.3
7
9.5
µA
µA
50
500
500
nA
nA
nA/°C
0.3
0.5
±5 V
30
20
65
30
20
40
65
V/mV
V/mV
V/mV
40
± 15 V
50
20
100
50
20
100
85
85
V/mV
V/mV
V/mV
±5 V
± 15 V
600
750
600
750
MHz
MHz
±5 V
25
25
MHz
± 15 V
±5 V
± 15 V
3.6
150
230
3.6
150
230
MHz
V/µs
V/µs
±5 V
± 15 V
± 15 V
65
90
65
90
ns
ns
60
60
Degrees
0.02
0.02
%
RLOAD = 100 Ω
CCOMP = 30 pF
± 15 V
DIFFERENTIAL PHASE ERROR
RLOAD = 100 Ω
CCOMP = 30 pF
± 15 V
COMMON-MODE REJECTION
VCM = ± 2.5 V
VCM = ± 12 V
TMIN to TMAX
±5 V
± 15 V
POWER SUPPLY REJECTION
VS = ± 4.5 V to ± 18 V
TMIN to TMAX
INPUT VOLTAGE NOISE
f = 1 kHz
± 15 V
1.7
INPUT CURRENT NOISE
f = 1 kHz
± 15 V
1.5
1.5
pA/√Hz
±5 V
+4.3
–3.8
+14.3
–13.8
+4.3
–3.8
+14.3
–13.8
V
V
V
V
3.6
3.0
1.4
13.3
12.2
32
±V
±V
±V
±V
±V
mA
13
5
1.5
13
5
1.5
kΩ
pF
pF
2
2
mΩ
3
DIFFERENTIAL GAIN ERROR
3
INPUT COMMON-MODE
VOLTAGE RANGE
0.04
Degrees
100
100
96
120
120
0.04
100
100
96
120
120
dB
dB
dB
98
94
120
98
94
120
dB
dB
± 15 V
OUTPUT VOLTAGE SWING
RLOAD = 500 Ω
RLOAD = 150 Ω
RLOAD = 50 Ω
RLOAD = 1 kΩ
RLOAD = 500 Ω
Short Circuit Current
±5 V
±5 V
±5 V
± 15 V
± 15 V
± 5 V, ± 15 V
INPUT CHARACTERISTICS
Input Resistance (Differential)
Input Capacitance (Differential)4
Input Capacitance (Common Mode)
CLOSED-LOOP OUTPUT
RESISTANCE
AV = +1, f = 1 kHz
–2–
3.0
2.5
12
10
3.6
3.0
1.4
13.3
12.2
32
2
1.7
3.0
2.5
12
10
2
nV/√Hz
REV. E
AD829
Model
Conditions
POWER SUPPLY
Operating Range
Quiescent Current
VS
Min
± 4.5
±5 V
TMIN to TMAX
AD829J/AR
Typ
Max
± 18
± 4.5
6.5
8.0
6.8
8.3/8.5
5
± 15 V
5.3
TMIN to TMAX
TRANSISTOR COUNT
Number of Transistors
Min
46
AD829AQ/S
Typ
Max
5
5.3
± 18
6.5
8.2/8.7
6.8
8.5/9.0
Units
V
mA
mA
mA
mA
46
NOTES
1
Full Power Bandwidth = Slew Rate/2 π VPEAK.
2
Tested at Gain = +20, C COMP = 0 pF.
3
3.58 MHz (NTSC) and 4.43 MHz (PAL & SECAM).
4
Differential input capacitance consists of 1.5 pF package capacitance plus 3.5 pF from the input differential pair.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS 1
METALIZATION PHOTO
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V
Internal Power Dissipations2
Plastic (N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Watts
Small Outline (R) . . . . . . . . . . . . . . . . . . . . . . . . . 0.9 Watts
Cerdip (Q) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Watts
LCC (E) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.8 Watts
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± VS
Differential Input Voltage3 . . . . . . . . . . . . . . . . . . . . ± 6 Volts
Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range (Q, E) . . . . . . . –65°C to +150°C
Storage Temperature Range (N, R) . . . . . . . –65°C to +125°C
Operating Temperature Range
AD829J . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
AD829A . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
AD829S . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
Lead Temperature Range (Soldering 60 sec) . . . . . . . . +300°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of
the device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
Maximum internal power dissipation is specified so that T J does not exceed
+175°C at an ambient temperature of +25°C.
Thermal characteristics:
8-lead plastic package: θJA = 100°C/watt (derate at 8.7 mW/°C)
8-lead cerdip package: θJA = 110°C/watt (derate at 8.7 mW/°C)
20-lead LCC package: θJA = 150°C/watt
8-lead small outline package: θJA = 155°C/watt (derate at 6 mW/°C).
3
If the differential voltage exceeds 6 volts, external series protection resistors should
be added to limit the input current.
Contact factory for latest dimensions.
Dimensions shown in inches and (mm).
ESD SUSCEPTIBILITY
ESD (electrostatic discharge) sensitive device. Electrostatic
charges as high as 4000 volts, which readily accumulate on the
human body and on test equipment, can discharge without
detection. Although the AD829 features proprietary ESD protection circuitry, permanent damage may still occur on these
devices if they are subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid any performance degradation or loss of functionality.
ORDERING GUIDE
Model
AD829JN
AD829AR
AD829JR
AD829AR-REEL7
AD829AR-REEL
AD829JR-REEL7
AD829JR-REEL
AD829AQ
AD829SQ
AD829SQ/883B
5962-9312901MPA
AD829SE/883B
5962-9312901M2A
AD829JCHIPS
AD829SCHIPS
Temperature Range
0°C to +70°C
–40°C to +85°C
0°C to +70°C
–40°C to +85°C
–40°C to +85°C
0°C to +70°C
0°C to +70°C
–40°C to +85°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
0°C to +70°C
–55°C to +125°C
Package Description
8-Lead Plastic Mini-DIP
8-Lead Plastic SOIC
8-Lead Plastic SOIC
Tape and Reel 7"
Tape and Reel 13"
Tape and Reel 7"
Tape and Reel 13"
8-Lead Cerdip
8-Lead Cerdip
8-Lead Cerdip
8-Lead Cerdip
20-Lead LCC
20-Lead LCC
Die
Die
*E = Leadless Chip Carrier (Ceramic); N = Plastic DIP; Q = Cerdip; SO = Small Outline IC (SOIC).
REV. E
–3–
Package Option*
N-8
SO-8
SO-8
Q-8
Q-8
Q-8
Q-8
E-20A
E-20A
AD829–Typical Performance Characteristics
20
15
+VOUT
10
–VOUT
5
5
10
15
SUPPLY VOLTAGE – ⴞVolts
5
RLOAD = 1k⍀
0
5
10
15
SUPPLY VOLTAGE – ⴞVolts
–5
5.5
5.0
4.5
0
5
10
15
SUPPLY VOLTAGE – ⴞVolts
–3
0 20 40 60 80 100 120 140
TEMPERATURE – ⴗC
VS = ⴞ5V
4
0 20 40 60 80 100 120 140
TEMPERATURE – ⴗC
Figure 7. Quiescent Current vs.
Temperature
SHORT CIRCUIT CURRENT LIMIT – mA
5
15
10
10k
10
AV = +20
CCOMP = 0pF
1
0.1
AV = +1
CCOMP = 68pF
0.01
0.001
1k
10k
100k
1M
10M
FREQUENCY – Hz
100M
Figure 6. Closed-Loop Output
Impedance vs. Frequency
65
35
25
1k
100
LOAD RESISTANCE – ⍀
100
VS = ±15V
AV = +20
CCOMP = 0pF
NEGATIVE
CURRENT LIMIT
30
ⴞ5 VOLT
SUPPLIES
5
Figure 3. Output Voltage Swing
vs. Resistive Load
40
VS = ⴞ15V
20
Figure 5. Input Bias Current vs.
Temperature
7
3
– 60 – 40 – 20
VS = ⴞ5V, ⴞ15V
–2
– 60 – 40 – 20
20
Figure 4. Quiescent Current vs.
Supply Voltage
6
–4
ⴞ15 VOLT
SUPPLIES
25
0
10
20
Figure 2. Output Voltage Swing
vs. Supply Voltage
INPUT BIAS CURRENT – ␮A
QUIESCENT CURRENT – mA
–VOUT
0
6.0
QUIESCENT CURRENT – mA
10
20
Figure 1. Input Common-Mode
Range vs. Supply Voltage
4.0
+VOUT
CLOSED - LOOP OUTPUT IMPEDANCE – ⍀
0
15
POSITIVE
CURRENT LIMIT
VS = ⴞ5V
20
15
– 60 – 40 – 20 0 20 40 60 80 100 120 140
AMBIENT TEMPERATURE – ⴗC
Figure 8. Short Circuit Current
Limit vs. Temperature
–4–
–3 dB BANDWIDTH – MHz
0
30
OUTPUT VOLTAGE SWING – Volts p–p
MAGNITUDE OF THE OUTPUT
VOLTAGE – Volts
INPUT COMMON-MODE RANGE – Volts
20
60
55
50
45
– 60 – 40 – 20
0 20 40 60 80 100 120 140
TEMPERATURE – ⴗC
Figure 9. –3 dB Bandwidth vs.
Temperature
REV. E
AD829
120
+100
105
+80
100
120
+SUPPLY
GAIN
ⴞ5V
Supplies
500⍀ Load
60
40
+40
+20
CCOMP = 0pF
0
100
VS = ⴞ15V
95
VS = ⴞ5V
90
80
– SUPPLY
60
85
40
80
0
20
100
PSRR – dB
+60
OPEN-LOOP GAIN – dB
OPEN-LOOP GAIN – dB
GAIN
ⴞ15V
Supplies
1k⍀ Load
80
PHASE – Degrees
PHASE
100
CCOMP = 0pF
1k
10k
100k
1M
FREQUENCY – Hz
10M
–20
100M
75
10
1k
100
LOAD RESISTANCE – ⍀
Figure 11. Open-Loop Gain vs.
Resistive Load
Figure 10. Open-Loop Gain & Phase
Margin vs. Frequency
20
1k
10k
100k
1M
10M
FREQUENCY – Hz
100M
Figure 12. Power Supply Rejection
Ratio (PSRR) vs. Frequency
10
30
120
10k
CMRR – dB
80
60
CCOMP = 0pF
40
OUTPUT SWING FROM 0 TO ⴞV
OUTPUT VOLTAGE – Volts p–p
8
100
25
VS = ±15V
RL = 1k⍀
AV = +20
20
CCOMP = 0pF
15
VS = ±5V
RL = 500⍀
AV = +20
10
CCOMP = 0pF
5
6
4
2
1%
0.1%
1%
0.1%
0
–2
ERROR
AV = –19
CCOMP = 0pF
–4
–6
–8
10k
100k
1M
FREQUENCY – Hz
10M
1
100M
Figure 13. Common-Mode Rejection
Ratio vs. Frequency
10
INPUT FREQUENCY – MHz
100
Figure 14. Large Signal Frequency
Response
VIN = 3V RMS
AV = –1
CCOMP = 30pF
CLOAD = 100pF
–80
–85
–30
THD – dB
–75
RL = 500⍀
–90
–40
VIN = 2.24V RMS
AV = –1
RL = 250⍀
CLOAD = 0
CCOMP = 30pF
3rd HARMONIC
–50
2nd HARMONIC
–60
RL = 2k⍀
–105
–110
100
300
1k
3k
10k
FREQUENCY – Hz
30k
100k
Figure 16. Total Harmonic Distortion (THD) vs. Frequency
REV. E
–70
0
20
40
60
80 100 120 140 160
SETTLING TIME – ns
5
–95
–100
0
Figure 15. Output Swing & Error vs.
Settling Time
–20
–70
THD – dB
–10
0
500k
1M
1.5M
FREQUENCY – Hz
Figure 17. 2nd & 3rd Harmonic
Distortion vs. Frequency
–5–
2M
INPUT VOLTAGE NOISE – nV/ Hz
20
1k
4
3
2
1
0
10
100
1k
10k
100k
FREQUENCY – Hz
1M
10M
Figure 18. Input Voltage Noise
Spectral Density
0.03
400
RISE
300
250
DIFFERENTIAL PHASE – Degrees
SLEW RATE – Volts / ␮s
350
AV = +20
SLEW RATE 10 – 90%
FALL
VS = ⴞ15V
RISE
200
FALL
150
100
– 60 – 40 – 20
VS = ⴞ5V
0.02
0.043ⴗ
0.05
0.1␮F
+VS
AD829
0.1␮F
20k⍀
0.04
ⴞ10
SUPPLY VOLTAGE – Volts
0.1␮F
+15V
OFFSET
NULL
ADJUST
ⴞ15
Figure 20. Differential Gain & Phase
vs. Supply
Figure 19. Slew Rate vs. Temperature
CCOMP
(EXTERNAL)
DIFF PHASE
0.03
ⴞ5
0 20 40 60 80 100 120 140
TEMPERATURE – ⴗC
0.01
DIFF GAIN
DIFFERENTIAL GAIN – Percent
AD829–Typical Performance Characteristics
–VS
Figure 21. Offset Null and External
Shunt Compensation Connections
CCOMP
15pF
50⍀
CABLE
HP8130A
5ns RISE TIME
50⍀
50⍀ CABLE
50⍀
AD829
TEKTRONIX
TYPE 7A24
PREAMP
50⍀
0.1␮F
5pF
300⍀
–15V
300⍀
Figure 22a. Follower Connection. Gain = +2
Figure 22b. Gain-of-2 Follower
Large Signal Pulse Response
Figure 22c. Gain-of-2 Follower
Small Signal Pulse Response
–6–
REV. E
AD829
+15V
50⍀
CABLE
HP8130A
5ns RISE TIME
0.1␮F
100⍀
45⍀
FET PROBE
AD829
5⍀
TEKTRONIX
TYPE 7A24
PREAMP
0.1␮F
1pF
2k⍀
–15V
CCOMP = 0pF
105⍀
Figure 23a. Follower Connection. Gain = +20
Figure 23b. Gain-of-20 Follower
Large Signal Pulse Response
Figure 23c. Gain-of-20 Follower
Small Signal Pulse Response
5pF
300⍀
+15V
0.1␮F
50⍀
CABLE
HP8130A
5ns RISE TIME
300⍀
50⍀
50⍀
AD829
50⍀
CABLE
CCOMP
15pF
TEKTRONIX
TYPE 7A24
PREAMP
50⍀
0.1␮F
–15V
Figure 24a. Unity Gain Inverter Connection
Figure 24b. Unity Gain Inverter
Large Signal Pulse Response
REV. E
Figure 24c. Unity Gain Inverter
Small Signal Pulse Response
–7–
AD829
+VS
THEORY OF OPERATION
The AD829 is fabricated on Analog Devices’ proprietary complementary bipolar (CB) process which provides PNP and NPN
transistors with similar fTs of 600 MHz. As shown in Figure 25,
the AD829 input stage consists of an NPN differential pair in
which each transistor operates at 600 µA collector current. This
gives the input devices a high transconductance and hence gives
the AD829 a low noise figure of 2 nV/√Hz @ 1 kHz.
15⍀
OUTPUT
The input stage drives a folded cascode which consists of a fast
pair of PNP transistors. These PNPs then drive a current mirror
which provides a differential-input to single-ended-output conversion. The high speed PNPs are also used in the currentamplifying output stage which provides high current gain of
40,000. Even under conditions of heavy loading, the high fTs
of the NPN & PNPs, produced using the CB process, permit
cascading two stages of emitter followers while still maintaining
60° of phase margin at closed-loop bandwidths greater than
50 MHz.
Two stages of complementary emitter followers also effectively
buffer the high impedance compensation node (at the CCOMP
pin) from the output so that the AD829 can maintain a high dc
open-loop gain, even into low load impedances: 92 dB into a
150 Ω load, 100 dB into a 1 kΩ load. Laser trimming and
PTAT biasing assure low offset voltage and low offset voltage
drift enabling the user to eliminate ac coupling in many
applications.
For added flexibility, the AD829 provides access to the internal
frequency compensation node. This allows the user to customize
frequency response characteristics for a particular application.
+IN
15⍀
–IN
1.2mA
–VS
OFFSET NULL
CCOMP
Figure 25. AD829 Simplified Schematic
Shunt Compensation
Figures 26 and 27 show that the first method, shunt compensation, has an external compensation capacitor, CCOMP, connected
between the compensation pin and ground. This external
capacitor is tied in parallel with approximately 3 pF of internal capacitance at the compensation node. In addition, a
small capacitance, CLEAD, in parallel with resistor R2, compensates for the capacitance at the amplifier’s inverting input.
R2
CLEAD
Unity gain stability requires a compensation capacitance of
68 pF (Pin 5 to ground) which will yield a small signal bandwidth of 66 MHz and slew rate of 16 V/µs. The slew rate and
gain bandwidth product will vary inversely with compensation
capacitance. Table I and the graph of Figure 28 show the optimum compensation capacitance and the resulting slew rate for a
desired noise gain. For gains between 1 and 20, CCOMP can be
chosen to keep the small signal bandwidth relatively constant.
The minimum gain which will still provide stability also depends on the value of external compensation capacitance.
An RC network in the output stage (Figure 25) completely
removes the effect of capacitive loading when the amplifier is
compensated for closed-loop gains of 10 or higher. At low frequencies, and with low capacitive loads, the gain from the compensation node to the output is very close to unity. In this case,
C is bootstrapped and does not contribute to the compensation
capacitance of the device. As the capacitive load is increased, a
pole is formed with the output impedance of the output stage–
this reduces the gain, and subsequently, C is incompletely bootstrapped. Therefore, some fraction of C contributes to the
compensation capacitance, and the unity gain bandwidth falls.
As the load capacitance is further increased, the bandwidth
continues to fall, and the amplifier remains stable.
R
500⍀
C
12.5pF
+VS
50⍀
COAX
CABLE
VIN
0.1␮F
R1
50⍀
AD829
VOUT
1k⍀
CCOMP
–VS
0.1␮F
Figure 26. Inverting Amplifier Connection Using External
Shunt Compensation
+VS
0.1␮F
50⍀
CABLE
VIN
50⍀
AD829
VOUT
R2
1k⍀
CCOMP
–VS
Externally Compensating the AD829
The AD829 is stable with no external compensation for noise
gains greater than 20. For lower gains, there are two methods of
frequency compensating the amplifier to achieve closed-loop
stability; these are the shunt and current feedback compensation
methods.
0.1␮F
CLEAD
R1
Figure 27. Noninverting Amplifier Connection Using
External Shunt Compensation
–8–
REV. E
AD829
Table I. Component Selection for Shunt Compensation
Follower
Gain
Inverter
Gain
R1
⍀
R2
⍀
CL
pF
CCOMP
pF
Slew
Rate
V/␮s
–3 dB
Small Signal
Bandwidth – MHz
1
2
5
10
20
25
100
–1
–4
–9
–19
–24
–99
Open
1k
511
226
105
105
20
100
1k
2.0k
2.05k
2k
2.49
2k
0
5
1
0
0
0
0
68
25
7
3
0
0
0
16
38
90
130
230
230
230
66
71
76
65
55
39
7.5
Table I gives recommended CCOMP and CLEAD values along with
the corresponding slew rates and bandwidth. The capacitor
values given were selected to provide a small signal frequency
response with less than 1 dB of peaking and less than 10% overshoot. For this table, supply voltages of ± 15 volts should be
used. Figure 28 is a graphical extension of the table which
shows the slew rate/gain trade-off for lower closed-loop gains,
when using the shunt compensation scheme.
then:
This shows that the slew rate will be only 0.314 V/µs for every
MHz of bandwidth. The only way to increase slew rate is to
increase the fT and that is difficult, due to process limitations.
Unfortunately, an amplifier with a bandwidth of 10 MHz can
only slew at 3.1 V/µs, which is barely enough to provide a full
power bandwidth of 50 kHz.
1k
100
The AD829 is especially suited to a new form of compensation
which allows for the enhancement of both the full power bandwidth and slew rate of the amplifier. The voltage gain from the
inverting input pin to the compensation pin is large; therefore, if
a capacitance is inserted between these pins, the amplifier’s
bandwidth becomes a function of its feedback resistor and this
capacitance. The slew rate of the amplifier is now a function of
its internal bias (2I) and this compensation capacitance.
10
100
SLEW RATE = V/␮s
SLEW RATE
CCOMP
CCOMP – pF
Slew Rate
kT
=4π
q
fT
Since the closed-loop bandwidth is a function of RF and CCOMP
(Figure 29), it is independent of the amplifier closed-loop gain,
as shown in Figure 31. To preserve stability, the time constant
of RF and CCOMP needs to provide a bandwidth of less than
65 MHz. For example, with CCOMP = 15 pF and RF = 1 kΩ, the
small signal bandwidth of the AD829 is 10 MHz, while Figure
30 shows that the slew rate is in excess of 60 V/µs. As can be
seen in Figure 31, the closed-loop bandwidth is constant for
gains of –1 to –4, a property of current feedback amplifiers.
VS = ⴞ15V
10
100
1
1
10
NOISE GAIN
Figure 28. Value of CCOMP & Slew Rate vs. Noise Gain
Current Feedback Compensation
Bipolar nondegenerated amplifiers which are single pole and
internally compensated have their bandwidths defined as:
RF
1
fT =
=
2 π r e CCOMP
I
CCOMP
kT
2 π q CCOMP
0.1␮F +V
S
50⍀
COAX
CABLE
where:
fT is the unity gain bandwidth of the amplifier
I is the collector current of the input transistor
CCOMP is the compensation capacitance
re is the inverse of the transconductance of the input transistors
kT/q is approximately equal to 26 mV @ 27°C.
VIN
REV. E
IN4148
AD829
VOUT
50⍀
0.1␮F
*RECOMMENDED VALUE
OF CCOMP FOR C1
Since both fT and slew rate are functions of the same variables,
the dynamic behavior of an amplifier is limited. Since:
Slew Rate =
R1
C1*
<7pF
7pF
2I
CCOMP
0pF
15pF
RL
1k⍀
–VS
CCOMP SHOULD NEVER EXCEED
15pF FOR THIS CONNECTION
Figure 29. Inverting Amplifier Connection Using Current
Feedback Compensation
–9–
AD829
Figure 30. Large Signal Pulse Response of Inverting
Amplifier Using Current Feedback Compensation.
CCOMP = 15 pF, C1 = 15 pF, RF = 1 kΩ, R1 = 1 kΩ
Figure 32. Large Signal Pulse Response of the Inverting
Amplifier Using Current Feedback Compensation.
CCOMP = 1 pF, RF = 3 kΩ, R1 = 3 kΩ
15
12
GAIN = –4
–3dB @ 8.2MHz
CLOSED-LOOP GAIN – dB
9
GAIN = –2
6
–3dB @ 9.6MHz
3
GAIN = –1
0
–3dB @ 10.2MHz
–3
–6
–9
–12
–15
100k
VIN = –30dBM
VS = ⴞ15V
RL = 1k⍀
RF = 1k⍀
CCOMP = 15pF
C1 = 15pF
1M
10M
FREQUENCY – Hz
100M
Figure 31. Closed-Loop Gain vs. Frequency for the Circuit
of Figure 29
Figure 33. Small Signal Pulse Response of Inverting
Amplifier Using Current Feedback Compensation.
CCOMP = 4 pF, RF = 1 kΩ, R1 = 1 kΩ
Figure 32 is an oscilloscope photo of the pulse response of a
unity gain inverter which has been configured to provide a small
signal bandwidth of 53 MHz and a subsequent slew rate of
180 V/µs; resistor RF = 3 kΩ, capacitor CCOMP = 1 pF. Figure 33
shows the excellent pulse response as a unity gain inverter, this
time using component values of: RF = 1 kΩ and CCOMP = 4 pF.
15
12
CCOMP = 2pF
GAIN = –2
CCOMP = 3pF
GAIN = –1
CCOMP = 4pF
CLOSED-LOOP GAIN – dB
9
Figures 34 and 35 show the closed-loop frequency response of
the AD829 for different closed-loop gains and for different
supply voltages.
If a noninverting amplifier configuration using current feedback
compensation is desired, the circuit of Figure 36 is recommended. This circuit doubles the slew rate compared to the
shunt compensated noninverting amplifier of Figure 27 at the
expense of gain flatness. Nonetheless, this circuit delivers 95 MHz
bandwidth with ± 1 dB flatness into a back terminated cable,
with a differential gain error of only 0.01%, and a differential
phase error of only 0.015° at 4.43 MHz.
GAIN = –4
6
3
0
–3
–6
–9
VS = ⴞ15V
RL = 1k⍀
RF = 1k⍀
VIN = –30dBM
–12
–15
1M
10M
FREQUENCY – Hz
100M
Figure 34. Closed-Loop Frequency Response for the
Inverting Amplifier Using Current Feedback Compensation
–10–
REV. E
AD829
+15V
–17
0.1␮F
–20
50⍀
COAX
CABLE
–23
OUTPUT LEVEL – dB
ⴞ5V
VIN
–26
ⴞ15V
AD829
50⍀
–29
50⍀
50⍀
COAX
CABLE
VOUT
50⍀
–32
3pF
CCOMP
–15V
0.1␮F
–35
VIN = –20dBM
RL = 1k⍀
RF = 1k⍀
GAIN = –1
CCOMP = 4pF
–38
–41
–44
–47
1M
2k⍀
10M
FREQUENCY – Hz
Figure 36. Noninverting Amplifier Connection Using
Current Feedback Compensation
100M
+15V
Figure 35. Closed-Loop Frequency Response vs. Supply
for the Inverting Amplifier Using Current Feedback
Compensation
0.1␮F
75⍀
COAX
CABLE
75⍀
VIN
A Low Error Video Line Driver
AD829
The buffer circuit shown in Figure 37 will drive a back-terminated 75 Ω video line to standard video levels (1 V p-p) with
0.1 dB gain flatness to 30 MHz with only 0.04° and 0.02%
differential phase and gain at the 4.43 MHz PAL color
subcarrier frequency. This level of performance, which meets
the requirements for high definition video displays and test
equipment, is achieved using only 5 mA quiescent current.
75⍀
0.1␮F
–15V
300⍀
OPTIONAL
2 – 7pF
FLATNESS
TRIM
300⍀
Figure 37. A Video Line Driver with a Flatness over
Frequency Adjustment
Figure 38 shows a three op amp instrumentation amplifier circuit which provides a gain of 100 at video bandwidths. At a
circuit gain of 100 the small signal bandwidth equals 18 MHz
into an FET probe. Small signal bandwidth equals 6.6 MHz
with a 50 Ω load. 0.1% settling time is 300 ns.
The input amplifiers operate at a gain of 20, while the output
op amp runs at a gain of 5. In this circuit the main bandwidth
limitation is the gain/ bandwidth product of the output amplifier. Extra care needs to be taken while breadboarding this circuit, since even a couple of extra picofarads of stray capacitance
at the compensation pins of A1 and A2 will degrade circuit
bandwidth.
3pF
(G = 20)
VOUT
75⍀
30pF
CCOMP
A High Gain, Video Bandwidth Three Op Amp In Amp
+VIN
2k⍀
2–8pF
SETTLING TIME
AC CMR ADJUST
A1
AD829
1k⍀
2k⍀
RG
210⍀
1pF
200⍀
1pF
200⍀
AD848
A3
(G = 5)
2k⍀
INPUT
FREQUENCY
2k⍀
100 Hz
1 MHz
10 MHz
3pF
970⍀
AD829
A2
+VIN
DC CMR
ADJUST
50⍀
+VS
+15V
PIN 7
10␮F
0.1␮F
1␮F
0.1␮F
10␮F
0.1␮F
1␮F
0.1␮F
COMM
(G = 20)
3pF
CMRR
64.6dB
44.7dB
23.9dB
CIRCUIT GAIN =
+ 1( 5
( 4000⍀
RG
–15V
–VS
Figure 38. A High Gain, Video Bandwidth Three Op Amp In Amp Circuit
REV. E
–11–
EACH
AMPLIFIER
PIN 4
AD829
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
0.005 (0.13) MIN
0.055 (1.40) MAX
8
5
0.310 (7.87)
0.220 (5.59)
PIN 1
1
4
0.320 (8.13)
0.290 (7.37)
0.405 (10.29) MAX
0.060 (1.52)
0.015 (0.38)
0.200
(5.08)
MAX
0.150
(3.81)
MIN
0.200 (5.08)
0.125 (3.18)
0.023 (0.58) 0.100 0.070 (1.78)
0.014 (0.36) (2.54) 0.030 (0.76)
BSC
0.015 (0.38)
0.008 (0.20)
15°
0°
SEATING
PLANE
Plastic Mini-DIP (N) Package
8
8-Lead SOIC (R) Package
0.1968 (5.00)
0.1890 (4.80)
5
0.25
(6.35) 0.31
(7.87)
PIN 1
1
0.1574 (4.00)
0.1497 (3.80)
4
0.30 (7.62)
REF
0.39 (9.91) MAX
0.018±0.003
(0.46±0.08)
0.10
(2.54)
BSC
0.033
(0.84)
NOM
5
1
4
0.2440 (6.20)
0.2284 (5.80)
0.0196 (0.50)
ⴛ 45ⴗ
0.0099 (0.25)
0.0500 (1.27)
BSC
0.18±0.03
(4.57±0.76)
0.125
(3.18)
MIN
8
PIN 1
0.035±0.01
(0.89±0.25)
0.165±0.01
(4.19±0.25)
C1443c–0–5/00 (rev. E) 00880
Cerdip (Q) Package
0.0688 (1.75)
0.0532 (1.35)
0.0098 (0.25)
0.0040 (0.10)
0.011±0.003
(0.28±0.08)
SEATING
PLANE
15°
0°
0.0192 (0.49)
0.0138 (0.35)
8ⴗ
0.0098 (0.25) 0ⴗ 0.0500 (1.27)
0.0160 (0.41)
0.0075 (0.19)
SEATING
PLANE
20-Lead LCC (E-20A) Package
0.358 (9.09) 0.358
(9.09)
0.342 (8.69)
MAX
SQ
SQ
0.095 (2.41)
0.075 (1.90)
0.011 (0.28)
0.007 (0.18)
R TYP
0.075 (1.91)
REF
0.088 (2.24)
0.054 (1.37)
0.200 (5.08)
BSC
0.100 (2.54) BSC
3
4
19
18 20
1
BOTTOM
VIEW
14
13
0.055 (1.40)
0.045 (1.14)
0.015 (0.38)
MIN
0.028 (0.71)
0.022 (0.56)
PRINTED IN U.S.A.
0.075
(1.91)
REF
0.100 (2.54)
0.064 (1.63)
0.050 (1.27)
BSC
8
9
45° TYP
0.150 (3.81)
BSC
All brand or product names mentioned are trademarks or registered trademarks of their respective holders.
–12–
REV. E