IDT F2270 75(ohm) voltage variable attenuator 5mhz to 3000mhz Datasheet

75Ω Voltage Variable Attenuator
5MHz to 3000MHz
Description
Features
The F2270 is a 75Ω, low insertion loss voltage variable RF
attenuator (VVA) designed for a multitude of wireless and other
RF applications. This device covers a broad frequency range from
5MHz to 3000MHz. In addition to providing low insertion loss, the
F2270 provides excellent linearity performance over its entire
attenuation range.
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The F2270 uses a positive supply voltage of 3.3V or 5V. Other
features include a VMODE pin allowing either a positive or negative
voltage control slope versus attenuation and multi-directional
operation where the RF input can be applied to either the RF1 or
RF2 pins. The attenuation control voltage range is from 0V to 5V
using either a 3.3V or 5V power supply.
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Competitive Advantage
The F2270 provides extremely low insertion loss and superb IP3,
IP2, return loss performance, and slope linearity across the
control range. Compared to the previous state-of-the-art for silicon
VVAs, this device provides superior performance:
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Datasheet
Frequency range: 5MHz to 3000MHz
Low insertion loss: 1.1dB at 300MHz
Typical/Minimum IIP3 ≥ 50MHz: 62dBm / 46dBm
Typical/Minimum IIP2 ≥ 50MHz: 98dBm / 77dBm
Up to 35dB attenuation range
Attenuation slope versus VCTRL: 10dB/Volt
Bi-directional RF ports
+36dBm input P1dB
VMODE pin allows either positive or negative attenuation control
response
Linear-in-dB attenuation characteristic
Nominal supply voltage: 3.3V or 5V
VCTRL range: 0V to 5V using 3.3V or 5V supply
-40°C to +105°C operating temperature range
3mm x 3mm, 16-pin QFN package
Block Diagram
Operation down to 5MHz
Insertion loss at 300MHz of 1.1dB
Typical attenuation slope: 10dB/Volt
Minimum OIP3 (maximum attenuation): +35dBm
Minimum IIP2 (maximum attenuation, > 35MHz): +85dBm
Figure 1.
Block Diagram
VMODE
VDD
VCTRL
Control
Typical Applications
 CATV/Broadband Applications
 Headend
 Fiber/HFC Distribution Nodes
 CATV Test Equipment
© 2017 Integrated Device Technology, Inc.
F2270
RF1
1
RF2
Rev O July 25, 2017
F2270 Datasheet
Pin Assignments
GND
VDD
VCTRL
GND
Pin Assignments for 3mm x 3mm x 0.9mm 16-QFN Package – Top View
VMODE
Figure 2.
16
15
14
13
1
12
GND
CONTROL
NC
2
11
NC
RF1
3
10
RF2
NC
4
9
NC
© 2017 Integrated Device Technology, Inc.
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GND
7
8
GND
6
GND
5
GND
EP
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F2270 Datasheet
Pin Descriptions
Table 1.
Pin Descriptions
Number
Name
1, 5 – 8, 12,
13
GND
2, 4, 9, 11
NC
No internal connection. These pins can be left unconnected, have a voltage applied, or be connected to
ground (recommended).
RF1
RF Port 1. Matched to 75Ω. Since the RF pin internally has DC present, an external AC coupling capacitor
must be used. For low-frequency operation, increase the capacitor value to result in a low reactance at the
frequency of interest. An external series inductor of 2.4nH can also be used to improve the high frequency
match. This inductor, if used, should be placed as close to the device as possible.
10
RF2
RF Port 2. Matched to 75Ω. Since the RF pin internally has DC present, an external AC coupling capacitor
must be used. For low-frequency operation, increase the capacitor value to result in a low reactance at the
frequency of interest. An external series inductor of 2.8nH can also be used to improve the high frequency
match. This inductor, if used, should be placed as close to the device as possible.
14
VCTRL
Attenuator control voltage. Apply a voltage in the range specified in under “Recommended Operating
Conditions.” See the “Application Information” section for details about VCTRL. This pin is connected to an
internal 100kΩ series resistor that drives a biased voltage divider network.
15
VDD
16
VMODE
Attenuator slope control. Set to logic LOW to enable negative attenuation slope (maximum attenuation at
maximum VCTRL). Set to logic HIGH to enable positive attenuation slope (maximum attenuation at minimum
VCTRL). This pin is internally connected to a 170kΩ pull-down resistor to ground.
– EPAD
Exposed paddle. Internally connected to ground. Solder this exposed paddle to a printed circuit board (PCB)
pad that uses multiple ground vias to provide heat transfer out of the device into the PCB ground planes.
These multiple ground vias are also required to achieve the specified RF performance.
3
Description
Internally grounded. This pin must be grounded as close to the device as possible.
Power supply input. Bypass to ground (GND) with capacitors as close as possible to the pin.
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F2270 Datasheet
Absolute Maximum Ratings
Stresses above those listed below may cause permanent damage to the device. Functional operation of the device at these or any other
conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
Table 2.
Absolute Maximum Ratings
Parameter
Symbol
Minimum
Maximum
Units
VDD
-0.3
6.0
V
VMODE to GND
VMODE
-0.3
Lower of
(VDD, 3.9)
V
VCTRL to GND
VCTRL
-0.3
Lower of
(VDD + 3.0, 5.3)
V
VRF
-0.3
0.3
V
VDD to GND
RF1, RF2 to GND
RF1 or RF2 Input Power Applied for 24 Hours Maximum
(VDD applied at 1GHz and TEP [Exposed Paddle] = +85°C, ZS = ZL = 75Ω)
PMAX24
+28
dBm
Junction Temperature
TJMAX
+150
°C
Storage Temperature Range
TSTOR
+150
°C
Lead Temperature (soldering, 10s)
TLEAD
+260
°C
Electrostatic Discharge – HBM
(JEDEC/ESDA JS-001-2012)
VESDHMB
2000
(Class 2)
V
Electrostatic Discharge – CDM
(JEDEC 22-C101F)
VESDHCDM
500
(Class C2)
V
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F2270 Datasheet
Recommended Operating Conditions
Table 3.
Recommended Operating Conditions
Parameter
Power Supply Voltage
Symbol
Condition
Minimum
Typical
Maximum
Units
VDD
3.15
5.5
V
Mode Voltage [a]
VMODE
0
Lower of
(VDD, 3.6)
V
Control Voltage [a]
VCTRL
0
Lower of
(VDD + 3.0, 5.0)
V
-40
+105
°C
5
3000
MHz
See Figure 3
dBm
Operating Temperature Range
TEP
RF Frequency Range
fRF
Exposed Paddle
Power can be applied to
RF1 or RF2
Maximum Input RF Power
PMAX
RF1 Port Impedance
ZRF1
75
Ω
RF2 Port Impedance
ZRF2
75
Ω
[a] The power supply voltage must be applied before all other voltages.
Figure 3.
Maximum Operating CW RF Input Power vs. Frequency (ZS = ZL = 75Ω)
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F2270 Datasheet
Electrical Characteristics
Table 4.
Electrical Characteristics (General)
Refer to the application circuit in Figure 60 for the required circuit and use L1 = L2 = 0Ω. The specifications in this table apply at VDD = +5.0V,
TEP = +25°C, fRF = 500MHz, ZS = ZL = 75Ω, signal applied to RF1, minimum attenuation, PIN = 0dBm for small signal parameters, PIN =
+20dBm per tone for two tone tests, VMODE is LOW or HIGH, and Evaluation Board (EVKit) trace and connector losses are de-embedded,
unless otherwise noted.
Parameter
Symbol
VMODE Logic Input HIGH
VIH
VMODE Logic Input LOW
VIL
VDD Current
IDD
Condition
3.9V ≤ VDD ≤ 5.5V
VDD < 3.9V
Minimum
Typical
Maximum
Units
1.07 [a]
3.6
1.07
VDD – 0.3
0
0.63
V
2.5
mA
1.4
V
VMODE Current
IMODE
-40
40
μA
VCTRL Current
ICTRL
-50
50
μA
Attenuation Slope
Attenuation Variation over
Temperature (reference to +25°C)
Settling Time
VMODE = LOW
10
VMODE = HIGH
-10
ATTVAR
fRF = 50MHz
(-40°C to 105°C, over full
signal range of VCTRL)
±1
dB
tSETTLE
Any 1dB step in the 0dB to
33dB control range,
50% of VCTRL signal to RF
settled to within ± 0.1dB
25
µs
ATTSLOPE
dB/V
[a] Specifications in the minimum/maximum columns that are shown in bold italics are guaranteed by test. Specifications in these
columns that are not shown in bold italics are guaranteed by design characterization.
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F2270 Datasheet
Electrical Characteristics (continued)
Table 5.
Electrical Characteristics (No External RF Tuning)
Refer to the application circuit in Figure 60 for the required circuit and use L1 = L2 = 0Ω. The specifications in this table apply at VDD = +5.0V,
TEP = +25°C, fRF = 500MHz, ZS = ZL = 75Ω, signal applied to RF1, minimum attenuation, PIN = 0dBm for small signal parameters, PIN =
+20dBm per tone for two tone tests, VMODE is LOW or HIGH, and Evaluation Board (EVKit) trace and connector losses are de-embedded,
unless otherwise noted.
Parameter
Insertion Loss, IL
Maximum Attenuation
Symbol
AMIN
AMAX
Condition
Typical
Maximum
Units
Minimum attenuation
1.1
1.8 [a]
dB
fRF = 5MHz
23
fRF = 10MHz
28
fRF = 500MHz
33
300MHz < fRF ≤ 1800MHz
Attenuation Variation [c]
AVAR
Relative Insertion Phase
ΦΔMAX
RF1 Return Loss
(over control voltage range)
S11
RF2 Return Loss
(over control voltage range)
S22
Input Power Compression [b]
IP1dB
Input IP3
IIP3
Minimum
35
dB
35
VCTRL = 1.0 V, VMODE = LOW
± 1.5
VCTRL = 2.1 V, VMODE = LOW
± 2.8
At maximum attenuation relative
to minimum attenuation
9
5MHz ≤ fRF ≤ 300MHz
23
300MHz < fRF ≤ 1220MHz
15
1220MHz < fRF ≤ 1800MHz
12
5MHz ≤ fRF ≤ 300MHz
23
300MHz < fRF ≤ 1220MHz
15
1220MHz < fRF ≤ 1800MHz
12
36
fRF = 5MHz, 1MHz spacing
45
fRF = 50MHz, 5MHz spacing
57
300MHz < fRF < 2GHz,
50MHz spacing
60
dB
deg
dB
dB
dBm
dBm
Input IP3 over Attenuation
IIP3ATTEN
All attenuation settings
46
dBm
Minimum Output IP3
OIP3MIN
Maximum attenuation
35
dBm
IM2 term is f1 + f2
98
dBm
All attenuation settings
77
dBm
Input IP2
Minimum Input IP2
IIP2
IIP2MIN
Input 2nd Harmonic Intercept Point
IIPH2
PIN + H2dBc
82
dBm
Input 3rd Harmonic Intercept Point
IIPH3
PIN + (H3dBc /2)
50
dBm
[a] Specifications in the minimum/maximum columns that are shown in bold italics are guaranteed by test. Specifications in these
columns that are not shown in bold italics are guaranteed by design characterization.
[b] The input 1dB compression point is a linearity figure of merit. Refer to the “Absolute Maximum Ratings” section for the
maximum RF input power.
[c] This value is for part to part variation at the given voltage.
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F2270 Datasheet
Electrical Characteristics (continued)
Table 6.
Electrical Characteristics – Extended Bandwidth Tuning (EBT) using external components
Refer to the application circuit in Figure 60 for the required circuit and use L1 = 2.4nH and L2 =2.8nH. The specifications in this table apply at
VDD = +5.0V, TEP = +25°C, fRF = 500MHz, ZS = ZL = 75Ω, signal applied to RF1, minimum attenuation, PIN = 0dBm for small signal parameters,
PIN = +20dBm per tone for two tone tests, VMODE is LOW or HIGH, and Evaluation Board (EVKit) trace and connector losses are deembedded, unless otherwise noted.
Parameter
Symbol
Insertion Loss, IL
AMIN
Maximum Attenuation
AMAX
Attenuation Variation [c]
AVAR
Relative Insertion Phase
ΦΔMAX
RF1 Return Loss
(over control voltage range)
S11
RF2 Return Loss
(over control voltage range)
S22
Input Power Compression
IP1dB
[b]
Input IP3 (Minimum Attenuation)
IIP3
Condition
Minimum
Typical
Minimum attenuation
1.1
fRF = 5MHz
23
fRF = 10MHz
28
50MHz < fRF ≤ 300MHz
35
300MHz < fRF ≤ 1800MHz
35
VCTRL = 1.0 V, VMODE = LOW
± 1.5
VCTRL = 2.1 V, VMODE = LOW
± 2.8
At maximum attenuation relative
to minimum attenuation
9
5MHz ≤ fRF ≤ 300MHz
23
300MHz < fRF ≤ 1220MHz
18
1220MHz < fRF ≤ 1800MHz
12
5MHz ≤ fRF ≤ 300MHz
23
300MHz < fRF ≤ 1220MHz
18
1220MHz < fRF ≤ 1800MHz
12
36
fRF = 5MHz, 1MHz spacing
45
fRF = 50MHz, 5MHz spacing
57
300MHz < fRF < 2GHz,
50MHz spacing
60
Maximum
Units
dB
dB
dB
deg
dB
dB
dBm
dBm
Input IP3 over attenuation
IIP3ATTEN
All attenuation settings
46
dBm
Minimum Output IP3
OIP3MIN
Maximum attenuation
35
dBm
IM2 term is f1 + f2
98
dBm
All attenuation settings
77
dBm
Input IP2
IIP2
Minimum Input IP2
Input
2nd
IIP2MIN
Harmonic Intercept Point
IIPH2
PIN + H2dBc
82
dBm
Input 3rd Harmonic Intercept Point
IIPH3
PIN + (H3dBc /2)
50
dBm
[a] Specifications in the minimum/maximum columns that are shown in bold italics are guaranteed by test. Specifications in these
columns that are not shown in bold italics are guaranteed by design characterization.
[b] The input 1dB compression point is a linearity figure of merit. Refer to t the “Absolute Maximum Ratings” section for the
maximum RF input power.
[c] This value is for part to part variation at the given voltage.
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F2270 Datasheet
Thermal Characteristics
Table 7.
Package Thermal Characteristics
Parameter
Symbol
Value
Units
Junction to Ambient Thermal Resistance
θJA
80.6
°C/W
Junction to Case Thermal Resistance
(case is defined as the exposed paddle)
θJC-BOT
5.1
°C/W
Moisture Sensitivity Rating (Per J-STD-020)
MSL 1
Typical Operating Conditions (TOCs)
Unless otherwise noted:
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VDD = +5.0V
ZS = ZL = 75Ω
TEP = +25ºC
RF trace and connector losses removed for insertion loss and attenuation results. All other results include the PCB trace and connector
losses and mismatched effects.
PIN = 0dBm for all small signal tests
 PIN = +20dBm/tone for two tone linearity tests (RF1 port driven)
Two tone frequency spacing
 1MHz for 5MHz ≤ fRF < 50MHz
 5MHz for 50MHz ≤ fRF < 500MHz
 50MHz for 500MHz ≤ fRF < 3500MHz
All temperatures are referenced to the exposed paddle.
Extended band tuning uses L1 = 2.4nH and L2 = 2.8nH to improve RF1 and RF2 port match.
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F2270 Datasheet
Typical Performance Characteristics (No External RF Tuning)
Figure 4.
Insertion Loss vs. Frequency
[VMODE = LOW]
Figure 5.
Relative Insertion Loss vs. VCTRL
[VMODE = LOW]
Figure 6.
RF1 Return Loss vs. Frequency
[VMODE = LOW]
Figure 7.
RF1 Return Loss vs. VCTRL
[VMODE = LOW]
Figure 8.
RF2 Return Loss vs. Frequency
[VMODE = LOW]
Figure 9.
RF2 Return Loss vs. VCTRL
[VMODE = LOW]
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F2270 Datasheet
Typical Performance Characteristics (No External RF Tuning)
Figure 10. Relative Insertion Phase vs.
Frequency [VMODE = LOW]
Figure 11. Relative Insertion Phase vs. VCTRL
[VMODE = LOW]
Figure 12. Insertion Loss vs. Frequency
Figure 13. Attenuation Slope vs. VCTRL
[VMODE = LOW]
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F2270 Datasheet
Typical Performance Characteristics (No External RF Tuning)
Figure 14. Insertion Loss vs. Frequency
[VMODE = HIGH]
Figure 15. Relative Insertion Loss vs. VCTRL
[VMODE = HIGH]
Figure 16. RF1 Return Loss vs. Frequency
[VMODE = HIGH]
Figure 17. RF1 Return Loss vs. VCTRL
[VMODE = HIGH]
Figure 18. RF2 Return Loss vs. Frequency
[VMODE = HIGH]
Figure 19. RF2 Return Loss vs. VCTRL
[VMODE = HIGH]
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F2270 Datasheet
Typical Performance Characteristics (No External RF Tuning)
Figure 20. Relative Insertion Phase vs.
Frequency [VMODE = HIGH]
Figure 21. Relative Insertion Phase vs. VCTRL
[VMODE = HIGH]
Figure 22. Attenuation Slope vs. VCTRL
[VMODE = HIGH]
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F2270 Datasheet
Typical Performance Characteristics (No External RF Tuning)
Figure 23. Input IP3 vs. VCTRL
[5MHz, VMODE = LOW]
Figure 24. Input IP3 vs. VCTRL
[5MHz, VMODE = HIGH]
Figure 25. Input IP3 vs. VCTRL
[50MHz, VMODE = LOW]
Figure 26. Input IP3 vs. VCTRL
[50MHz, VMODE = HIGH]
Figure 27. Input IP3 vs. VCTRL
[1.2GHz, VMODE = LOW]
Figure 28. Input IP3 vs. VCTRL
[1.2GHz, VMODE = HIGH]
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F2270 Datasheet
Typical Performance Characteristics (No External RF Tuning)
Figure 29. Compression vs. Input Power
[5MHz, VMODE = LOW,VCTRL = 0V]
Figure 30. Compression vs. Input Power
[5MHz, VMODE = HIGH, VCTRL = 5V]
Figure 31. Compression vs. Input Power
[100MHz, VMODE = LOW, VCTRL = 0V]
Figure 32. Compression vs. Input Power
[100MHz, VMODE = HIGH, VCTRL = 5V]
Figure 33. Compression vs. Input Power
[1.2GHz, VMODE = LOW, VCTRL = 0V]
Figure 34. Compression vs. Input Power
[1.2GHz, VMODE = HIGH, VCTRL = 5V]
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F2270 Datasheet
Typical Performance Characteristics (Extended Bandwidth Tuning)
Figure 35. Insertion Loss vs. Frequency
[VMODE = LOW]
Figure 36. Relative Insertion Loss vs. VCTRL
[VMODE = LOW]
Figure 37. RF1 Return Loss vs. Frequency
[VMODE = LOW]
Figure 38. RF1 Return Loss vs. VCTRL
[VMODE = LOW]
Figure 39. RF2 Return Loss vs. Frequency
[VMODE = LOW]
Figure 40. RF2 Return Loss vs. VCTRL
[VMODE = LOW]
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F2270 Datasheet
Typical Performance Characteristics (Extended Bandwidth Tuning)
Figure 41. Relative Insertion Phase vs.
Frequency [VMODE = LOW]
Figure 42. Relative Insertion Phase vs. VCTRL
[VMODE = LOW]
Figure 43. RF1 Return Loss vs. Frequency
[VMODE = LOW]
Figure 44. Attenuation Slope vs. VCTRL
[VMODE = LOW]
Figure 45. RF2 Return Loss vs. Frequency
[VMODE = LOW]
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F2270 Datasheet
Typical Performance Characteristics (Extended Bandwidth Tuning)
Figure 46. Insertion Loss vs. Frequency
[VMODE = HIGH]
Figure 47. Relative Insertion Loss vs. VCTRL
[VMODE = HIGH]
Figure 48. RF1 Return Loss vs. Frequency
[VMODE = HIGH]
Figure 49. RF1 Return Loss vs. VCTRL
[VMODE = HIGH]
Figure 50. RF2 Return Loss vs. Frequency
[VMODE = HIGH]
Figure 51. RF2 Return Loss vs. VCTRL
[VMODE = HIGH]
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F2270 Datasheet
Typical Performance Characteristics (Extended Bandwidth Tuning)
Figure 52. Relative Insertion Phase vs.
Frequency [VMODE = HIGH]
Figure 53. Relative Insertion Phase vs. VCTRL
[VMODE = HIGH]
Figure 54. RF1 Return Loss vs. Frequency
[VMODE = HIGH]
Figure 55. Attenuation Slope vs. VCTRL
[VMODE = HIGH]
Figure 56. RF2 Return Loss vs. Frequency
[VMODE = HIGH]
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F2270 Datasheet
Application Information
The F2270 has been optimized for use in high performance RF applications from 5MHz to 1800MHz and has a full operating range of 5MHz
to 3000MHz.
Default Start-up
VMODE should be tied to either logic LOW (ground) or logic HIGH. If the VCTRL pin is left floating, the part will power up in the minimum
attenuation state when VMODE = LOW or in the maximum attenuation state when VMODE = HIGH.
VMODE
The VMODE pin is used to set the slope of the attenuation. The attenuation is varied by VCTRL as described in the next section. Setting VMODE to
a logic LOW (HIGH) will set the attenuation slope to negative (positive). A negative (positive) slope is defined as an increased (decreased)
attenuation with increasing VCTRL voltage. The Evaluation Kit provides has an on-board jumper to manually set VMODE. Install a jumper on
header J7 from VMODE to the pin marked Lo (Hi) to set the device for a negative (positive) slope (see Figure 58).
VCTRL
The voltage level on the VCTRL pin is used to control the attenuation of the F2270. At VCTRL =0V, the attenuation is a minimum (maximum) in
the negative (positive) slope mode. An increasing voltage on VCTRL produces an increasing (decreasing) attenuation respectively. The VCTRL
pin has an on-chip pull-up ESD diode so VDD should be applied before VCTRL is applied (see “Recommended Operating Conditions” for
details). If this sequencing is not possible, then resistor R5 in the application circuit (see Figure 60) should be set to 1kΩ to limit the current
into the VCTRL pin.
RF1 and RF2 Ports
The F2270 is a bi-directional device, allowing RF1 or RF2 to be used as the RF input. RF1 has some enhanced linearity performance, and
therefore should be used as the RF input, when possible, for best results. The F2270 has been designed to accept high RF input power levels;
therefore, VDD must be applied prior to the application of RF power to ensure reliability. DC blocking capacitors are required on the RF pins
and should be set to a value that results in a low reactance over the frequency range of interest. External series inductors can be added on
the RF1 and RF2 lines close to the device to improve the higher frequency match.
Power Supplies
The VDD supply pin should be bypassed with external capacitors to minimize noise and fast transients. Supply noise can degrade
performance, and fast transients can trigger ESD clamps and cause them to fail. Supply voltage changes or transients should have a slew
rate smaller than 1V/20µs. In addition, all control pins should remain at 0V (+/- 0.3V) while the supply voltage ramps or while it returns to zero.
Control Pin Interface
If control signal integrity is a concern and clean signals cannot be guaranteed due to overshoot, undershoot, or ringing, etc., then
implementing the circuit shown in Figure 57 at the input of each control pin is recommended. This applies to control pins 14 (VCTRL) and 16
(VMODE) as shown in Figure 57. Note the recommended resistor and capacitor values do not necessarily match the Evaluation Kit BOM for
the case of poor control signal integrity.
Extended Bandwidth Tuning (EBT)
There are cases where the return loss for the RF ports needs to be better than 18 dB across the frequency range. For this case, adding
series inductors just next to the package on the RF ports will accomplish this. The addition of these inductors, 2.4nH on RF1 and 2.8nH on
RF2, will degrade the insertion loss and return loss at frequencies above 2GHz.
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F2270 Datasheet
Figure 57. Control Pin Interface for Signal Integrity
VMODE
5Kohm
5Kohm
2pf
VCTRL
VDD
2pf
16
14
15
13
12
1
Control
RF1
2
11
3
10
4
9
5
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F2270 Datasheet
Evaluation Kit Pictures
Figure 58. Evaluation Kit Top View
Figure 59. Evaluation Kit Bottom View
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F2270 Datasheet
Evaluation Kit / Applications Circuit
Figure 60. Electrical Schematic
VCC
J3
75 ohm transmission line
TP2
VCC
VCC
J5
J6
Thru Cal
GND
VCTRL
MEAS
TP3
VCC
TP1
R4
VCC
J4
R5
C1
C2
C4
Voltage divider sets
logic 'Hi" level
for VMODE input.
VMODE SET
R7
C5
2
14
15
13
NC
12
11
RF1
RF2
NC
NC
L2
23
9
C8
GND
GND
J2
8
5
U1
7
4
RF2
10
L1
© 2017 Integrated Device Technology, Inc.
75 ohm
transmission line
F2270
3
C7
NC
NC
GND
J1
75 ohm
transmission line
GND
GND
6
RF1
1
VCTRL
1
2
3
J7
VDD
LO
EPAD
HI
R2
16
17
C6
VMODE
R1
R6
C3
GND
VCC
VCTRL
R8
R3
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F2270 Datasheet
Table 8.
Bill of Material (BOM)
Part Reference
QTY
Manufacturer Part #
Manufacturer
C1 – C8
8
0.1µF ±10%, 16V, X7R Ceramic Capacitor (0402)
GRM155R71C104K
Murata
R1, R2, R3
3
100kΩ ±1%, 1/10W, Resistor (0402)
ERJ-2RKF1003X
Panasonic
R4
1
10Ω ±1%, 1/10W, Resistor (0402)
ERJ-2RKF10R0X
Panasonic
R5
1
1kΩ ±1%, 1/10W, Resistor (0402)
ERJ-2RKF1001X
Panasonic
R7
1
100Ω ±1%, 1/10W, Resistor (0402)
ERJ-2RKF1000X
Panasonic
0
0Ω ±1%, 1/10W, Resistor (0402)
ERJ-2GE0R00X
Panasonic
1
2.4nH ± 0.1nH, Inductor (0402)
LQP15MN2N4B02D
Murata
0
0Ω ±1%, 1/10W, Resistor (0402)
ERJ-2GE0R00X
Panasonic
1
2.8nH ± 0.1nH, Inductor (0402)
LQP15MN2N8B02D
Murata
J1, J2, J5, J6
4
Edge Launch F TYPE 75Ω
222181
Amphenol
J3, J4
2
Edge Launch SMA (0.375 inch pitch ground, tab)
142-0701-851
Emerson Johnson
J7
1
Conn Header Vertical SGL 3 X 1 Pos Gold
961103-6404-AR
3M
TP1
1
Test Point White
5002
Keystone Electronics
TP2
1
Test Point Red
5000
Keystone Electronics
TP3
1
Test Point Black
5001
Keystone Electronics
U1
1
75Ω Voltage Variable Attenuator
F2270NLGK
IDT
1
Printed Circuit Board
F2270 Rev 02
IDT
0
DNP
L1 [a]
L2 [a]
R6, R8
Description
[a] Series inductors are added on the RF port to improve the high-frequency port match (extended band). If not required then the 0Ω
resistor can be used.
© 2017 Integrated Device Technology, Inc.
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F2270 Datasheet
Evaluation Kit Operation
Below is a basic setup procedure for configuring and testing the F2270 Evaluation Kit (EVKit).
Pre-Configure EVKit
This section is a guide to setting up the EVKit for testing. To configure the board for a negative attenuation slope (increasing attenuation with
increasing VCTRL voltage), install a header-shunt shorting pin 2 (center pin) and pin 3 (labeled Lo) on header J7 (see Figure 58). For a positive
slope (decreasing attenuation with increasing VCTRL voltage), this header-shunt should short pin 1 (labeled Hi) to pin 2 (center pin) on J7.
Power Supply Setup
Without making any connections to the EVKit, set up one fixed power supply (VCC) for 5V with a current limit of 10mA and one variable power
supply (VCTRL) set to 0V with a current limit of 5mA. Disable both power supplies.
RF Test Setup
Set the RF test setup to the desired frequency and power ranges within the specified operating limits noted in this datasheet.
Disable the output power of all the RF sources.
Connect EVKit to the test setup.
With the RF sources and power supplies disabled, connect the fixed 5V power supply to connector J3, the variable supply to J4, and the RF
connections to the desired RF ports.
Powering Up the EVKit
Enable the VCC power supply and observe a DC current of approximately 1.4mA.
Enable the VCTRL power supply.
Enable the RF sources. Verify that the DC current remains at about 1.4mA.
If the J7 connection is set for a negative (positive) attenuation slope, then increasing the variable supply will produce increased (decreased)
attenuation for the attenuator path (J1 to J2).
Powering Down the EVKit
Disable the RF power applied to the device.
Adjust the VCTRL power supply down to 0V and disable it.
Disable the VCC power supply.
Disconnect the EVKit from the RF test setup.
© 2017 Integrated Device Technology, Inc.
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Rev O July 25, 2017
F2270 Datasheet
Package Drawing and Land Pattern
Figure 61. Package Outline Drawing NLG16P2 PSC-4169-02
© 2017 Integrated Device Technology, Inc.
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Rev O July 25, 2017
F2270 Datasheet
Marking Diagram
A01
637W
F2270
Line 1 “A01” is for lot code.
Line 2 “637” = has one digit for the year and week that the part was assembled.
Line 2 “W” is the assembler code.
Line 3 is the abbreviated part number.
Ordering Information
Orderable Part Number
Package
MSL Rating
Shipping Packaging
Operating
Temperature
F2270NLGK
3.0mm x 3.0mm x 0.9mm 16-QFN
1
Tray
-40°C to +105°C
F2270NLGK8
3.0mm x 3.0mm x 0.9mm 16-QFN
1
Reel
-40°C to +105°C
F2270EVBI
Evaluation Board
© 2017 Integrated Device Technology, Inc.
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Rev O July 25, 2017
F2270 Datasheet
Revision History
Revision
Revision Date
O
July 25, 2017
Description of Change
Initial release
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Sales
Tech Support
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1-800-345-7015 or 408-284-8200
Fax: 408-284-2775
www.IDT.com/go/sales
www.IDT.com/go/support
DISCLAIMER Integrated Device Technology, Inc. (IDT) and its affiliated companies (herein referred to as “IDT”) reserve the right to modify the products and/or specifications described herein at any time,
without notice, at IDT's sole discretion. Performance specifications and operating parameters of the described products are determined in an independent state and are not guaranteed to perform the same
way when installed in customer products. The information contained herein is provided without representation or warranty of any kind, whether express or implied, including, but not limited to, the suitability
of IDT's products for any particular purpose, an implied warranty of merchantability, or non-infringement of the intellectual property rights of others. This document is presented only as a guide and does not
convey any license under intellectual property rights of IDT or any third parties.
IDT's products are not intended for use in applications involving extreme environmental conditions or in life support systems or similar devices where the failure or malfunction of an IDT product can be
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Integrated Device Technology, IDT and the IDT logo are trademarks or registered trademarks of IDT and its subsidiaries in the United States and other countries. Other trademarks used herein are the
property of IDT or their respective third party owners. For datasheet type definitions and a glossary of common terms, visit www.idt.com/go/glossary. All contents of this document are copyright of
Integrated Device Technology, Inc. All rights reserved.
© 2017 Integrated Device Technology, Inc.
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Rev O July 25, 2017