EUP9261 LI-ION/POLYMER ONE CELL PROTECTOR DESCRIPTION The EUP9261 series are lithium-ion/lithium polymer rechargeable battery protection ICs incorporating high-accuracy voltage detection circuit and delay circuit. The EUP9261 series are suitable for protection of single-cell lithium-ion/lithium polymer battery packs from overcharge, overdischarge and overcurrent. FEATURES Absolute maximum rating of 30V for the charger connection pins(VM and CO) Highly accurate voltage detector………….Overcharge detection (Topt=+25°C) z z (Topt=-5 to 55°C) ±30mV Overcharge hysteresis ±25mV Overdischarge detection ±50mV Overcurrent 1 detection ±15mV Overcurrent 2 detection ±100mV Variety of detector………………………… Overcharge detection z ±25mV Overcharge hysteresis Overdischarge detection Overdischarge hysteresis 3.9V-4.4V step of 5mV 0.0V-0.4V*1 step of 50mV 2.0V-3.0V step of 10mV 0.0V-0.7V*2 step of 100mV Overcurrent 1 detection 0.03V-0.3V step of 10mV Overcurrent 2 detection 0.5V *1 Overcharge release voltage=Over detection voltage-Overcharge hysteresis voltage *2 Overdischarge release voltage = Overdischarge detection voltage-Overdischarge hysteresis voltage. z z Delay times internally generated. Accuracy : ±30%. (overcharge: tCU, overdischarge: tDL, overcurrent 1: tlOV1, overcurrent 2: tlOV2) Three-step overcurrent detection circuit is included.(overcurrent 1,overcurrent 2 and load short – circuiting) Charger detection function and abnormal charge current detection function, included. z 0V-battery charge option: Acceptable/Unacceptable. z Low current consumption z z z z z Operation: 3.0µA typ. 6µA max. Power-down 0.1µA max. DP pin……………………………………...At VSS level, delay circuit is disabled. Tie a 300kΩ resistor to VSS, delay time of all items expect short-circuit can be reduced. Wide operating temperature range: -40°C to + 85°C. Small package: SOT-23-6, STDFN-6(2mm*2mm) RoHS compliant and 100% lead (Pb)-free APPLICATIONS z Lithium-ion rechargeable battery packs. z Lithium polymer rechargeable battery packs. DS9261 Ver2.4 Jan. 2007 1 EUP9261 Block Diagram Figure1. DS9261 Ver2.4 Jan. 2007 2 EUP9261 Pin Configurations Package Type Pin Configurations SOT-23-6 STDFN-6 Pin Description PIN SOT-23-6 STDFN6 DO 1 3 VM 2 2 CO 3 1 CO FET gate control pin for charge(CMOS output) DP 4 6 Pin for reduce output delay time and for delay time measurement VDD 5 5 VDD Positive power input pin VSS 6 4 VSS Negative power input pin DS9261 Ver2.4 Jan. 2007 DESCRIPTION DO FET gate control pin for discharge (CMOS output) VM Voltage detection pin between VM and VSS (Overcurrent detection pin) 3 EUP9261 Absolute Maximum Ratings Input voltage between VDD and VSS -------------------------------------------------- VSS -0.3 V to VSS +12 V Input pin voltage for VM -------------------------------------------------------------- VDD -30 V to VDD +0.3 V Output pin voltage for CO ------------------------------------------------------------- VVM -0.3 V to VDD +0.3 V Output pin voltage for DO --------------------------------------------------------------- VSS -0.3 V to VDD +0.3 V Power dissipation SOT-23-6 ---------------------------------------------------------------------------- Operating temperature range --------------------------------------------------------------------- Storage temperature range ESD Susceptibility --------------------------------------------------------------------- 250mW -40°C to +85°C -55°C to +125°C HBM (Human Body Mode) ------------------------------------------------------------------------------- >1KV MM (Machine Mode) --------------------------------------------------------------------------------------- >200V DS9261 Ver2.4 Jan. 2007 4 EUP9261 Ordering Information Order Number Package Type Marking Operating Temperature range EUP9261AJVIR1 SOT-23-6 BJ □ □ -40°C to 85°C EUP9261AJVIR0 SOT-23-6 BJ □ □ -40°C to 85°C EUP9261BJVIR1 SOT-23-6 BT □ □ -40°C to 85°C EUP9261BJVIR0 SOT-23-6 BT □ □ -40°C to 85°C EUP9261BOVIR1 SOT-23-6 BO □ □ -40°C to 85°C EUP9261BOVIR0 SOT-23-6 BO □ □ -40°C to 85°C EUP9261BQVIR1 SOT-23-6 BQ □ □ -40°C to 85°C EUP9261BQVIR0 SOT-23-6 BQ □ □ -40°C to 85°C EUP9261BPVIR1 SOT-23-6 BP □ □ -40°C to 85°C EUP9261BPVIR0 SOT-23-6 BP □ □ -40°C to 85°C EUP9261BBVIR1 SOT-23-6 BB □ □ -40°C to 85°C EUP9261BBVIR0 SOT-23-6 BB □ □ -40°C to 85°C EUP9261BFVIR1 SOT-23-6 BF □ □ -40°C to 85°C EUP9261BFVIR0 SOT-23-6 BF □ □ -40°C to 85°C EUP9261BJSIR1 STDFN-6 □□□ BT -40°C to 85°C EUP9261□□ □ □ □ □ Lead Free Code 1:Lead Free 0:Lead Packing R: Tape& Reel Operating temperature range I: Industry Standard Package Type V: SOT-23-6, S: STDFN-6 Model No. DS9261 Ver2.4 Jan. 2007 5 EUP9261 Application Circuit Figure2. Symbol Parts FET1 N channel MOSFET FET2 N channel MOSFET R1 Resistor C1 Capacitor R2 Resistor Purpose Charge control Discharge control Recommend min. -- -- -- -- max. -- -- Remarks Threshold voltage ≤ Overdischarge detection voltage *1 Gate to source withstand voltage ≥ Charge voltage*2 Threshold voltage ≤ Overdischarge detection voltage *1 Gate to source withstand voltage ≥ Charge voltage*2 470Ω 300Ω 1kΩ Resistance should be as small as possible to avoid lowering of the overcharge detection accuracy caused by VDD pin current. *3 For power fluctuation 0.1µF 0.022µF 1.0µF Install a capacitor of 0.022µF or higher between VDD and VSS. *4 Protection for reverse connection 2kΩ 300Ω 4kΩ Select a resistance as large as possible to prevent current when a charger is reversely connected. *5 ESD protection For power fluctuation of a charger *1 If the threshold voltage of an EFT is low, the FET may not cut the charging current. If an FET with a threshold voltage equal to or higher than the overdischarge detection voltage is used, discharging may be stoped before overdischarge is detected. *2 If the withstand voltage between the gate and source is lower than the charger voltage, the FET may destroy. *3 If R1 has a high resistance, the voltage between VDD and VSS may exceed the absolute maximum rating when a charger is connected reversely since the current flows from the charger to the IC. Insert a resistor of 300Ω or higher as R1 for ESD protection. *4 If a capacitor of less than 0.022µF is installed as C1,DO may oscillate when load short-circuiting is detected. Be sure to install a capacitor of 0.022µF or higher as C1. *5 If R2 has a resistance higher than 4kΩ, the charging current may not be cut when a high-voltage charger is connected. Remark The DP pin should be open. Caution The above connection diagram and constant will not guarantee successful operation. Perform through evaluation using the actual application to set the constant. DS9261 Ver2.4 Jan. 2007 6 EUP9261 Product name list Overcharge detection voltage[VCU] Overcharge Hysteresis voltage[VHC] EUP9261AJ 4.325 V EUP9261BJ 4.28 EUP9261BO Overdischarge detection voltage [VDL] Overdischarge hysteresis voltage [VHD] Overcurrent 1 detection voltage [VIOV1] 0V battery charge function 0.25V 2.5V 0.4V 0.150V Unavailable 0.2V 3.0V 0V 0.080V Available 4.28 0.2V 2.3V 0V 0.040V EUP9261BQ 4.28 0.2V 2.9V 0.1V 0.030V Available Available EUP9261BP 4.35 0.2V 2.3V 0.7V 0.200V Available EUP9261BB 4.28 0.3V 2.3V 0.1V 0.125V Available EUP9261BF 4.28 0.2V 2.8V 0V 0.050V Available Model No. Model No. Overcharge detection delay time Overdischarge detection delay time Overcurrent 1 detection delay time EUP9261AJ 1.3s 175ms 12ms EUP9261BJ 1.3s 12ms EUP9261BO 1.3s 175ms 175ms 1.3s 175ms 12ms EUP9261BF 1.3s 175ms 12ms EUP9261BP 144ms 40ms 20ms EUP9261BB 144ms 40ms 20ms EUP9261BQ 12ms Note: It is possible to change the detection voltages of the product other than above. The delay times can also be changed within the range listed bellow. For details, please contact our sales office. DS9261 Ver2.4 Jan. 2007 7 EUP9261 Electrical Characteristics (1) Except detection delay time (25°C) Symbol Parameter Remark Min (Ta=25°C unless otherwise specified) Measurement Typ Max Unit circuit Detection Voltage VHC VCU +0.025 VCU +0.030 VHC +0.025 VDL -0.050 VDL VDL +0.050 V 2 ----- VHD -0.050 VHD VHD +0.050 V 2 Overcurrent 1 detection voltage VIOV1=0.05V to 0.3V,10mV Step ----- VIOV1 -0.015 VIOV1 VIOV1 +0.015 V 2 Overcurrent 2 detection voltage ----- 0.4 0.5 0.6 V 2 ----- 0.7 1 1.3 V 2 ----- -1.3 -1.0 -0.7 V 2 Operation voltage between VDD and VSS Internal circuit operating voltage 1.5 -- 8 V --- VDSOP2 Operation voltage between VDD and VM Internal circuit operating voltage 1.5 -- 28 V --- VDD=3.5 V, VVM =0 V 1.0 3.0 6.0 µA 2 VDD=VVM =1.5 V -- -- 0.1 µA 2 VCO=3.0V,VDD=3.5V VVM =0 V 2.5 5 10 kΩ 4 2.5 5 10 kΩ 4 2.5 5 10 kΩ 4 2.5 5 10 kΩ 4 VDD=1.8 V, VVM =0 V 100 300 900 kΩ VDD=3.5 V, VVM =1.0 V 15 35 60 kΩ 3 1.2 -- -- V 2 -- -- 0.5 V 2 VCU ----- Overcharge detection voltage VCU =3.9 V to 4.4 V, 5 mV Step Ta = -5°C to 55°C*1 VHC Overcharge hysteresis voltage VHC=0.0V to 0.4V, 50mV Step ----- VDL Overdischarge detection voltage VDL=2.0 V to 3.0 V, 10 mV Step ----- VHD Overdischarge hysteresis voltage VHD=0.0V to 0.7V, 100mV Step VIOV1 VIOV2 VSHORT Load short-circuiting detection voltage VCHA Charge detection voltage VCU -0.025 VCU -0.030 VHC -0.025 VCU VCU V 1 V 1 Input Voltage, Operation Voltage VDSOP1 Current Consumption IOPE Current consumption operation in normal IPDN Current consumption at power down Output Resistance RCOH CO pin H resistance RCOL CO pin L resistance RDOH DO pin H resistance RDOL DO pin L resistance VCO=0.5 V, VDD= 4.5V, VVM =0 V VDO=3.0 V, VDD=3.5V, VVM =0 V VDO=0.5V VDD=VVM =1.8 V VM Internal Resistance RVMD RVMS Internal resistance between VM and VDD Internal resistance between VM and VSS 3 0V battery charging function V0CHA V0INH 0V battery charge starting charger voltage 0V battery charge inhibition battery voltage 0V battery charging available 0V battery charging unavailable *1. Since products are not screened at low and high temperature, the specification for this temperature range is guaranteed by design not tested in production. DS9261 Ver2.4 Jan. 2007 8 EUP9261 1 Electrical Characteristics (2) Except detection delay time (-40°C to +85°C* ) Symbol Parameter Remark (Ta= -40°C to +85°C*1 unless otherwise specified) Measurement Min Typ Max Unit circuit Detection Voltage VCU VHC VDL VHD Overcharge detection voltage VCU=3.9 V to 4.4 V, 5 mV Step Overcharge hysteresis voltage VHC=0.0V to 0.4V, 50mV Step --------- Overdischarge detection voltage VDL=2.0 V to 3.0 V, 10 mV Step Overdischarge hysteresis voltage VHD=0.0V to 0.7V, 100mV Step VCU -0.055 VHC -0.030 VCU VHC VCU +0.040 VHC +0.030 V 1 V 1 ----- VDL -0.080 VDL VDL +0.080 V 2 ----- VHD -0.050 VHD VHD +0.050 V 2 VIOV1 Overcurrent 1 detection voltage VIOV1=0.05V to 0.3V,10mV Step ----- VIOV1 -0.025 VIOV1 VIOV1 +0.025 V 2 VIOV2 Overcurrent 2 detection voltage ----- 0.37 0.5 0.63 V 2 ----- 0.5 1 1.5 V 2 ----- -1.5 -1.0 -0.5 V 2 1.5 -- 8 V --- 1.5 -- 28 V --- VDD=3.5 V, VVM = 0 V 0.7 3.0 8.0 µA 2 VDD=V, VVM =1.5 V -- -- 0.1 µA 2 VSHORT Load short-circuiting detection voltage VCHA Charge detection voltage Input Voltage, Operation Voltage VDSOP1 Operation voltage between VDD and VSS VDSOP2 Operation voltage between VDD and VM Internal circuit operating voltage Internal circuit operating voltage Current Consumption IOPE Current consumption operation in normal IPDN Current consumption at power down Output Resistance RCOH CO pin H resistance VCO = 3.0 V, VDD=3.5V, VVM = 0 V 1.2 5 15 kΩ 4 RCOL CO pin L resistance VCO=0.5 V, VDD=4.5V, VVM = 0 V 1.2 5 15 kΩ 4 RDOH DO pin H resistance VDO=3.0 V, VDD=3.5V, VVM = 0 V 1.2 5 15 kΩ 4 RDOL DO pin L resistance VDO=0.5V, VDD=VVM = 1.8V 1.2 5 15 kΩ 4 VM internal resistance RVMD Internal resistance between VM and VDD VDD=1.8 V, VVM =0 V 78 300 1310 kΩ 3 RVMS Internal resistance between VM and VSS VDD=3.5 V, VVM =1.0 V 10 35 70 kΩ 3 1.7 -- -- V 2 -- -- 0.3 V 2 0V battery charging function V0CHA V0INH 0V battery charge starting charger voltage 0V battery charge inhibition battery voltage 0V battery charging available 0V battery charging unavailable *1.Since products are not screened at low and high temperature, the specification for this temperature range is guaranteed by design, no tested in production. DS9261 Ver2.4 Jan. 2007 9 EUP9261 Electrical Characteristics (3) Detection delay time (I) EUP9261 AJ, EUP9261BJ, EUP9261BO, EUP9261BQ, EUP9261BF Symbol Parameter Remark Min. Typ. Max. Unit Measurement circuit Delay time (25°C) tCU tDL tIOV1 tIOV2 tSHORT Overcharge detection delay time Overdischarge detection delay time Overcurrent 1 detection delay time Overcurrent 2 detection delay time Load short-circuiting detection delay time ----------------- 0.91 122 8.4 2.1 1.3 175 12 3 1.69 228 15.6 3.9 s ms ms ms 5 5 5 5 ----- 200 320 500 µs 5 Delay time (-40°C to +85°C) *1 tCU tDL tIOV1 tIOV2 Overcharge detection delay time Overdischarge detection delay time Overcurrent 1 detection delay time Overcurrent 2 detection delay time ----------------- 0.72 97 6.7 1.5 1.3 175 12 3 2.16 291 20 5 s ms ms ms 5 5 5 5 tSHORT Load short-circuiting detection delay time ----- 150 320 600 µs 5 Min. Typ. Max. Unit Measurement circuit (II) EUP9261BB, EUP9261BP Symbol Parameter Remark Delay time (25°C) tCU tDL tIOV1 tIOV2 Overcharge detection delay time Overdischarge detection delay time Overcurrent 1 detection delay time Overcurrent 2 detection delay time ----------------- 100 28 14 2.1 144 40 20 3 187 52 26 3.9 ms ms ms ms 5 5 5 5 tSHORT Load short-circuiting detection delay time ----- 200 320 500 µs 5 Delay time (-40°C to +85°C) *1 tCU tDL tIOV1 tIOV2 tSHORT Overcharge detection delay time Overdischarge detection delay time Overcurrent 1 detection delay time Overcurrent 2 detection delay time ----------------- 80 22.2 11 1.5 144 40 20 3 240 66.6 33 5 ms ms ms ms 5 5 5 5 Load short-circuiting detection delay time ----- 150 320 600 µs 5 DS9261 Ver2.4 Jan. 2007 10 EUP9261 Measurement Circuits (4) Measurement Condition 4, Measurement Circuit 2 <Charger detection voltage, abnormal charge current detection voltage.> Unless otherwise specified, the output voltage levels “H” and “L” at CO and DO pins are judged by the threshold voltage (1.0 V) of the N channel FET. Judge the CO pin level with respect to VVM and the DO pin level with respect to VSS. Set V1=1.8V and V2=0V. Increase V1 gradually until V1=VDL+(VHD/2) , then decrease V2 from 0V gradually. The voltage between VM and VSS when VDO goes “H” from “L” is the charger detection voltage (VCHA). Charger detection voltage can be measured only in the product whose overdischarge hysteresis VHD ≠ 0. Set V1=3.5V and V2=0V. Decrease V2 from 0V gradually. The voltage between VM and VSS when VCO goes “L” from “H” is the abnormal charge current detection voltage. The abnormal charge current detection voltage has the same value as the charger detection voltage (VCHA). (1) Measurement Condition 1, Measurement Circuit 1 <Overcharge detection voltage, Overcharge hysteresis voltage.> The overcharge detection voltage (VCU) is defined by the voltage between VDD and VSS at which VCO goes “L” from “H” when the voltage V1 is gradually increased from the starting condition V1=3.5V. The overcharge hysteresis voltage (VHC) is then defined by the difference between the overcharge detection voltage (VCU) and the voltage between VDD and VSS at which VCO goes “H” from “L” when the voltage V1 is gradually decreased. (5) Measurement Condition 5, Measurement Circuit 2 <Normal operation current consumption, Power-down current consumption.> Set V1=3.5V and V2=0V under normal condition. The current IDD flowing through VDD pin is the normal operation consumption current (IOPE). Set V1=V2=1.5V under overdischarge condition. The current IDD flowing through VDD pin is the power-down current consumption (IPDN). (2) Measurement Condition 2, Measurement Circuit 2 <Overdischarge detection voltage, Overdischarge hysteresis voltage > The overdischarge detection voltage (VDL) is defined by the voltage between VDD and VSS at which VDO goes “L” from “H” when the voltage V1 is gradually decreased from the starting condition V1=3.5V and V2 =0V. The overdischarge hysteresis voltage (VHD) is then defined by the difference between the overdischarge detection voltage (VDL) and the voltage between VDD and VSS at which VDO goes “H” from “L” when the voltage V1 is gradually increased. (6) Measurement Condition 6, Measurement Circuit 3 < Internal resistance between VM and VDD, Internal resistance between VM and VSS. > Set V1=1.8V and V2=0V. The resistance between VM and VDD is the internal resistance (RVMD) between VM and VDD. Set V1=3.5V and V2=1.0V. The resistance between VM and VSS is the internal resistance (RVMS) between VM and VSS. (3) Measurement Condition 3, Measurement Circuit 2 <Overcurrent 1 detection voltage, Overcurrent 2 detection voltage, Load short-circuiting detection voltage.> (7) Measurement Condition 7, Measurement Circuit 4 <CO pin H resistance, CO pin L resistance> The overcurrent 1 detection voltage (VIOV1) is defined by the voltage between VM and VSS at which VDO goes ”L” from “H” when the voltage V2 is gradually increased from the normal condition V1 =3.5V and V2 =0V. Set V1=3.5V, V2=0V and V3=3.0V. CO pin resistance is the CO pin H resistance (RCOH). Set V1=4.5V, V2=0V and V3=0.5V. CO pin resistance is the CO pin L resistance (RCOL). The overcurrent 2 detection voltage (VIOV2) is defined by the voltage between VM and VSS at which VDO goes “L” from “H” when the voltage V2 is increased at the speed between 1ms and and 4ms from the normal condition V1=3.5V and V2 = 0V. (8) Measurement Condition 8, Measurement Circuit 4 <DO pin H resistance, DO pin L resistance.> Set V1=3.5V, V2=0V and V4=3.0V. DO pin resistance is the DO pin H resistance (RDOH).Set V1=1.8V,V2= 0V and V4=0.5 V. DO pin resistance is the DO pin L resistance (RDOL). The load short-circuiting detection voltage (VSHORT) is defined by the voltage between VDD and VSS at which VDO goes “L” from “H” when the voltage V2 is increased at the speed between 1µs and 50µs from the normal condition V1=3.5V and V2=0V. DS9261 Ver2.4 Jan. 2007 11 EUP9261 Set V1=3.5V and V2=0V. Increase V2 from 0V to 1.6V momentarily (within 10µs). The time needed for VDO to go “L” is the load short-circuiting detection delay time (tSHORT). (9) Measurement Condition 9, Measurement Circuit 5 <Overcharge detection delay time, Overdischarge detection delay time.> The overcharge detection delay time (tCU) is the time needed for VCO to change from “H” to “L” just after the V1 rapid increase within 10 µs from the overcharge detection voltage (VCU) - 0.2V to the overcharge detection voltage (VCU) + 0.2V in the condition V2=0V. The overdischarge detection delay time (tDL) is the time needed for VDO to change from “H” to “L” just after the V1 rapid decrease within 10µs from the overdischarge detection voltage (VDL)+0.2V to the overdischarge detection voltage (VDL) . 0.2V in the condition V2=0V. Set V1=3.5V and V2=0V. Decrease V2 from 0V to 1.1V momentarily (within 10µs). The time needed for VCO to go “L” is the abnormal charge current detection delay time. The abnormal charge current detection delay time has the same value as the overcharge detection delay time. (11) Measurement Condition 11, Measurement Circuit 2 (Product with 0V battery charge function) <0V battery charge starting charge voltage> (10) Measurement Condition 10, Measurement Circuit 5 <Overcurrent 1 detection delay time, Overcurrent 2 detection delay time , Load short – circuiting detection delay time , Abnormal charge current detection delay time. > Set V1=V2=0V and decrease V2 gradually. The voltage between VDD and VM when VCO goes ”H” (VVM+0.1V or higher) is the 0V battery charge starting charger voltage (V0CHA). Set V1=3.5V and V2=0V. Increase V2 from 0V to 0.35 V momentarily (within 10µs). The time needed for VDO to go “L” is overcurrent 1 detection delay time (tIOV1).Set V1=3.5V and V2=0V. Increase V2 from 0V to 0.7V momentarily (within 10µs). The time needed for VDO to go “L” is overcurrent 2 detection delay time (tIOV2). (12) Measurement Condition 12, Measurement Circuit 2 (Product with 0V battery charge inhibition function) <0V battery charge inhibition battery voltage> DS9261 Ver2.4 Jan. 2007 Set V1=0V and V2=4V. Increase V1 gradually. The voltage between VDD and VM when VCO goes ”H” (VVM+0.1V or higher) is the 0V battery charge inhibition battery voltage (V0INH). 12 EUP9261 Measurement Circuit Measurement Circuit 1 Measurement Circuit 2 Measurement Circuit 3 Measurement Circuit 4 Measurement Circuit 5 DS9261 Ver2.4 Jan. 2007 13 EUP9261 Characteristics 1. Detection/release voltage temperature characteristics Overcharge detection voltage vs. temperature 4.04 4.32 4.02 4.30 4.00 VCL(V) VCU(V) 4.34 Overcharge release voltage vs. temperature 4.28 4.26 3.98 3.96 3.94 4.24 3.92 4.22 -50 -25 0 25 Ta(℃) 50 75 -50 100 -25 2.54 2.92 2.52 2.90 VDU(V) VDL(V) 2.94 2.5 100 2.48 2.88 2.86 2.46 2.84 2.44 2.82 25 50 Ta(℃) 75 100 -50 -25 Figure5. 0 25 50 Ta(℃) 75 100 Figure6. Overcurrent1 detection voltage vs. temperature 0.3 1.50 0.25 1.25 0.2 1.00 Viov2(V) Viov1(V) 75 Overdischarge release voltage vs. temperature 2.56 0 50 Figure4. Overdischarge detection voltage vs. temperature -25 25 Ta(℃) Figure3. -50 0 0.15 0.1 0.05 Overcurrent 2 detection voltage temperature 0.75 0.50 0.25 0.00 0 -50 -25 0 25 50 75 100 -50 Ta(℃) Figure7. DS9261 Ver2.4 Jan. 2007 -25 0 25 50 Ta(℃) Figure8. 14 75 100 EUP9261 Load short-circuting detection voltage vs. temperature 2.20 Vshort(V) 2.00 1.80 1.60 1.40 1.20 1.00 -50 -25 0 25 50 75 100 Ta(℃) Figure9. 2. Current consumption temperature characteristics Current consumption vs. temperature in power-down mode 8.00 0.0600 7.00 0.0500 6.00 0.0400 Ipdn(uA) Iope(uA) Curremt consumption vs. temperature in normal mode 5.00 4.00 3.00 0.0300 0.0200 0.0100 2.00 0.0000 -50 -25 0 25 Ta(℃) 50 75 100 -50 -25 0 Figure10. 25 50 Ta(℃) 75 100 Figure11. 3. Detection/release delay time temperature characteristics Overdischarge detection delay time vs.temperature 2.3 260 2 230 1.7 200 Tdl(ms) Tcu(s) Overcharge detection delay time vs.temperature 1.4 1.1 0.8 170 140 110 0.5 80 -50 -25 0 25 Ta(℃) 50 75 100 -50 Figure12. DS9261 Ver2.4 Jan. 2007 -25 0 25 Ta(℃) 50 Figure13. 15 75 100 EUP9261 Overcurrent 2 detection delay time vs. temperature 17 6 15 5 Tiov2(ms) Tiov1(ms) Overcurrent 1 detection delay time vs. temperature 13 11 9 3 2 7 1 5 0 -50 -25 0 25 50 75 -50 100 500 400 300 200 25 50 75 100 Ta(℃) Figure16. DS9261 Ver2.4 Jan. 2007 50 Figure15. 600 0 25 Figure14. 700 -25 0 Ta(℃) 800 -50 -25 Ta(℃) Load short-circuiting delaytime vs. temperature Tshort(us) 4 16 75 100 EUP9261 Description of Operation Normal condition Overcharge condition The EUP9261 monitors the voltage of the battery connected between VDD and VSS pin and the voltage difference between VM and VSS pin to control charging and discharging. When the battery voltage is in the range from the overdischarge detection voltage (VDL) to the overcharge detection voltage (VCU), and the VM pin voltage is in the range from the charger detection voltage (VCHA) to the overcurrent 1 detection voltage (VIOV1), the IC turns both the charging and discharging control FETs on. This condition is called the normal condition, and in this condition charging and discharging can be carried out freely. Note: When a battery is connected to the IC for the first time, the battery may not enter dischargeable state. In this case, set the VM pin voltage equal to the VSS voltage or connect a charger to enter the normal condition. When the battery voltage becomes higher than the overcharge detection voltage (VCU) during charging under the normal condition and the detection continues for the overcharge detection delay time (tCU) or longer, the EUP9261 turns the charging control FET off to stop charging. This condition is called the overcharge condition. The overcharge condition is released by the following two cases ((1) and (2)): (1) When the battery voltage falls below the overcharge release voltage, which is equal to the overcharge detection voltage (VCU) overcharge detection hysteresis voltage (VHC), the EUP9261 turns the charging control FET on and turns to the normal condition. (2) When a load is connected and discharging starts, the EUP9261 turns the charging control FET on and returns to the normal condition. Just after the load is connected and discharging starts, the discharging current flows through the parasitic diode in the charging control FET. At this moment the VM pin potential becomes Vf -volt, the voltage for the parasitic diode, higher than VSS level. When the battery voltage goes under the overcharge detection voltage (VCU) and provided that the VM pin voltage is higher than the overcurrent 1 detection voltage, the EUP9261 releases the overcharge condition. Note1: If the battery is charged to a voltage higher than the overcharge detection voltage (VCU) and the battery voltage does not fall below the overcharge detection voltage (VCU) even when a heavy load is connected, the detection of overcurrent 1, overcurrent 2 and load short-circuiting does not work. Since an actual battery has the internal impedance of several dozens of mΩ, the battery voltage drops immediately after a heavy load which causes overcurrent is connected, and the detection of overcurrent 1, overcurrent 2 and load short-circuiting then works. Note2: When a charger is connected after the overcharge detection, the overcharge condition is not released even if the battery voltage is below the overcharge release voltage (VCL (＝Vcu －VHC)). The overcharge condition is released when the VM pin voltage goes over the charger detection voltage (VCHA) by removing the charger. Overcurrent condition (Detection of Overcurrent 1, Overcurrent 2 and Load short-circuiting) When the condition in which VM pin voltage is equal to or higher than the overcurrent detection voltage, condition that caused by the excess of discharging current over a specified value, continues longer than the overcharge detection delay time in a battery under the normal condition, the EUP9261 turns the discharging control FET off to stop discharging. This condition is called the overcurrent condition. Though the VM and VSS pins are shorted by the RVMS resistor in the IC under the overcurrent condition, the VM pin voltage is pulled to the VDD level by the load as long as the load is connected. The VM pin voltage returns to VSS level when the load is released. The overcurrent condition returns to the normal condition when the impedance between the EB+ and EB- pin (see Figure 2) becomes higher than the automatic recoverable impedance, and the IC detects that the VM pin potential is lower than the overcurrent 1 detection voltage (VIOV1). Note: The automatic recoverable impedance changes depending on the battery voltage and overcurrent 1 detection voltage settings. DS9261 Ver2.4 Jan. 2007 17 EUP9261 Overdischarge condition Abnormal charge current detection is released when the voltage difference between VM pin and VSS pin becomes less than charger detection voltage (VCHA). When the battery voltage falls below the overdischarge detection voltage (VDL) during discharging under the normal condition and the detection continues for the overdischarge detection delay time (tDL) or longer, the EUP9261 turns the discharging control FET off to stop discharging. This condition is called the overdischarge condition. When the discharging control FET turns off, the VM pin voltage is pulled up by the RVMD resistor between VM and VDD in the IC. The voltage difference between VM and VDD then falls bellow 1.3V (typ.), the current consumption is reduced to the power-down current consumption (IPDN). This condition is called the power-down condition. The power-down condition is released when a charger is connected and the voltage difference between VM and VDD becomes 1.3V (typ.) or higher. Moreover when the battery voltage becomes the overdischarge detection voltage (VDL) or higher, the EUP9261 turns the discharging FET on and returns to the normal condition. Delay circuits The detection delay times are generated by dividing the approximate 3.5 KHz clock with a counter. Note1: The detection delay time for overcurrent 2 and load short-circuiting start when the overcurrent 1 is detected. As soon as the overcurrent 2 or load short-circuiting is detected over the detection delay time for overcurrent 2 or load short-circuiting after the detection of Overcurrent 1, the EUP9261 turns the discharging control FET off. Charger detection When a battery in the overdischarge condition is connected to a charger and provided that the VM pin voltage is lower than the charger detection voltage (VCHA), the EUP9261 releases the overdischarge condition and turns the discharging control FET on as the battery voltage becomes equal to or higher than the overdischarge detection voltage (VDL) since the charger detection function works. This action is called charger detection. When a battery in the overdischarge condition is connected to a charger and provided that the VM pin voltage is not lower than the charger detection voltage (VCHA), the EUP9261 releases the Overdischarge condition when the battery voltage reaches the overdischarge detection voltage (VDL) overdischarge hysteresis (VHD) or higher. Figure17. Note2: When the overcurrent is detected and it continues for longer than the Overdischarge detection delay time without releasing the load, the load, the condition changes to the power-down condition when the battery voltage falls below the Overdischarge detection voltage. Note3: When the battery voltage falls below the Overdischarge detection voltage due to the overcurrent, the EUP9261 turns the discharging control FET off by the overcurrent detection. And in this case the recovery of the battery voltage is so slow that the battery voltage after the Overdischarge detection delay time is still lower than the Overdischarge detection voltage, the EUP9261 transits to the power-down condition. Abnormal charge current detection If the VM pin voltage falls below the charger detection voltage (VCHA) during charging under normal condition and it continues for the overcharge detection delay time (tCU) or longer, the charging control. FET turns off and charging stops. This action is called the abnormal charge current detection. Abnormal charge current detection works when the DO pin voltage is “H” and the VM pin voltage falls below the charger detection voltage (VCHA). Consequently, if an abnormal charge current flows to an over-discharged battery, the EUP9261 turns the charging control FET off and stops charging after the battery voltage becomes higher than the overdischarge detection voltage which make the DO pin voltage “H”, and still after the overcharge detection delay time (tCU) elapses. DS9261 Ver2.4 Jan. 2007 18 EUP9261 DP pin 0V battery charge inhibition function*1 The DP pin is a test pin for delay time measurement and for output delay time reduction or bypass. It should be open or VDD level in the actual application. For reducing delay time, connect this pin with a 300kΩ resistor to VSS. An internal clock can be measured. Under this condition, output delay time of over-charge, over-discharge, over-current1 and over-current2 can be shorter than the setting value (delay time for over charge becomes about 1/64 of normal state). By forcing this pin to VSS, output delay time circuit can be disabled. This function inhibits the recharging when a battery which is short-circuited (0V) internally is connected. When the battery voltage is 0.6V (typ.) or lower, the charging control FET gate is fixed to EB- pin voltage to inhibit charging. When the battery voltage is the 0V battery charge inhibition battery voltage (V0INH) or higher, charging can be performed. *1.Some battery providers do not recommend charging for completely self-discharged battery. Please ask battery providers before determining the 0V battery charge function. *2.The 0V battery charge function has higher priority than the abnormal charge current detection function. Consequently, a product with the 0V battery charge function charges a battery forcedly and abnormal charge current cannot be detected when the battery voltage is low. 0V battery charge function*1*2 This function is used to recharge the connected battery whose voltage is 0V due to the self-discharge. When the 0V battery charge starting charge voltage (V0CHA) or higher is applied between EB+ pin and EB-pin by connecting a charger, the charging control FET gate is fixed to VDD pin voltage. When the voltage between the gate and source of the charging control FET becomes equal to or higher than the turn-on voltage e by the charger voltage, the charging control FET turns on to start charging. At this time, the discharging control FET is off and the charging current flows through the internal parasitic diode in the discharging control FET. When the battery voltage becomes equal to or higher than the overdischarge release voltage (VDU), the EUP9261 enters the normal condition. DS9261 Ver2.4 Jan. 2007 19 EUP9261 Operation Timing Chart 1. Overcharge and Overdischarge Detection Figure18. 2. Overcurrent Detection Figure19. Note: (1) Normal condition. (2) Overcharge condition. (3) Overdischarge condition. (4) Overcurrent condition The charger is supposed to charge with constant current DS9261 Ver2.4 Jan. 2007 20 EUP9261 3. Charger Detection Figure20. 4. Abnormal Charge Current Detection Figure21. Note: (1) Normal condition. (2) Overcharge condition. (3) Overdischarge condition. (4) Overcurrent condition The charger is supposed to charge with constant current DS9261 Ver2.4 Jan. 2007 21 EUP9261 Package Information SOT-23-6 SYMBOLS A A1 b D E1 e E L DS9261 Ver2.4 Jan. 2007 MILLIMETERS MIN. MAX. 1.45 0.00 0.15 0.30 0.50 2.90 1.60 0.95 2.60 3.00 0.30 0.60 22 INCHES MIN. 0.000 0.012 MAX. 0.057 0.006 0.020 0.114 0.063 0.037 0.102 0.012 0.118 0.024 EUP9261 Package Information STDFN-6 SYMBOLS A A1 b D D1 E E1 e L DS9261 Ver2.4 Jan. 2007 MILLIMETERS MIN. MAX. 0.50 0.60 0.00 0.05 0.15 0.35 1.85 2.15 1.40 1.85 2.15 0.80 0.65 0.25 0.45 23 INCHES MIN. 0.020 0.000 0.006 0.073 MAX. 0.024 0.002 0.014 0.085 0.055 0.073 0.085 0.031 0.026 0.010 0.018