TI1 BQ24005PWPRG4 Two-cell li-ion charge management ic Datasheet

bq24004
bq24005
bq24006
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SLUS476F – DECEMBER 2000 – REVISED MAY 2012
TWO-CELL Li-ION CHARGE MANAGEMENT IC
FOR PDAs AND INTERNET APPLIANCES
Check for Samples: bq24004, bq24005, bq24006
FEATURES
1
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2
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•
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•
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Highly Integrated Solution With FET Pass
Transistor and Reverse-Blocking Schottky and
Thermal Protection
Integrated Voltage and Current Regulation
With Programmable Charge Current
High-Accuracy Voltage Regulation (±1%)
Ideal for Low-Dropout Linear Charger Designs
for Two-Cell Li-Ion Packs With Coke or
Graphite Anodes
Up to 1.2-A Continuous Charge Current
Safety-Charge Timer During Preconditioning
and Fast Charge
Integrated Cell Conditioning for Reviving
Deeply Discharged Cells and Minimizing Heat
Dissipation During Initial Stage of Charge
Optional Temperature or Input-Power
Monitoring Before and During Charge
Various Charge-Status Output Options for
Driving Single, Double, or Bicolor LEDs or
Host-Processor Interface
Charge Termination by Minimum Current and
Time
Low-Power Sleep Mode
Packaging: 20-Lead TSSOP PowerPAD™
APPLICATIONS
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•
•
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PDAs
Internet Appliances
MP3 Players
Digital Cameras
DESCRIPTION
The bq2400x series ICs are advanced Li-Ion linear
charge management devices for highly integrated and
space-limited applications. They combine highaccuracy current and voltage regulation; FET passtransistor and reverse-blocking Schottky; battery
conditioning, temperature, or input-power monitoring;
charge termination; charge-status indication; and
charge timer in a small package.
The bq2400x measures battery temperature using an
external thermistor. For safety, the bq2400x inhibits
charge until the battery temperature is within the
user-defined thresholds. Alternatively, the user can
monitor the input voltage to qualify charge. The
bq2400x series then charge the battery in three
phases: preconditioning, constant current, and
constant voltage. If the battery voltage is below the
internal low-voltage threshold, the bq2400x uses lowcurrent precharge to condition the battery. A
preconditioning timer provides additional safety.
Following pre- conditioning, the bq2400x applies a
constant-charge current to the battery. An external
sense-resistor sets the magnitude of the current. The
constant-current phase is maintained until the battery
reaches the charge-regulation voltage. The bq2400x
then transitions to the constant voltage phase. The
user can configure the device for cells with either
coke or graphite anodes. The accuracy of the voltage
regulation is better than ±1% over the operating
junction temperature and supply voltage range.
Charge is terminated by maximum time or minimum
taper current detection
The bq2400x automatically restarts the charge if the
battery voltage falls below an internal recharge
threshold.
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2000–2012, Texas Instruments Incorporated
bq24004
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SLUS476F – DECEMBER 2000 – REVISED MAY 2012
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
PACKAGE
TJ
CHARGE STATUS
CONFIGURATION
20-LEAD HTTSOP PowerPAD™
(PWP) (1) (2)
bq24004PWP
–40°C to 125°C
(1)
(2)
Single LED
bq24005PWP
2 LEDs
bq24006PWP
Single bicolor LED
The PWP package is available taped and reeled. Add R suffix to device type (e.g., bq24005PWPR) to order. Quantities 2500 devices
per reel.
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com.
PACKAGE DISSIPATION RATINGS
(1)
PACKAGE
ΘJA
ΘJC
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
PWP (1)
30.88°C/W
1.19°C/W
3.238 W
0.0324 W/°C
This data is based on using the JEDEC high-K board and topside traces, top and bottom thermal pad (6,5 × 3,4 mm), internal 1-oz.
power and ground planes, 8 thermal via underneath the die connecting to ground plane.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted (1)
bq24004
bq24005
bq24006
Supply voltage (VCC with respect to GND)
13.5 V
Input voltage (IN, ISNS, EN, APG/THERM/CR/STAT1/STAT2, VSENSE, TMR SEL, VSEL) (all with
respect to GND)
13.5 V
Output current (OUT pins)
2A
Output sink/source current (STAT1 and STAT2)
10 mA
TA
Operating free-air temperature range
–40°C to 70°C
Tstg
Storage temperature range
–65°C to 150°C
TJ
Junction temperature range
–40°C to 125°C
Lead temperature (Soldering, 10 s)
(1)
300°C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
MIN MAX
UNIT
VCC
Supply voltage
8.4
10
V
VIN
Input voltage
8.4
10
V
1.2
A
125
°C
Continuous output current
TJ
2
Operating junction temperature range
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SLUS476F – DECEMBER 2000 – REVISED MAY 2012
ELECTRICAL CHARACTERISTICS
over recommended operating junction temperature supply and input voltages, and VI (VCC) ≥ VI (IN) ( unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
EN ≤ V(IHEN)
MAX
VCC current
VCC > VCC_UVLO,
VCC current, standby mode
EN ≤ V(ILEN)
1
IN current, standby mode
EN ≤ V(ILEN)
Standby current (sum of currents
into OUT and VSENSE pins)
VCC < VCC_UVLO,
VO(OUT) = 8.6 V,
VSENSE = 8.6 V
2
8
EN ≤ V(ILEN),
VO(OUT) = 8.6 V,
VSENSE = 8.6 V
2
8
1
UNIT
mA
µA
10
µA
µA
VOLTAGE REGULATION, 0°C ≤ TJ ≤ 125°C
Output voltage
VSEL = VSS,
0 < IO ≤ 1.2 A
8.118
8.20
8.282
VSEL = VCC,
0 < IO ≤ 1.2 A
8.316
8.40
8.484
Load regulation
1 mA ≤ IO≤ 1.2 A,VCC = 10 V, VI(IN)= 5 V,TJ = 25°C
Line regulation
VO(OUT) + VDO + V(ilim)MAX < VI(VCC) < 10 V, TJ = 25°C
Dropout voltage = VI(IN)-Vout
IO = 1.2 A, VO(OUT) + V(DO) + V(ilim)MAX < VI(VCC) < 10 V
V
1
mV
0.01
%/V
0.5
V
0.107
V
CURRENT REGULATION, 0°C ≤ TJ ≤ 125°C
Current regulation threshold,
VI(limit)
VSENSE < VO(VSEL-LOW/HIGH)
Delay time
VSENSE pulsed above V(LOWV) to IO = 10% of regulated
value (1)
Rise time
IO increasing from 10% to 90% of regulated value,
R(SNS) ≥ 0.2 Ω (1)
0.093
0.1
1
ms
0.1
1
ms
0.083
1
Ω
60
80
mA
V
CURRENT SENSE RESISTOR, 0°C ≤ TJ ≤ 125°C
External current sense resistor
range R(SNS)
100 mA ≤ (ilim) ≤ 1.2
A
PRECHARGE CURRENT REGULATION, 0°C ≤ TJ ≤ 125°C
Precharge current regulation
VSENSE<V(LOWV), 0.083 ≤ R(SNS)≤ 1.0 Ω
40
VCC UVLO COMPARATOR, 0°C ≤ TJ ≤ 125°C
Start threshold
8.75
8.9
9.0
Stop threshold
8.50
8.66
8.8
Hysteresis
50
V
mV
APG/THERM COMPARATOR, 0°C ≤ TJ ≤ 125°C
Upper trip threshold
1.480
1.498
1.515
Lower trip threshold
0.545
0.558
0.570
V
1
µA
Input bias current
V
LOWV COMPARATOR, 0°C ≤ TJ ≤ 125°C
Start threshold
5.60
5.75
5.90
V
Stop threshold
6.10
6.25
6.40
V
Hysteresis
100
mV
HIGHV (RECHARGE) COMPARATOR, 0°C ≤ TJ ≤ 125°C
Start threshold
7.70
7.85
8.00
V
Start threshold
8.85
9.00
9.15
V
Stop threshold
8.45
8.60
8.75
OVERV COMPARATOR, 0°C ≤ TJ ≤ 125°C
Hysteresis
50
V
mV
TAPERDET COMPARATOR, 0°C ≤ TJ ≤ 125°C
Trip threshold
12
18.5
25
mV
EN LOGIC INPUT, 0°C ≤ TJ ≤ 125°C
High-level input voltage
2.25
Low-level input voltage
Input pulldown resistance
(1)
100
V
0.8
V
200
kΩ
Specified by design, not production tested.
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ELECTRICAL CHARACTERISTICS (continued)
over recommended operating junction temperature supply and input voltages, and VI (VCC) ≥ VI (IN) ( unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VSEL LOGIC INPUT, 0°C ≤ TJ ≤ 125°C
High-level input voltage
2.25
V
Low-level input voltage
Input pulldown resistance
100
0.8
V
200
kΩ
TMR SEL INPUT 0°C ≤ TJ ≤ 125°C
High-level input voltage
2.7
V
Low-level input voltage
Input bias current
VI(TMR SEL) ≤ 5 V
0.6
V
15
µA
STAT1, STAT2 (bq24004, bq24006), 0°C ≤ TJ ≤ 125°C
Output (low) saturation voltage
Output (high) saturation voltage
Output turn on/off time
IO = 10 mA
1.5
IO = 4 mA
0.6
IO = –10 mA
VCC–1.5
IO = –4 mA
VCC–0.5
IO = ± 10 mA, C = 100 pF
V
V
(2)
100
µs
POWER-ON RESET (POR), 0°C ≤ TJ ≤ 125°C
POR delay
See
(2)
1.2
3
ms
POR falling-edge deglitch
See
(2)
25
75
µs
25
75
µs
15%
15%
APG/THERM DELAY, 0°C ≤ TJ ≤ 125°C
APG/THERM falling-edge
deglitch
See
(2)
TIMERS, 0°C ≤ TJ ≤ 125°C
User-selectable timer accuracy
TA = 25°C
20%
Precharge and taper timer
20%
22.5
minute
THERMAL SHUTDOWN, 0°C ≤ TJ ≤ 125°C
Thermal trip
See
(2)
165
°C
Thermal hysteresis
See
(2)
10
°C
CR PIN, 0°C ≤ TJ ≤ 125°C
Output voltage
(2)
4
0 < IO(CR) < 100 µA
2.816
2.85
2.88
V
Specified by design, not production tested.
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SLUS476F – DECEMBER 2000 – REVISED MAY 2012
PIN ASSIGNMENTS
bq24005, bq24006
PWP PACKAGE
(TOP VIEW)
bq24004
PWP PACKAGE
(TOP VIEW)
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
N/C
IN
IN
VCC
ISNS
N/C
APG/THERM
EN
VSEL
GND/HEATSINK
N/C
OUT
OUT
VSENSE
AGND
N/C
STAT1
TMR SEL
CR
N/C
N/C
IN
IN
VCC
ISNS
N/C
APG/THERM
EN
VSEL
GND/HEATSINK
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
N/C
OUT
OUT
VSENSE
AGND
STAT2
STAT1
TMR SEL
CR
N/C
N/C - Do not connect
TERMINAL FUNCTIONS
TERMINAL
NAME
NO.
I/O
DESCRIPTION
AGND
16
APG/THERM
7
I
Adapter power good input/thermistor sense input
CR
12
I
Internal regulator bypass capacitor
EN
8
I
Charge-enable input. Active-high enable input with internal pull down. Low-current stand-by mode
active when EN is low.
GND/HEATSIN
K
10
IN
2, 3
I
Input voltage. This input provides the charging voltage for the battery.
5
I
Current sense input
ISNS
N/C
1, 6, 11,
15, 20
OUT
Ground pin; connect close to the negative battery terminal.
Ground pin; connect to PowerPAD heat-sink layout pattern.
No connect. These pins must be left floating. Pin 15 is N/C on bq24004PWP only.
18, 19
O
Charge current output
STAT1
14
O
Status display output 1
STAT2
15
O
Status display output 2 (for bq24005 and bq24006 only)
TMR SEL
13
I
Charge timer selection input
VCC
4
I
Supply voltage
VSEL
9
I
8.2-V or 8.4-V charge regulation selection input
VSENSE
17
I
Battery voltage sense input
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FUNCTIONAL BLOCK DIAGRAM
OUT
IN
+
VSENSE
TaperDet
-
V(ilim)
VCC
+
-
ISNS
+
0.2*V(ilim)
V(ref)
AGND
+
ChargeOK
UVS
Precharge
-
GND/
HEATSINK
LowV
V(uvlo)
OverV
+
Bias and
Ref
Generator
HighV
+
V(ref) V(uvlo)
LowV
ChipEN
-
EN
VSEL
R8
+
Power On
Delay
APG/
THERM
+
-
R9
-
H: V(reg) = 8.4 V/Cell
L: V(reg) = 8.2 V/Cell
V(ref)
CLRFLT
PWRDWN
+
Thermal
Shutdown
-
UVS
VCC
TaperDet
STAT1
PWRDWN
PWRDWN
OSC
VCC
Charge Control, Charge Timer
and
Display Logic
TMR SEL
STAT2
REG
Two Open
Drain
Outputs
for
bq24005
ChargeOK
CR
6
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SLUS476F – DECEMBER 2000 – REVISED MAY 2012
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
OUTPUT VOLTAGE
vs
JUNCTION TEMPERATURE
V(IN) = 10 V
o
TA = 25 C
TJ - Junction Temperature - oC
Figure 1.
Figure 2.
OUTPUT VOLTAGE
vs
INPUT VOLTAGE
CURRENT SENSE VOLTAGE
vs
INPUT VOLTAGE
IO = 100 mA
TA = 25oC
IO = 100 mA
o
TA = 25 C
Figure 3.
Figure 4.
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TYPICAL CHARACTERISTICS (continued)
CURRENT SENSE VOLTAGE
vs
JUNCTION TEMPERATURE
VCC = 10 V
IO = 100 mA
o
TA = 25 C
QUIESCENT CURRENT
vs
INPUT VOLTAGE
TA = 25oC
TJ - Junction Temperature - oC
Figure 5.
Figure 6.
QUIESCENT CURRENT (POWER DOWN)
vs
INPUT VOLTAGE
DROPOUT VOLTAGE
vs
INPUT VOLTAGE
o
TA = 25oC
TA = 25 C
Figure 7.
8
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Figure 8.
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SLUS476F – DECEMBER 2000 – REVISED MAY 2012
TYPICAL CHARACTERISTICS (continued)
DROPOUT VOLTAGE
vs
OUTPUT CURRENT
DROPOUT VOLTAGE
vs
JUNCTION TEMPERATURE
VCC = 10 V
o
TA = 25 C
o
TJ - Junction Temperature - C
Figure 9.
Figure 10.
REVERSE CURRENT
vs
JUNCTION TEMPERATURE
REVERSE CURRENT LEAKAGE
vs
VOLTAGE ON OUT PIN
o
IR - Reverse Current - mA
IR - Reverse Current Leakage - mA
TA = 25 C
o
TJ - Junction Temperature - C
Figure 11.
Figure 12.
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APPLICATION INFORMATION
U1
VCC
1
R1
0.1 Ω
2
DC+
C1
10 µF
+
VCC
3
4
DC-
5
6
C2
0.1 µF
7
8
9
10
N/C
IN
N/C
OUT
IN
OUT
VCC
ISNS
VSENSE
AGND
N/C
STAT2
APG/THM
STAT1
EN
TMR SEL
VSEL
GND
CR
N/C
20
19
PACK+
18
+
17
-
16
PACK-
15
C4
1 µF
14
13
TEMP
12
11
VCC
C3
0.22 µF
Battery
Pack
R4
500 Ω
bq24005PWP
D1
R5
500 Ω
R2
18.7 kΩ
D2
R3
95.3 kΩ
Figure 13. Li-ION/Li-POL Charger
•
•
If the TMR SEL pin is left floating (3 HR time), a 10-pF capacitor should be installed between TMR SEL and
CR.
If a micro process is monitoring the STAT pins, it may be necessary to add some hysteresis into the feedback
to prevent the STAT pins from cycling while crossing the taper detect threshold (usually less than one half
second). See SLUU083 EVM or SLUU113 EVM for additional resistors used for the STAT pins.
FUNCTIONAL DESCRIPTION
The bq2400x supports a precision current- and voltage-regulated Li-Ion charging system suitable for cells with
either coke or graphite anodes. See Figure 14 for a typical charge profile and Figure 15 for an operational
flowchart.
10
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SLUS476F – DECEMBER 2000 – REVISED MAY 2012
Current Regulation
Phase
Preconditioning
Phase
Voltage Regulation and
Charge Termination Phase
Regulation Voltage
V(OUT)
Regulation Current
I(lim)
Charge Voltage
Minimum Charge
Voltage V(LOWV)
Preconditioning
Current I(PRECHG)
Charge Current
Taper Detect
22.5 Minutes
22.5 Minutes
Charge Timer (3, 4.5 or 6 Hours)
Figure 14. Typical Charge Profile
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POR
Yes
V I(VSENSE) < V(LOWV)?
Regulate
I (PRECHG)
Reset and Start
22.5 min T imer
Indicate PreCharge
No
Reset All Timers,
Start Charge T imer
(TMR SEL Input)
Yes
VI(VSENSE) > V(OVERV)?
No
Regulate Current
or Voltage
Indicate Charge
No
V I(VSENSE) < V(LOWV)?
Yes
VI(VSENSE) > V(OVERV)?
Yes
22.5 min Timer
Expired?
No
No
Yes
Yes
Charge Timer
Expired?
No
Fault Condition
Yes
Indicate Fault
V I(VSENSE) < V(LOWV)?
No
Taper
Detected?
Start 22.5 min
Timer
Yes
POR?
or
APG/THERM toggle?
or
EN toggle?
No
Indicate DONE
Yes
No
22.5 min T imer
Expired?
Yes
Turn Off Charge
Indicate DONE
VI(VSENSE) < V(HIGHV)?
or
POR?
or
APG/THERM Toggle?
or
EN Toggle?
No
Yes
Figure 15. Operational Flow Chart
12
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SLUS476F – DECEMBER 2000 – REVISED MAY 2012
Charge Qualification and Preconditioning
The APG/THERM input can also be configured to
monitor either the adapter power or the battery
temperature using a thermistor. The bq2400x
suspends charge if this input is outside the limits set
by the user. Refer to the APG/THERM input section
for additional details.
The bq2400x starts a charge cycle when power is
applied while a battery is present. Charge
qualification is based on battery voltage and the
APG/THERM input.
As shown in the block diagram, the internal LowV
comparator output prevents fast-charging a deeply
depleted battery. When set, charging current is
provided by a dedicated precharge current source.
The precharge timer limits the precharge duration.
The precharge current also minimizes heat
dissipation in the pass element during the initial stage
of charge.
APG/THERM Input
The bq2400x continuously monitors temperature or
system input voltage by measuring the voltage
between
the
APG/THERM
(adapter
power
good/thermistor) and GND. For temperature, a
negative- or a positive-temperature coefficient
thermistor (NTC, PTC) and an external voltage
divider typically develop this voltage (see Figure 16).
The bq2400x compares this voltage against its
internal V(TP1) and V(TP2) thresholds to determine if
charging is allowed. (See Figure 17.)
U1
1
2
3
4
5
6
7
8
9
10
N/C
IN
N/C
OUT
IN
OUT
VCC
VSENSE
ISNS
AGND
N/C
STAT2
APG/THM
STAT1
EN
TMR SEL
VSEL
GND
CR
N/C
20
19
PACK+
18
+
17
-
16
PACK-
15
NTC Thermistor
14
13
TEMP
12
Battery Pack
C3
0.22 µF
11
bq24005PWP
RT1
RT2
Figure 16. Temperature Sensing Circuit
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If the charger designs incorporate a thermistor, the
resistor divider RT1 and RT2 is calculated by using
the following two equations.
First, calculate RT2.
V B RH R C
RT2 +
RH
ǒ
V
V
B
H
Ǔ
ƪ
1
V
C
1
*
* 1 * RC
ǒ
V
V
ƫ
V
H
B
C
Ǔ
* 1
then use the resistor value to find RT1.
V
V
RT1 +
B
C
1
RT2
* 1
)
1
R
C
Where:
VB = VCR (bias voltage)
RH = Resistance of the thermistor at the desired
hot trip threshold
RC = Resistance of the thermistor at the desired
cold trip threshold
VH = VP2 or the lower APG trip threshold
VC = VP2 or the upper APG trip threshold
RT1 = Top resistor in the divider string
RT2 = Bottom resistor in the divider string
bq24005PWP
Figure 18. APG Sensing Circuit
Values of resistors R1 and R2 can be calculated
using the following equation:
R2
V (APG) + VCC
(R1 ) R2)
where V(APG) is the voltage at the APG/THM pin.
Current Regulation
The bq2400x provides current regulation while the
battery-pack voltage is less than the regulation
voltage. The current regulation loop effectively
amplifies the error between a reference signal, Vilim,
and the drop across the external sense resistor,
RSNS.
Figure 17. Temperature Threshold
14
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SLUS476F – DECEMBER 2000 – REVISED MAY 2012
U1
VCC
1
R(SNS)
2
DC+
C1
10 µF
+
VCC
3
4
DC-
5
6
C2
0.1 µF
7
8
9
10
N/C
N/C
IN
OUT
IN
OUT
VCC
VSENSE
ISNS
AGND
N/C
STAT2
APG/THM
STAT1
EN
TMR SEL
VSEL
CR
GND
N/C
20
19
18
17
16
15
14
13
12
11
bq24005PWP
Figure 19. Current Sensing Circuit
Charge current feedback, applied through pin ISNS,
maintains regulation around a threshold of Vilim. The
following formula calculates the value of the sense
resistor:
V(ilim)
R (SNS) +
I (REG)
phase of the charge and is reset at the beginning of a
new charge cycle. Note that in the case of a fault
condition, such as an out-of-range signal on the
APG/THERM input or a thermal shutdown, the
bq2400x suspends the timer.
where I(REG) is the desired charging current.
Voltage Monitoring and Regulation
Voltage regulation feedback is through pin VSENSE.
This input is tied directly to the positive side of the
battery pack. The bq2400x supports cells with either
coke (8.2 V) or graphite (8.4 V) anode. Pin VSEL
selects the charge regulation voltage.
VSEL STATE
(see Note)
CHARGE REGULATION
VOLTAGE
Low
8.2 V
High
8.4 V
NOTE: VSEL should not be left floating.
Charge Termination
The bq2400x continues with the charge cycle until
termination by one of the two possible termination
conditions:
Maximum Charge Time: The bq2400x sets the
maximum charge time through pin TMRSEL. The
TMR SEL pin allows the user to select between three
different total charge-time timers (3, 4, 5, or 6 hours).
The charge timer is initiated after the preconditioning
TMRSEL STATE
CHARGE TIME
Floating(1)
3 hours
Low
6 hours
High
4.5 hours
(1)
To improve noise immunity, it is recommended that a minimum
of 10 pF capacitor be tied to Vss on a floating pin.
Minimum Current: The bq2400x monitors the
charging current during the voltage regulation phase.
The bq2400x initiates a 22-minute timer once the
current falls below the taperdet trip threshold. Fast
charge is terminated once the 22-minute timer
expires.
Charge Status Display
The three available options allow the user to
configure the charge status display for single LED
(bq24004), two individual LEDs (bq24005) or a
bicolor LED (bq24006). The output stage is totem
pole for the bq24004 and bq24006 and open-drain for
the bq24005. The following tables summarize the
operation of the three options:
Table 1. bq24004 (Single LED)
CHARGE STATE
STAT1
Precharge
ON (LOW)
Fast charge
ON (LOW)
FAULT
Flashing (1 Hz, 50% duty cycle)
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bq24005
bq24006
SLUS476F – DECEMBER 2000 – REVISED MAY 2012
www.ti.com
Table 1. bq24004 (Single LED) (continued)
CHARGE STATE
STAT1
Done (>90%)
OFF (HIGH)
Sleep-mode
OFF (HIGH)
APG/Therm invalid
OFF (HIGH)
Thermal shutdown
OFF (HIGH)
Battery absent
OFF (HIGH)
Table 2. bq24005 (2 Individual LEDs) (continued)
CHARGE STATE
OFF(1)
If thermistor is used, then the Green LED is off.
Table 3. bq24006 (Single Bicolor LED)
STAT2
(GREEN)
Precharge
ON (LOW)
OFF
Fast charge
ON (LOW)
OFF
LED1 (RED)
LED2
(GREEN)
APPARENT
COLOR
Precharge
ON (LOW)
OFF (HIGH)
RED
Fast charge
ON (LOW)
OFF (HIGH)
RED
FAULT
ON (LOW)
ON (LOW)
YELLOW
Done (>90%)
OFF (HIGH)
ON (LOW)
GREEN
Sleep-mode
OFF (HIGH)
OFF (HIGH)
OFF
APG/Therminvalid
OFF (HIGH)
OFF (HIGH)
OFF
Flashing (1 Hz,50% duty
cycle)
OFF
Done (>90%)
OFF
ON (LOW)
Sleep-mode
OFF
OFF
Battery absent
APG/Therm invalid
OFF
OFF
(1)
Thermal shutdown
OFF
OFF
FAULT
OFF
(1)
Table 2. bq24005 (2 Individual LEDs)
STAT1 (RED)
STAT2
(GREEN)
Battery absent
CHARGE STATE
CHARGE STATE
STAT1 (RED)
Thermal shutdown OFF (HIGH)
OFF (HIGH)
OFF (HIGH)
OFF
OFF (HIGH)(1)
OFF(1)
If thermistor is used, then the Green LED is off.
Thermal Shutdown
The bq2400x monitors the junction temperature TJ of the DIE and suspends charging if TJ exceeds 165°C.
Charging resumes when TJ falls below 155°C.
DETAILED DESCRIPTION
POWER FET
VOLTAGE SENSE
The integrated transistor is a P-channel MOSFET.
The power FET features a reverse-blocking Schottky
diode, which prevents current flow from OUT to IN.
To achieve maximum voltage regulation accuracy,
the bq2400x uses the feedback on the VSENSE pin.
Externally, this pin should be connected as close to
the battery cell terminals as possible. For additional
safety, a 10-kΩ internal pullup resistor is connected
between the VSENSE and OUT pins.
An internal thermal-sense circuit shuts off the power
FET when the junction temperature rises to
approximately 165°C. Hysteresis is built into the
thermal sense circuit. After the device has cooled
approximately 10°C, the power FET turns back on.
The power FET continues to cycle off and on until the
fault is removed.
CURRENT SENSE
ENABLE (EN)
The logic EN input is used to enable or disable the
IC. A high-level signal on this pin enables the
bq2400x. A low-level signal disables the IC and
places the device in a low-power standby mode.
The bq2400x regulates current by sensing, on the
ISNS pin, the voltage drop developed across an
external sense resistor. The sense resistor must be
placed between the supply voltage (Vcc) and the
input of the IC (IN pins).
16
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bq24006
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SLUS476F – DECEMBER 2000 – REVISED MAY 2012
THERMAL INFORMATION
THERMALLY ENHANCED TSSOP-20
DIE
The thermally enhanced PWP package is based on
the 20-pin TSSOP, but includes a thermal pad
(seeFigure 20) to provide an effective thermal contact
between the IC and the PWB.
Side View (a)
DIE
Traditionally, surface mount and power have been
mutually exclusive terms. A variety of scaled-down
TO220-type packages have leads formed as gull
wings to make them applicable for surface-mount
applications. These packages, however, suffer from
several shortcomings: they do not address the very
low profile requirements (<2 mm) of many of today's
advanced systems, and they do not offer a pin-count
high enough to accommodate increasing integration.
On the other hand, traditional low-power surfacemount packages require power-dissipation derating
that severely limits the usable range of many highperformance analog circuits.
End View (b)
Thermal
Pad
The PWP package (thermally enhanced TSSOP)
combines fine-pitch surface-mount technology with
thermal performance comparable to much larger
power packages.
The PWP package is designed to optimize the heat
transfer to the PWB. Because of the very small size
and limited mass of a TSSOP package, thermal
enhancement is achieved by improving the thermal
conduction paths that remove heat from the
component. The thermal pad is formed using a leadframe design (patent pending) and manufacturing
technique to provide the user with direct connection
to the heat-generating IC. When this pad is soldered
or otherwise coupled to an external heat dissipator,
high power dissipation in the ultrathin, fine-pitch,
surface-mount package can be reliably achieved.
Bottom View (c)
Figure 20. Views of Thermally Enhanced
PWP Package
Because the conduction path has been enhanced,
power-dissipation capability is determined by the
thermal considerations in the PWB design. For
example, simply adding a localized copper plane
(heat-sink surface), which is coupled to the thermal
pad, enables the PWP package to dissipate 2.5 W in
free air. (Reference Figure 22(a),8 cm2 of copper
heat sink and natural convection.) Increasing the
heat-sink size increases the power dissipation range
for the component. The power dissipation limit can be
further improved by adding airflow to a PWB/IC
assembly. (See Figure 22(b) and Figure 22(c).) The
line drawn at 0.3 cm2 in Figure 21 and Figure 22
indicates performance at the minimum recommended
heat-sink size.
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bq24004
bq24005
bq24006
SLUS476F – DECEMBER 2000 – REVISED MAY 2012
www.ti.com
THERMAL RESISTANCE
vs
COPPER HEAT-SINK AREA
150
Natural Convection
R θ JA - Thermal Resistance -
° C/W
125
50 ft/min
100 ft/min
100
150 ft/min
200 ft/min
75
50
250 ft/min
300 ft/min
25
0 0.3
1
2
3
4
5
6
7
8
Copper Heat-Sink Area - cm2
Figure 21.
18
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SLUS476F – DECEMBER 2000 – REVISED MAY 2012
3.5
3.5
TA = 25°C
TA = 55°C
300 ft/min
3
PD - Power Dissipation Limit - W
PD - Power Dissipation Limit - W
3
150 ft/min
2.5
2
Natural Convection
1.5
1
0.5
0
300 ft/min
2.5
2
150 ft/min
1.5
Natural Convection
1
0.5
0
0.3
2
4
0
8
6
Copper Heat-Sink Size - cm2
0
0.3
2
4
6
8
Copper Heat-Sink Size - cm2
(a)
(b)
3.5
TA = 105°C
PD - Power Dissipation Limit - W
3
2.5
2
1.5
150 ft/min
300 ft/min
1
Natural Convection
0.5
0
0
0.3
2
4
Copper Heat-Sink Size -
6
8
cm2
(c)
Figure 22. Power Ratings of the PWP Package at Ambient Temperatures of 25°C, 55°C, and 105°C
Copyright © 2000–2012, Texas Instruments Incorporated
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PACKAGE OPTION ADDENDUM
www.ti.com
22-May-2012
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package
Drawing
Pins
Package Qty
Eco Plan
(2)
Lead/
Ball Finish
MSL Peak Temp
(3)
BQ24004PWP
ACTIVE
HTSSOP
PWP
20
70
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
BQ24004PWPG4
ACTIVE
HTSSOP
PWP
20
70
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
BQ24004PWPR
ACTIVE
HTSSOP
PWP
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
BQ24004PWPRG4
ACTIVE
HTSSOP
PWP
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
BQ24005PWP
ACTIVE
HTSSOP
PWP
20
70
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
BQ24005PWPG4
ACTIVE
HTSSOP
PWP
20
70
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
BQ24005PWPR
ACTIVE
HTSSOP
PWP
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
BQ24005PWPRG4
ACTIVE
HTSSOP
PWP
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
BQ24006PWP
ACTIVE
HTSSOP
PWP
20
70
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
BQ24006PWPG4
ACTIVE
HTSSOP
PWP
20
70
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
BQ24006PWPR
ACTIVE
HTSSOP
PWP
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
BQ24006PWPRG4
ACTIVE
HTSSOP
PWP
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
Samples
(Requires Login)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
22-May-2012
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
BQ24004PWPR
HTSSOP
PWP
20
2000
330.0
16.4
BQ24005PWPR
HTSSOP
PWP
20
2000
330.0
BQ24006PWPR
HTSSOP
PWP
20
2000
330.0
6.95
7.1
1.6
8.0
16.0
Q1
16.4
6.95
7.1
1.6
8.0
16.0
Q1
16.4
6.95
7.1
1.6
8.0
16.0
Q1
Pack Materials-Page 1
W
Pin1
(mm) Quadrant
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
BQ24004PWPR
HTSSOP
PWP
20
2000
367.0
367.0
38.0
BQ24005PWPR
HTSSOP
PWP
20
2000
367.0
367.0
38.0
BQ24006PWPR
HTSSOP
PWP
20
2000
367.0
367.0
38.0
Pack Materials-Page 2
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