BL8024 1A 1.5MHz 6V Synchronous Buck Converter DESCRIPTION FEATURES The BL8024 is a high-efficiency, DC-to-DC stepdown switching regulators, capable of delivering up to 1A of output current. The device operates from an input voltage range of 2.6V to 6.0V and provides an output voltage from 0.6V to VIN, making the BL8024 ideal for low voltage power conversions. Running at a fixed frequency of 1.5MHz allows the use of small external components, such as ceramic input and output caps, as well as small inductors, while still providing low output ripples. This low noise output along with its excellent efficiency achieved by the internal synchronous rectifier, making BL8024 an ideal green replacement for large power consuming linear regulators. Internal soft-start control circuitry reduces inrush current. Short-circuit and thermal-overload protection improves design reliability. BL8024 is housed in a SOT23-5 Package TYPICAL APPLICATION High Efficiency: Up to 96% Capable of Delivering 1A (Vin 3.3V) 1.5MHz Switching Frequency No External Schottky Diode Needed Low dropout 100% Duty operation Internal Compensation and Soft-Start Current Mode control 0.6V Reference for Low Output voltages Logic Control Shutdown (IQ<1uA) Thermal shutdown and UVLO Available in SOT23-5 APPLICATIONS Cellular phones Digital Cameras MP3 and MP4 players Set top boxes Wireless and DSL Modems USB supplied Devices in Notebooks Portable Devices PIN OUT & MARKING VIN 4 5 FB BL8024 1 2 3 GGYW EN GND SW SOT23-5 GG: Product Code YW: Date code (Year & Week) www.belling.com.cn 1 BL8024 ORDERING INFORMATION PART No. BL8024CB5TR PACKAGE SOT23-5 Tape&Reel 3000/Reel ABSOLUTE MAXIMUM RATING Parameter Value Max Input Voltage Max Operating Junction Temperature(Tj) Ambient Temperature(Ta) Maximum Power Dissipation SOT23-5 Storage Temperature(Ts) Lead Temperature & Time ESD (HBM) 6.3V 125C -40C – 85C 400mW -40C - 150C 260C, 10S >2000V Note: Exceed these limits to damage to the device. Exposure to absolute maximum rating conditions may affect device reliability. RECOMMENDED WORK CONDITIONS Parameter Value Input Voltage Range Operating Junction Temperature(Tj) Max. 6V -20C –125C ELECTRICAL CHARACTERISTICS (VDD=5V, TA=25C) Symbol Parameter VDD Input Voltage Range Vref Feedback Voltage Ifb Feedback Leakage current Iq Quiescent Current Conditions Vin=5V 0.585 Active, Vfb=0.65, No Switching Vin=2.7V to 5.5V LdReg Load Regulation Iout=0.01 to 1A Switching Frequency PMOS Rdson RdsonN NMOS Rdson Peak Current Limit Vin 3.3V Iswlk SW Leakage Current Vout=5.5V, VSW=0 or 5.5V, EN=0V Ienlk EN Leakage Current EN Input High Voltage Vl_en EN Input Low Voltage www.belling.com.cn Unit 6.0 V 0.6 0.615 V 0.1 0.4 uA 40 1.3 Ilimit Vh_en Max Shutdown Line Regulation RdsonP Typ 2.6 LnReg Fsoc Min 1.2 uA 1 uA 0.04 0.2 %/V 0.1 0.2 %/A 1.5 1.7 MHz 280 350 mohm 190 250 mohm 1.5 2 A 10 uA 1 uA 1.5 V 0.4 2 V BL8024 PIN DESCRIPTION PIN # NAME DESCRIPTION 1 2 3 4 EN GND SW VIN 5 FB Enable pin for the IC. Drive the pin to high to enable the part, and low to disable Ground Inductor connection. Connect an inductor between SW and the regulator output. Supply voltage. Feedback input. Connect an external resistor divider from the output to FB and GND to set the output to a voltage between 0.6V and Vin ELECTRICAL PERFORMANCE Tested under TA=25C, unless otherwise specified Efficiency / Vout=3.3V Efficiency 100% 90% 80% 70% 60% 50% 40% 30% 20% 10% 0% 0.001 www.belling.com.cn VIN=6V VIN=5V VIN=4V VIN=3.7V 0.01 0.1 Iout (A) 1 3 BL8024 Power up Output Ripple and SW at 1A load Vin=6V / Vout=3.3V Ch1: Vin, Ch2: Vout, Ch3 EN Ch1: Vin, Ch2: Vout, Ch3 SW, Ch4: I_inductor BLOCK DIAGRAM VIN UVLO & Thermal shutdown 0.6V Ref + ISense - + + Comp Network Σ - EA EN PWM Logic AntiShootThrough Driver SW Slope Comp + OSC Vcomp - FB www.belling.com.cn 4 GND BL8024 DETAILED DESCRIPTION The BL8024 high-efficiency switching regulator is a small, simple, DC-to-DC step-down converter capable of delivering up to 1A of output current. The device operates in pulse-width modulation (PWM) at 1.5MHz from a 2.6V to 5.5V input voltage and provides an output voltage from 0.6V to VIN, making the BL8024 ideal for on-board postregulation applications. An internal synchronous rectifier improves efficiency and eliminates the typical Schottky free-wheeling diode. Using the on resistance of the internal high-side MOSFET to sense switching currents eliminates current-sense resistors, further improving efficiency and cost. turns on. BL8024 utilizes a frequency fold-back mode to prevent overheating during short-circuit output conditions. The device enters frequency fold-back mode when the FB voltage drops below 200mV, limiting the current to 1.5A (typ) and reducing power dissipation. Normal operation resumes upon removal of the short-circuit condition. Soft-start BL8024 has a internal soft-start circuitry to reduce supply inrush current during startup conditions. When the device exits under-voltage lockout (UVLO), shutdown mode, or restarts following a thermal-overload event, the l soft-start circuitry slowly ramps up current available at SW. Loop Operation BL8024 uses a PWM current-mode control scheme. An open-loop comparator compares the integrated voltage-feedback signal against the sum of the amplified current-sense signal and the slope compensation ramp. At each rising edge of the internal clock, the internal high-side MOSFET turns on until the PWM comparator terminates the on cycle. During this on-time, current ramps up through the inductor, sourcing current to the output and storing energy in the inductor. The current mode feedback system regulates the peak inductor current as a function of the output voltage error signal. During the off cycle, the internal highside P-channel MOSFET turns off, and the internal low-side N-channel MOSFET turns on. The inductor releases the stored energy as its current ramps down while still providing current to the output. UVLO and Thermal Shutdown If VIN drops below 2.5V, the UVLO circuit inhibits switching. Once VIN rises above 2.6V, the UVLO clears, and the soft-start sequence activates. Thermal-overload protection limits total power dissipation in the device. When the junction temperature exceeds TJ= +160°C, a thermal sensor forces the device into shutdown, allowing the die to cool. The thermal sensor turns the device on again after the junction temperature cools by 15°C, resulting in a pulsed output during continuous overload conditions. Following a thermal-shutdown condition, the soft-start sequence begins. Design Procedure Current Sense Setting Output Voltages An internal current-sense amplifier senses the current through the high-side MOSFET during on time and produces a proportional current signal, which is used to sum with the slope compensation signal. The summed signal then is compared with the error amplifier output by the PWM comparator to terminate the on cycle. Output voltages are set by external resistors. The FB_ threshold is 0.6V. RTOP = RBOTTOM[(VOUT / 0.6) - 1] Input Capacitor Selection The input capacitor in a DC-to-DC converter reduces current peaks drawn from the battery or other input power source and reduces switching noise in the controller. The impedance of the input capacitor at the switching frequency should be less than that of the input source so high-frequency switching currents do not pass through the input source. The output capacitor keeps output ripple Current Limit There is a cycle-by-cycle current limit on the highside MOSFET of 1.5A(typ). When the current flowing out of SW exceeds this limit, the high-side MOSFET turns off and the synchronous rectifier www.belling.com.cn 5 BL8024 small and ensures control-loop stability. The output capacitor must also have low impedance at the switching frequency. Ceramic, polymer, and tantalum capacitors are suitable, with ceramic 1) Place decoupling capacitors as close to the IC as possible 2) Connect input and output capacitors to the same power ground node with a star ground configuration then to IC ground. 3) Keep the high-current paths as short and wide as possible. Keep the path of switching current (C1 to VIN and C1 to GND) short. Avoid vias in the switching paths. 4) If possible, connect VIN, SW, and GND separately to a large copper area to help cool the IC to further improve efficiency and longterm reliability. 5) Ensure all feedback connections are short and direct. Place the feedback resistors as close to the IC as possible. 6) Route high-speed switching nodes away from sensitive analog areas exhibiting the lowest ESR and high-frequency impedance. Output ripple with a ceramic output capacitor is approximately as follows: VRIPPLE = IL(PEAK)[1 / (2π x fOSC x COUT)] If the capacitor has significant ESR, the output ripple component due to capacitor ESR is as follows: VRIPPLE(ESR) = IL(PEAK) x ESR Application Information Layout is critical to achieve clean and stable operation. The switching power stage requires particular attention. Follow these guidelines for good PC board layout: PACKAGE OUTLINE Package SOT23-5 Devices per reel Package specification： www.belling.com.cn 6 3000 Unit mm