Product Folder Order Now Support & Community Tools & Software Technical Documents CDCS504-Q1 SCAS951 – APRIL 2017 CDCS504-Q1 Clock Buffer and Clock Multiplier 1 Features 3 Description • • The CDCS504-Q1 device is a LVCMOS input clock buffer with selectable frequency multiplication. 1 • • • • • • • • Qualified for Automotive Applications AEC-Q100 Test Guidance With the Following Results: – Device Temperature Grade 2: –40°C to 105°C Ambient Operating Temperature Range – Device HBM ESD Classification Level H2 – Device CDM ESD Classification Level C3B Part of a Family of Easy-to-Use Clock Generator Devices Clock Multiplier With Selectable Output Frequency Frequency Multiplication Selectable Between x1 or x4 With One External Control Pin Output Disable Through Control Pin Single 3.3-V Device Power Supply Wide Temperature Range: –40°C to 105°C Low Space Consumption 8-Pin TSSOP Package Create a Custom Design Using the CDCS504-Q1 With the WEBENCH® Power Designer The CDCS504-Q1 has an output enable pin. The device accepts a 3.3-V LVCMOS signal at the input. The input signal is processed by a phased-locked loop (PLL), whose output frequency is either equal to the input frequency or multiplied by the factor of four. By this, the device can generate output frequencies between 2 MHz and 108 MHz. A separate control pin can be used to enable or disable the output. The CDCS504-Q1 device operates in a 3.3-V environment. It is characterized for operation from –40°C to 105°C and is available in an 8-pin TSSOP package. Device Information(1) PART NUMBER CDCS504-Q1 PACKAGE TSSOP (8) BODY SIZE (NOM) 3.00 mm × 4.40 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 2 Applications Automotive Applications Requiring Clock Multiplication Block Diagram VDD IN GND GND FS LVCMOS GND x1 or x4 LV CMOS OUT Control Logic OE Copyright © 2017, Texas Instruments Incorporated 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. CDCS504-Q1 SCAS951 – APRIL 2017 www.ti.com Table of Contents 1 2 3 4 5 6 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 3 6.1 6.2 6.3 6.4 6.5 6.6 3 3 4 4 4 5 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics – Device Characteristics... Typical Characteristics .............................................. 7 Parameter Measurement Information .................. 6 8 Detailed Description .............................................. 7 8.3 Feature Description................................................... 7 8.4 Device Functional Modes.......................................... 7 9 Application and Implementation .......................... 8 9.1 Application Information.............................................. 8 9.2 Typical Application ................................................... 8 10 Power Supply Recommendations ....................... 9 11 Layout..................................................................... 9 11.1 Layout Guidelines ................................................... 9 11.2 Layout Example ...................................................... 9 12 Device And Documentation Support................. 10 12.1 12.2 12.3 12.4 12.5 12.6 7.1 Measurement Circuits ............................................... 6 8.1 Overview ................................................................... 7 8.2 Functional Block Diagram ......................................... 7 Device Support...................................................... Receiving Notification of Documentation Updates Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 10 10 10 10 10 10 13 Mechanical, Packaging, and Orderable Information ........................................................... 11 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. 2 DATE REVISION NOTES April 2017 * Initial release. Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: CDCS504-Q1 CDCS504-Q1 www.ti.com SCAS951 – APRIL 2017 5 Pin Configuration and Functions PW Package 8-Pin TSSOP Top View IN 1 8 VDD GND 2 7 OE GND 3 6 OUT GND 4 5 FS Not to scale Pin Functions PIN NAME NO. FS GND TYPE 5 I DESCRIPTION Frequency multiplication selection, internal pullup 2, 3, 4 Ground IN 1 I Ground LVCMOS clock input OE 7 I Output enable, internal pullup OUT 6 O LVCMOS clock output VDD 8 Power 3.3-V power supply 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT VDD Supply voltage –0.5 4.6 V VIN Input voltage –0.5 4.6 V Vout Output voltage –0.5 4.6 V IIN Input current (VI < 0, VI > VDD) 20 mA Iout Continuous output current 50 mA TJ Maximum junction temperature 125 °C Tstg Storage temperature 150 °C (1) –65 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 6.2 ESD Ratings VALUE V(ESD) (1) Electrostatic discharge Human-body model (HBM), per AEC Q100-002 (1) Charged-device model (CDM), per AEC Q100-011 ±1500 ±750 UNIT V AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification. Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: CDCS504-Q1 3 CDCS504-Q1 SCAS951 – APRIL 2017 www.ti.com 6.3 Recommended Operating Conditions MIN VDD Supply voltage NOM MAX 3 3.6 FS = 0 2 27 FS = 1 2 27 fIN Input frequency VIL Low-level input voltage LVCMOS VIH High-level input voltage LVCMOS VI Input voltage threshold LVCMOS CL Output load test LVCMOS IOH/IOL Output current TA Operating free-air temperature 0.3 × VDD 0.7 × VDD UNIT V MHz V V 0.5 × VDD V –40 15 pF ±12 mA 105 °C 6.4 Thermal Information over operating free-air temperature range (unless otherwise noted) (1) CDCS504-Q1 THERMAL METRIC (2) PW (TSSOP) UNIT 8 PINS 179.9 High K Junction-to-ambient thermal resistance RθJA Low K Thermal Airflow (CFM) 0 149 Thermal Airflow (CFM) 150 142 Thermal Airflow (CFM) 250 138 Thermal Airflow (CFM) 500 132 Thermal Airflow (CFM) 0 230 Thermal Airflow (CFM) 150 185 Thermal Airflow (CFM) 250 170 Thermal Airflow (CFM) 500 °C/W 150 64.9 RθJC(top) Junction-to-case (top) thermal resistance High K 65 Low K 69 °C/W RθJB Junction-to-board thermal resistance ψJT Junction-to-top characterization parameter ψJB Junction-to-board characterization parameter RθJC(bot) Junction-to-case (bottom) thermal resistance n/a °C/W (1) (2) 108.7 °C/W 9 °C/W 107 °C/W The package thermal impedance is calculated in accordance with JESD 51 and JEDEC2S2P (high-k board). For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 6.5 Electrical Characteristics – Device Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER IDD Device supply current TEST CONDITIONS MIN fin = 3.072 MHz; FS = 1 TYP MAX 24 UNIT mA FS = 0 2 27 FS = 1 8 108 fOUT Output frequency IIH LVCMOS input current VI = VDD; VDD = 3.6 V 10 μA IIL LVCMOS input current VI = 0 V; VDD = 3.6 V –10 μA VOH 4 LVCMOS high-level output voltage IOH = -–0.1 mA 2.9 IOH = -–8 mA 2.4 IOH = -–12 mA 2.2 Submit Documentation Feedback MHz V Copyright © 2017, Texas Instruments Incorporated Product Folder Links: CDCS504-Q1 CDCS504-Q1 www.ti.com SCAS951 – APRIL 2017 Electrical Characteristics – Device Characteristics (continued) over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VOL TEST CONDITIONS LVCMOS low-level output voltage IOZ High-impedance-state output current MIN 0.1 IOL = 8 mA 0.5 IOL = 12 mA 0.8 –2 UNIT V 2 μA fout = 11.264 MHz; FS = 1, 10000 Cycles 144 ps ns tJIT(C-C) Cycle to cycle jitter tr Rise time (1) 20%–80% 0.65 tf Fall time (1) 20%–80% 0.55 Odc Output duty cycle (2) (1) (2) MAX IOL = 0.1 mA OE = Low (1) TYP ns 45% 55% Measured with Test Load, see Figure 4. Not production tested. 6.6 Typical Characteristics 900 -40°C, 3.0 V -40°C, 3.3 V -40°C, 3.6 V 85°C, 3.0 V 85°C, 3.3 V 85°C, 3.6 V 800 X4 mode, Tf (ps) X4 mode, Tr (ps) 850 25°C, 3.0 V 25°C, 3.3 V 25°C, 3.6 V 750 700 650 600 550 500 0 10 20 30 40 50 60 70 Frequency (MHz) 80 90 100 110 775 750 725 700 675 650 625 600 575 550 525 500 475 450 -40°C, 3.0 V -40°C, 3.3 V -40°C, 3.6 V 0 10 20 30 40 50 60 70 Frequency (MHz) tc_D Figure 1. Typical Tr vs Output Frequency, VDD, Temperature in X4 Mode 25°C, 3.0 V 25°C, 3.3 V 25°C, 3.6 V 85°C, 3.0 V 85°C, 3.3 V 85°C, 3.6 V 80 90 100 110 tc_D Figure 2. Typical Tf vs Output Frequency, VDD, Temperature in X4 Mode 34 x4 Mode x1 Mode 32 30 IDD - Input Current (mA) 28 26 24 22 20 18 16 14 12 10 0 3 6 9 12 15 18 21 Freq [MHz] 24 27 30 33 D001 VCC = 3.3 V, output loaded with test load Figure 3. IDD vs Input Frequency Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: CDCS504-Q1 5 CDCS504-Q1 SCAS951 – APRIL 2017 www.ti.com 7 Parameter Measurement Information 7.1 Measurement Circuits VDD CDCS504-Q1 1 kW LVCMOS 1 kW 10 pF Copyright © 2017, Texas Instruments Incorporated Figure 4. Test Load CDCS504-Q1 LVCMOS LVCMOS Typical Driver Series Termination ~ 18 W Impedance ~ 32 W ZL = 50 W Copyright © 2017, Texas Instruments Incorporated Figure 5. Load for 50-Ω Board Environment 6 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: CDCS504-Q1 CDCS504-Q1 www.ti.com SCAS951 – APRIL 2017 8 Detailed Description 8.1 Overview The CDCS504-Q1 is a LVCMOS clock buffer (x1 mode) or quadrupler (x4 mode). It integrates an internal PLL and generates a LVCMOS clock frequency range from 2 MHz to 108 MHz. 8.2 Functional Block Diagram VDD GND 4 8 IN 1 LVCMOS LVCMOS PLL FS 5 6 OUT Control Logic 2 GND 3 GND 7 OE Copyright © 2017, Texas Instruments Incorporated 8.3 Feature Description The CDCS504-Q1 is qualified for automotive applications with AEC-Q100 test, which could support wide temperature range from –40°C to 105°C. The device is easy to use, only need single 3.3-V power supply. The output enable or disable mode, along with frequency multiplication, could be controlled by external controls pins. 8.4 Device Functional Modes When pin 7 OE is in low, the CDCS504-Q1 outputs 3-state. When pin 7 OE is set in high, the device would output clocks, output frequency depends on pin 5 FS status. FS = high enables frequency ×4 mode. FS= low makes output frequency equal to input frequency. If no input clock is provided, it is recommended to set OE=low in order to avoid random clock pulses from the internal PLL at the outputs. Table 1. Function Table OE FS fOUT/fIN 0 x x fOUT at fin = 27 MHz 3-state 1 0 1 27 MHz 1 1 4 108 MHz Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: CDCS504-Q1 7 CDCS504-Q1 SCAS951 – APRIL 2017 www.ti.com 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information The CDCS504-Q1 is a clock buffer or multiplier for automotive amplifiers and infotainment. It is fit for the TAS6424-Q1, a four-channel, class-D, digital-input audio-amplifier, when the applications are without available MCLK. See Figure 6 for more details. 9.2 Typical Application SCLK (2.816 MHz) CDCS504-Q1 MCLK (11.264 MHz) SCLK (2.816 MHz) Audio DSP TAS6424 Other Signals Copyright © 2017, Texas Instruments Incorporated Figure 6. Clock for Automotive Amplifiers 9.2.1 Design Requirements The CDCS504-Q1 is supplied with a single-power 3.3 V. The device supports minimum input frequency to 2 MHz. For maximum input frequency, it is 32 MHz in ×1 mode, and 27 MHz in ×4 mode. The input clock is LVCMOS type and should satisfy requirements in the Recommended Operating Conditions. 9.2.2 Detailed Design Procedure In some applications, the clock input for CDCS504-Q1 is not always presented. In case there is an unexpected clock output without clock input, TI recommends setting OE pin to low. When it gets clock input ready, set OE pin to high to get expected clock output. If the other application presents continuous clock input for CDCS504-Q1, the OE pin could be floated, internal pullup brings output enable, or an external pullup circuits could be used fixedly. 9.2.2.1 Custom Design With WEBENCH® Tools Click here to create a custom design using the CDCS504-Q1 device with the WEBENCH® Power Designer. 1. Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements. 2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial. 3. Compare the generated design with other possible solutions from Texas Instruments. The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time pricing and component availability. 8 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: CDCS504-Q1 CDCS504-Q1 www.ti.com SCAS951 – APRIL 2017 Typical Application (continued) In most cases, these actions are available: • Run electrical simulations to see important waveforms and circuit performance • Run thermal simulations to understand board thermal performance • Export customized schematic and layout into popular CAD formats • Print PDF reports for the design, and share the design with colleagues Get more information about WEBENCH tools at www.ti.com/WEBENCH. 9.2.3 Application Curves 100 80 92.7 100.5 98.5 Output cycle to cycle jitter (ps) Output cycle to cycle jitter (ps) 125 91.1 75 50 25 0 66.3 60 59.2 61.9 56.4 40 20 0 -40 0 25 85 Ta (°C) -40 X1 mode, 8-MHz input, 8-MHz output, VDD = 3.3 V Figure 7. Typical Cycle-to-Cycle Jitter vs Temperature 0 25 Ta (°C) ac_D 85 ac_D X4 mode, 27.5-MHz input, 110-MHz output, VDD = 3.3 V Figure 8. Typical Cycle-to-Cycle Jitter vs Temperature 10 Power Supply Recommendations The CDCS504-Q1 requires a 3.3-V supply. 11 Layout 11.1 Layout Guidelines The CDCS504-Q1 only has typical 20-mA supply current, so there is no thermal design challenge. A 0.01-µF capacitor may be placed close to VDD pin as a bypass capacitor. 11.2 Layout Example Figure 9. Layout Example Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: CDCS504-Q1 9 CDCS504-Q1 SCAS951 – APRIL 2017 www.ti.com 12 Device And Documentation Support 12.1 Device Support 12.1.1 Development Support 12.1.1.1 Custom Design With WEBENCH® Tools Click here to create a custom design using the CDCS504-Q1 device with the WEBENCH® Power Designer. 1. Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements. 2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial. 3. Compare the generated design with other possible solutions from Texas Instruments. The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time pricing and component availability. In most cases, these actions are available: • Run electrical simulations to see important waveforms and circuit performance • Run thermal simulations to understand board thermal performance • Export customized schematic and layout into popular CAD formats • Print PDF reports for the design, and share the design with colleagues Get more information about WEBENCH tools at www.ti.com/WEBENCH. 12.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 12.3 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 12.4 Trademarks E2E is a trademark of Texas Instruments. WEBENCH is a registered trademark of Texas Instruments. All other trademarks are the property of their respective owners. 12.5 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 12.6 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 10 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: CDCS504-Q1 CDCS504-Q1 www.ti.com SCAS951 – APRIL 2017 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: CDCS504-Q1 11 PACKAGE OPTION ADDENDUM www.ti.com 28-Apr-2017 PACKAGING INFORMATION Orderable Device Status (1) CDCS504TPWRQ1 PREVIEW Package Type Package Pins Package Drawing Qty TSSOP PW 8 2000 Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR Op Temp (°C) Device Marking (4/5) -40 to 105 CS504Q (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 Samples PACKAGE MATERIALS INFORMATION www.ti.com 28-Apr-2017 TAPE AND REEL INFORMATION *All dimensions are nominal Device CDCS504TPWRQ1 Package Package Pins Type Drawing TSSOP PW 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2000 330.0 12.4 Pack Materials-Page 1 7.0 B0 (mm) K0 (mm) P1 (mm) 3.6 1.6 8.0 W Pin1 (mm) Quadrant 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 28-Apr-2017 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CDCS504TPWRQ1 TSSOP PW 8 2000 367.0 367.0 35.0 Pack Materials-Page 2 PACKAGE OUTLINE PW0008A TSSOP - 1.2 mm max height SCALE 2.800 SMALL OUTLINE PACKAGE C 6.6 TYP 6.2 SEATING PLANE PIN 1 ID AREA A 0.1 C 6X 0.65 8 1 3.1 2.9 NOTE 3 2X 1.95 4 5 B 4.5 4.3 NOTE 4 SEE DETAIL A 8X 0.30 0.19 0.1 C A 1.2 MAX B (0.15) TYP 0.25 GAGE PLANE 0 -8 0.15 0.05 0.75 0.50 DETAIL A TYPICAL 4221848/A 02/2015 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-153, variation AA. www.ti.com EXAMPLE BOARD LAYOUT PW0008A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 8X (1.5) 8X (0.45) SYMM 1 8 (R0.05) TYP SYMM 6X (0.65) 5 4 (5.8) LAND PATTERN EXAMPLE SCALE:10X SOLDER MASK OPENING METAL SOLDER MASK OPENING METAL UNDER SOLDER MASK 0.05 MAX ALL AROUND 0.05 MIN ALL AROUND SOLDER MASK DEFINED NON SOLDER MASK DEFINED SOLDER MASK DETAILS NOT TO SCALE 4221848/A 02/2015 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com EXAMPLE STENCIL DESIGN PW0008A TSSOP - 1.2 mm max height SMALL OUTLINE PACKAGE 8X (1.5) 8X (0.45) SYMM (R0.05) TYP 1 8 SYMM 6X (0.65) 5 4 (5.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:10X 4221848/A 02/2015 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com IMPORTANT NOTICE Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. TI’s published terms of sale for semiconductor products (http://www.ti.com/sc/docs/stdterms.htm) apply to the sale of packaged integrated circuit products that TI has qualified and released to market. Additional terms may apply to the use or sale of other types of TI products and services. Reproduction of significant portions of TI information in TI data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such reproduced documentation. Information of third parties may be subject to additional restrictions. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Buyers and others who are developing systems that incorporate TI products (collectively, “Designers”) understand and agree that Designers remain responsible for using their independent analysis, evaluation and judgment in designing their applications and that Designers have full and exclusive responsibility to assure the safety of Designers' applications and compliance of their applications (and of all TI products used in or for Designers’ applications) with all applicable regulations, laws and other applicable requirements. Designer represents that, with respect to their applications, Designer has all the necessary expertise to create and implement safeguards that (1) anticipate dangerous consequences of failures, (2) monitor failures and their consequences, and (3) lessen the likelihood of failures that might cause harm and take appropriate actions. Designer agrees that prior to using or distributing any applications that include TI products, Designer will thoroughly test such applications and the functionality of such TI products as used in such applications. TI’s provision of technical, application or other design advice, quality characterization, reliability data or other services or information, including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to assist designers who are developing applications that incorporate TI products; by downloading, accessing or using TI Resources in any way, Designer (individually or, if Designer is acting on behalf of a company, Designer’s company) agrees to use any particular TI Resource solely for this purpose and subject to the terms of this Notice. TI’s provision of TI Resources does not expand or otherwise alter TI’s applicable published warranties or warranty disclaimers for TI products, and no additional obligations or liabilities arise from TI providing such TI Resources. TI reserves the right to make corrections, enhancements, improvements and other changes to its TI Resources. TI has not conducted any testing other than that specifically described in the published documentation for a particular TI Resource. Designer is authorized to use, copy and modify any individual TI Resource only in connection with the development of applications that include the TI product(s) identified in such TI Resource. NO OTHER LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE TO ANY OTHER TI INTELLECTUAL PROPERTY RIGHT, AND NO LICENSE TO ANY TECHNOLOGY OR INTELLECTUAL PROPERTY RIGHT OF TI OR ANY THIRD PARTY IS GRANTED HEREIN, including but not limited to any patent right, copyright, mask work right, or other intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information regarding or referencing third-party products or services does not constitute a license to use such products or services, or a warranty or endorsement thereof. Use of TI Resources may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. TI RESOURCES ARE PROVIDED “AS IS” AND WITH ALL FAULTS. TI DISCLAIMS ALL OTHER WARRANTIES OR REPRESENTATIONS, EXPRESS OR IMPLIED, REGARDING RESOURCES OR USE THEREOF, INCLUDING BUT NOT LIMITED TO ACCURACY OR COMPLETENESS, TITLE, ANY EPIDEMIC FAILURE WARRANTY AND ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF ANY THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. TI SHALL NOT BE LIABLE FOR AND SHALL NOT DEFEND OR INDEMNIFY DESIGNER AGAINST ANY CLAIM, INCLUDING BUT NOT LIMITED TO ANY INFRINGEMENT CLAIM THAT RELATES TO OR IS BASED ON ANY COMBINATION OF PRODUCTS EVEN IF DESCRIBED IN TI RESOURCES OR OTHERWISE. IN NO EVENT SHALL TI BE LIABLE FOR ANY ACTUAL, DIRECT, SPECIAL, COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF TI RESOURCES OR USE THEREOF, AND REGARDLESS OF WHETHER TI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Unless TI has explicitly designated an individual product as meeting the requirements of a particular industry standard (e.g., ISO/TS 16949 and ISO 26262), TI is not responsible for any failure to meet such industry standard requirements. Where TI specifically promotes products as facilitating functional safety or as compliant with industry functional safety standards, such products are intended to help enable customers to design and create their own applications that meet applicable functional safety standards and requirements. Using products in an application does not by itself establish any safety features in the application. Designers must ensure compliance with safety-related requirements and standards applicable to their applications. Designer may not use any TI products in life-critical medical equipment unless authorized officers of the parties have executed a special contract specifically governing such use. Life-critical medical equipment is medical equipment where failure of such equipment would cause serious bodily injury or death (e.g., life support, pacemakers, defibrillators, heart pumps, neurostimulators, and implantables). Such equipment includes, without limitation, all medical devices identified by the U.S. Food and Drug Administration as Class III devices and equivalent classifications outside the U.S. TI may expressly designate certain products as completing a particular qualification (e.g., Q100, Military Grade, or Enhanced Product). Designers agree that it has the necessary expertise to select the product with the appropriate qualification designation for their applications and that proper product selection is at Designers’ own risk. Designers are solely responsible for compliance with all legal and regulatory requirements in connection with such selection. Designer will fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of Designer’s noncompliance with the terms and provisions of this Notice. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2017, Texas Instruments Incorporated