HDMI Switch ICs 2 for input 1 output switch with Termination sense correspondence (Sync with HPD_SINK) BU16006KV No.09063EDT01 ●Description BU16006KV is 2 input 1 output HDMI/DVI switch LSI. Each Port supports 2.25Gbps. (HDMI 1.3a). This device control is simple. It requires only 3.3V and a few GPIO controls. Terminated resistors(50Ω) are integrated at each input port. When channel is not selected, termination resistors are disconnected. TMDS inputs are high impedance. This device is integrated equalization function and DDC buffer function, so it can adapt long cable. ●Features 1) Supports 2.25 Gbps signaling rate for 480i/p, 720i/p, and 1080i/p resolution to 12-bit color depth 2) Compatible with HDMI 1.3a 3) 5V tolerance to all DDC and HPD_SINK inputs 4) Integrated DDC buffer 5) Integrated switchable 50Ωreceiver termination 6) Integrated equalizer circuit to adapt long cable 7) HBM ESD protection exceeds 10kV 8) 3.3V fixed supply to TMDS I/Os 9) 64Pin VQFP package 10) ROHS compatible ●Applications Digital TV, DVD Player, Set-Top-Box, Audio Video Receiver, Digital Projector, DVI or HDMI Switch Box ●Line up matrix Part No. Power Supply (V) ESD (KV) BU16020KV 3 to 3.6 10 BU16018KV 3 to 3.6 10 BU16027KV 3 to 3.6 10 BU16006KV 3 to 3.6 10 BU16024KV 3 to 3.6 10 Input (ch) HDMI 4ch HDMI 3ch HDMI 3ch HDMI 2ch HDMI 1ch Output (ch) Data rate (Gbps) Hot Plug Control Termination Sense Correspondence Switching Method DDC Buffer Equalizer De emphasis Package RoHS 2 Yes VQFP100 Yes Yes VQFP80 Yes VQFP64 Yes VQFP64 Yes VQFP48C Yes HDMI 1ch 2.7 Yes Yes GPIO/I C Yes Yes (adaptive) HDMI 1ch 2.25 Yes Yes GPIO Yes Yes HDMI 1ch 2.25 Yes Yes GPIO Yes Yes HDMI 1ch 2.25 Yes Yes GPIO Yes Yes HDMI 1ch 2.25 Yes Yes - Yes Yes www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 1/18 Yes (Always ON) Yes (Always ON) Yes 2009.05 - Rev.D Technical Note BU16006KV ●OUTSIDE DIMENSION CHART BU16006KV 1 PIN MARK Lot No. Figure 1-1 Outside dimension chart www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 2/18 2009.05 - Rev.D Technical Note BU16006KV ●BLOCK DIAGRAM Figure 2-1 Block Diagram www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 3/18 2009.05 - Rev.D Technical Note BU16006KV ●PIN EXPLANATION 1). PIN ASSIGNMENT (TOP VIEW) Figure 3-1 Pin Location www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 4/18 2009.05 - Rev.D Technical Note BU16006KV 2). PIN LIST TERMINAL NAME No. I/O DESCRIPTION A11, A12, A13, A14 39, 42, 45, 48 I Source port 1 TMDS positive inputs A21, A22, A23, A24 54, 57, 60, 63 I Source port 2 TMDS positive inputs B11, B12, B13, B14 38, 41, 44, 47 I Source port 1 TMDS negative inputs B21, B22, B23, B24 53, 56, 59, 62 I Source port 2 TMDS negative inputs - Ground 3, 9, 15, 22, 28, GND 43, 58 HPD1 35 O Source port 1 hot plug detector output (status pin) HPD2 50 O Source port 2 hot plug detector output (status pin) HPD_SINK 31 I Sink port hot plug detector input (status pin) Reserve1 34 I/O Set to HIGH/LOW/OPEN Reserve2 49 I/O Non Connect Pin SCL1 37 I/O Source port 1 DDC I2C clock line SCL2 52 I/O Source port 2 DDC I2C clock line SCL_SINK 29 I/O Sink port DDC I2C clock line SDA1 36 I/O Source port 1 DDC I2C data line SDA2 51 I/O Source port 2 DDC I2C data line SDA_SINK 30 I/O Sink port DDC I2C data line S1, S2 32, 33 I 6, 12, 19, 25, VCC Source selector Power supply 40, 46, 55, 61 TMDS compliant voltage swing control VSADJ 16 I (via 4.64kΩ to GND) Y1, Y2, Y3, Y4 26, 23, 20, 17 O Sink port TMDS positive outputs Z1, Z2, Z3, Z4 27, 24, 21, 18 O Sink port TMDS negative outputs www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 5/18 2009.05 - Rev.D Technical Note BU16006KV ●EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS TMDS Input Stage TMDS Output Stage VDD HPD Output Stage VDD VDD VDD 50Ω 50Ω Anm Ym Bnm Zm HPDn 10mA R-Side I2 C Input/Output Stage T-Side I2 C Input/Output Stage VDD SCL_SINK SDA_SINK SCL SDA VDD HPD_SINK VDD ※n=1,2 m=1,2,3,4 Figure 4-1 I/O pin schematic diagram www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 6/18 2009.05 - Rev.D Technical Note BU16006KV ●SOURCE SELECTION LOOKUP TABLE CONTROL PINS I/O SELECTED HPD_SINK S1 S2 H H H H L H H L L H H L L H H L L H L L L L H L HOT PLUG DETECT STATUS SCL_SINK HPD1 HPD2 SDA_SINK Y/Z A1/B1 Terminations of A2/B2 and A3/B3 are disconnected A2/B2 Terminations of A1/B1 and A3/B3 are disconnected Disallowed (indeterminate)State All terminations are disconnected None (Z) All terminations are disconnected Disallowed (indeterminate)State All terminations are disconnected Disallowed (indeterminate)State All terminations are disconnected Disallowed (indeterminate)State All terminations are disconnected None (Z) All terminations are disconnected HPD3 SCL1 SDA1 H L L SCL2 SDA2 L H L L L H H H H SCL1 SDA1 L L L SCL2 SDA2 L L L L L L L L L None (Z) Are pulled HIGH by external pull-up termination None (Z) Are pulled HIGH by external pull-up termination BU16006_Icc Condition ・S1=Vcc,S1＝GND or S1=GND,S2=GND,HPD_SINK=GND,Ta=Room_temp BU16006_Icc (1)H: Logic high; L: Logic low; X: Don't care; Z: High impedance Icc increase about 6mA if HPD_SINK=Vcc. Figure 4-2 Supply voltage(Vcc) vs. Supply current(Icc) [S1=H,S2=L] www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 7/18 2009.05 - Rev.D Technical Note BU16006KV Electrical characteristics 1.） ABSOLUTE MAXIMUM RATINGS (1) Over operating free-air temperature range (unless otherwise noted) ITEM MIN. TYP. MAX. Power supply voltage (Vcc) -0.3 4.0 DDC, HPD_SINK input voltage -0.3 6.0 Differential input voltage 2.5 4.0 S1, S2 input voltage -0.3 4.0 Power dissipation 1250※ Strage temperture range -55 125 ※70mm×70mm×1.6mm glass epoxy board mount.（Reverse Cu occupation rate：15mm×15mm） When it’s used by than Ta=25℃, it’s reduced by 12.5mW/℃. 2.） RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER VCC Supply voltage TA Operating free-air temperature TMDS DIFFERENTIAL PINS VIC Input common mode voltage VID Receiver peak-to-peak differential input voltage RVSADJ Resistor for TMDS compliant voltage swing range AVCC TMDS Output termination voltage, see Figure 5-1. RT Termination resistance, see Figure 5-1. Signaling rate CONTROL PINS (S1,S2) VIH LVTTL High-level input voltage VIL LVTTL Low-level input voltage STATUS(HPD_SINK) VIH LVTTL High-level input voltage VIL LVTTL Low-level input voltage DDC PINS (SCL_SINK, SDA_SINK,SDA[2:1],SCL[2:1]) VI(DDC) Input voltage www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 8/18 UNIT V V V V mW ℃ MIN. 3 0 TYP. 3.3 - MAX. 3.6 70 UNIT V ℃ VCC–0.6 150 4.60 3 45 0 4.64 3.3 50 - VCC+0.01 1560 4.68 3.6 55 2.25 V mVp-p kΩ V Ω Gbps 2 GND - VCC 0.8 V V 2.4 GND - 5.5 0.8 V V GND - 5.5 V 2009.05 - Rev.D Technical Note BU16006KV 3.） ELECTRICAL CHARACTERISTICS Over recommended operating conditions (unless otherwise noted) LIMITS SYMBOL PARAMETER Icc Supply current PD Power dissipation TMDS DIFFERENTIAL PINS (A/B;Y/Z) Single-ended high-level output VOH voltage Single-ended low-level output VOL voltage Single-ended low-level swing VSWING voltage Overshoot of output differential Vod(O) voltage Undershoot of output Vod(U) differential voltage VOD(ｐｐ) RINT ⊿VOC（SS） Steady state output diｆｆerential voltage Input termination resistance Change in steady-state common-mode output voltage between logic states www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. TEST CONDITIONS VIH- = Vcc,VIL = Vcc-0.4V,RVSADJ = 4.64kΩ RT = 50Ω,AVcc = 3.3V Am/Bm = 2.25 Gbps HDMI data pattern, m = 2,3,4 A1,/B1 = 225 MHz clock VIH = Vcc,VIL = Vcc-0.4V,RVSADJ = 4.64kΩ RT = 50Ω,AVcc = 3.3V Am/Bm = 2.25Gbps HDMI data pattern, m = 2,3,4 A1/B1 =255 MHZ clock TYP.(1) MAX. - 120 150 mA - 450 600 mW - Avcc-50 mV - Avcc-400 mV 300 - 460 mV - 6% 15% 2xVswing - 12% 25% 2xVswing 600 - 920 mVp-p 45 50 55 Ω - 5 - mV Avcc -200 Avcc -600 See Figure 5-2, AVcc = 3.3V, RT = 50Ω See Figure 5-2, Am/Bm = 250 Mbps HDMI data pattern , m = 2,3,4 A1/B1 = 25 MHz clock VIN = 2.9V 9/18 UNIT MIN. 2009.05 - Rev.D Technical Note BU16006KV LIMITS SYMBOL PARAMETER TEST CONDITIONS UNIT MIN. TYP.(1) MAX. DDC Input and output Tx High-level input voltage Low-level input voltage Input leak current, VI=5.5V Input leak current, VI=Vcc High-level output current VO=3.6V Low-level input current VIL=GND Low-level output voltage RL=4.7kΩ Low-level input voltage below output low-level voltage 2.1 -0.3 -10 -10 -10 -10 0.43 0.5 5.5 0.35 10 10 10 10 0.57 V V uA uA uA uA V 20 100 190 mV VIH High_level input voltage 2.4 - 5.5 V VIL Low-level input voltage -0.3 - 0.8 V VIH VIL IlKT① IlKT② IOHT IILT VOLT VOLT-VIL IlKR① Input leak current VI=5.5V -10 - 10 uA IlKR② Input leak current VI=Vcc -10 - 10 uA IOHR High-level output current VO=3.6V -10 - 10 uA IILR Low-level input current VIL=GND -10 - 10 uA Low-level output voltage Iout = 4mA - - 0.2 V VOLR STATUS PINS (HPD 1, HPD 2,) VOH(TTL) TTL High –level output voltage IOH = -8mA 2.4 - Vcc V VOL(TTL) TTL Low –level output voltage IOL = 8mA 0 - 0.4 V CONTROL PINS (S1, S2 ) IIH High –level digital input current VIH = Vcc -10 - 10 uA IIL Low –level digital input current VIL = GND -10 - 10 uA VIH = 5.5V 10 50 100 uA VIH = Vcc 5 30 80 uA VIL = GND -10 - 10 uA STATUS PINS (HPD_SINK) IIH IIL High –level digital input current Low –level digital input current www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 10/18 2009.05 - Rev.D Technical Note BU16006KV SYMBOL PARAMETER TEST CONDITIONS LIMITS MIN. TYP.(1) MAX. UNIT TMDS DIFFERENTIAL PINS (Y/Z) Propagation delay time 480 ps tPLH low-high-level output Propagation delay time tPHL 500 ps low-high-level output Differential output signal rise tr 150 ps time (20%-80%) Differential output signal fall See Figure 5-2, AVCC = 3.3V, tf 150 ps time (20%-80%) RT = 50Ω tsk(p) Pulse skew (|tPHL - tPLH |) 20 ps Intra-pair differential skew, see tsk(D) 50 ps Figure 5-3. Inter-pair channel-to-channel tsk(o) 50 ps output skew(2) tsk(pp) Part to part skew(3) 400 ps DDC I/O PINS (SCL, SCL_SINK, SDA, SDA_SINK) Propagation delay time, tpdLHTR(DDC) low-to-high-level output 650 ns Tx to Rx RL = 4.7KΩ,CL = 100pF Propagation delay time, tpdHLTR(DDC) 200 ns high-to-low-level output Tx to Rx Propagation delay time, tpdLHRT(DDC) 500 ns low-to-high-level output Rx to Tx RL = 1.67KΩ,CL = 400pF Propagation delay time, tpdHLRT(DDC) high-to-low-level output 350 ns Rx to Tx tr Tx(DDC) Tx output Rise time 800 ns RL = 4.7KΩ,CL = 100pF tf Tx(DDC) Tx output Fall time 150 ns tr Rx(DDC) Rx output Rise time 950 ns RL = 1.67KΩ,CL = 400pF tf Rx(DDC) Rx output Fall time 50 ns tsx Select to switch output 8 ns tdis Disable time 5 ns ten Enable time 7 ns Switch time from SCLn to tsx(DDC) CL=10pF 800 ns SCL_SINK CIO Input/output capacitance VI=0V 15 pF STATUS PINS(HPD1,HPD2,HPD3) Propagation delay time, tpdLH(HPD) low-to-high-level output from CL=10pF 5 ns HPD_SINK to HPDn(n=1,2) Propagation delay time, tpdHL(HPD) high-to-low-level output from CL=10pF 5 ns HPD_SINK to HPDn(n=1,2) Switch time from port select to tsx(HPD) CL=10pF 8 ns the latest valid status of HPD Note: 1. All typical values are at 25℃ and with a 3.3V supply. 2. tsk(o) is the magnitude of the difference in propagation delay times between any specified terminals of channel of a devices when inputs are tied together. 3. tsk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of channel of two devices, or between channel 1 of two devices, when both devices operate with the same source, the same supply voltages, at the same temperature, and have identical packages and test circuits. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 11/18 2009.05 - Rev.D Technical Note BU16006KV ●MEASUREMENT SYMBOL AND CIRCUIT AVCC RT RT Zo = RT TMDS Receiver Zo = R T TMDS Driver Figure 5-1 Termination for TMDS Output Driver Vcc R INT VA R INT A V ID TMDS Driver TMDS Receiver B VB RT Y CL 0.5pF Z VY AV CC RT VZ V ID = V A - V B V swing = V Y - V Z DC Coupled AC Coupled VA Vcc V Vcc+0.2 V VB Vcc-0.4 V Vcc-0.2 V VID VID(pp) 0.4 V VIC 0V -0.4 V tPLH tPLH 80% Vswing VOD(O) VOD(pp) 20% tf 100% 0V Differential 0% tr VOD(U) VOC △VOC(SS) Figure 5-2. Timing Test Circuit and Definitions www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 12/18 2009.05 - Rev.D Technical Note BU16006KV VY V OH 50% VZ V OL tsk(D) Figure 5-3 Definition of Intra-Pair Differential Skew A Port 1 B A Port 2 B Vcc V Vcc-0.4 V Vcc-0.4 V Vcc V VDD 2 VDD 0V S1 Clocking S2 tsx tsx Y Output Z 75mV 75mV -75mV HI-Z tdis -75mV ten Figure 5-4 TMDS Outputs Control Timing Definitions www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 13/18 2009.05 - Rev.D Technical Note BU16006KV VDD 2 HPD_SINK VDD 2 HPD1 tpdHL(HPD) tpdLH(HPD) tsx(HPD) 2.4V HPD2 HPD3 0V S1 Vcc 2 S2 SDA_SINK tpdHLRT(DDC) tpdLHRT(DDC) 80% 20% tpdHLTR(DDC) tpdLHTR(DDC) 1.5V V IL SDA1 80% 20% 1.5V SDA2 SDA3 VDD tSX(DDC) 0V tfTX(DDC) trTX(DDC) tfRX(DDC) RX to TX trRX(DDC) VDD TX to RX Figure 5-5 DDC and HPD Timing Definitions www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 14/18 2009.05 - Rev.D Technical Note BU16006KV 1). HPD_SINK Pull down resistance. HPD_SINK is a 5V tolerant structure shown in Figure 6-1. It needs some drive current to pull down HPD_SINK "H" to "L"(max10uA@HPD_SINK=2V). So to pull down HPD_SINK, please use 10kΩ(or under 10kΩ) resistor. Figure 6-1 HPD SINK I/O schematic 2). About don’t use terminal. Unused TMDS input channel can be opened. B U 1 6 0 * * KV Vcc R INT R INT RT A TMDS Receiver TMDS Driver Y AVcc Z B RT Figure 6-2 TMDS Input Fail-Safe Recommendation Unused DDC Buffers of R side polled up to Vｃｃ. VCC 4.7k T SCL_SINK SDA_SINK SCL SDA R Figure 6-3 DDC Buffers in BU160**KV www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 15/18 2009.05 - Rev.D Technical Note BU16006KV Open unused HPDn. Figure 6-4 Open unused HPDn 3）. About serial connect notice. When HDMI sw output connect to other HDMI sw input like following application. There is possibility that. 1080p(12bit) image isn’t displayed. It’s depend on receiver IC characteristic. When system is required 1080p (12bit), Rohm doesn’t recommend serial connect application. Vcc RINT Vcc RINT RINT RINT RT A TMDS Receiver TMDS Driver B Y A Z B TMDS Receiver TMDS Driver Y Z AVCC RT Figure 6-5 serial connect notice 4）. Offset voltage appearance. If differential input is opened, offset voltage appear at differential output OE is set to low to avoid it. Figure 6-6 Offset voltage avoid www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 16/18 2009.05 - Rev.D Technical Note BU16006KV 5）. Limitation of Master and slave direction. Figure 6-7 Limitation of Master and slave direction 6). Attention in use as repeater. Figure 6-8 Ioff specification not meet to HDMI CTS Depend on HDMI CTS, Voff must be less than VDD-10mV, but this IC not meet to CTS cause of Ioff. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 17/18 2009.05 - Rev.D Technical Note BU16006KV Ordering part number B U 1 6 0 0 6 ROHM model name K V E 2 Package type VQFP64 Packaging and forming specification E2 =Reel-shaped emboss taping Package specification VQFP64 <Tape and Reel information> 12.0±0.2 10.0±0.1 48 33 Embossed carrier tape (with dry pack) Quantity 1000pcs 17 64 1 Direction of feed E2 direction is the 1pin of product is at the upper left when you hold ( The ) reel on the left hand and you pull out the tape on the right hand 16 1PIN MARK +0.05 0.145 -0.03 1.6MAX 1.25 1.0±0.2 1.25 0.5±0.15 32 10.0±0.1 12.0±0.2 49 Tape 0.1±0.05 1.4±0.05 4 +6 –4 0.08 S +0.05 0.2 -0.04 0.08 M 1pin 0.5±0.1 (Unit : mm) www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. Reel 18/18 Direction of feed ∗ Order quantity needs to be multiple of the minimum quantity. 2009.05 - Rev.D Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. 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