AD AD8671 Precision, very low noise, low input Datasheet

Precision, Very Low Noise, Low Input
Bias Current Operational Amplifiers
AD8671/AD8672/AD8674
Data Sheet
FEATURES
PIN CONFIGURATIONS
Very low noise: 2.8 nV/√Hz, 77 nV p-p
Wide bandwidth: 10 MHz
Low input bias current: 12 nA max
Low offset voltage: 75 μV max
High open-loop gain: 120 dB min
Low supply current: 3 mA typ per amplifier
Dual-supply operation: ±5 V to ±15 V
Unity-gain stable
No phase reversal
NC 1
8
AD8671
NC
V+
TOP VIEW
6 OUT
(Not to Scale)
V– 4
5 NC
–IN 2
7
NC = NO CONNECT
03718-B-001
+IN 3
Figure 1. 8-Lead SOIC_N (R-8) and 8-Lead MSOP (RM-8)
8
AD8672
V+
OUT B
TOP VIEW
6 –IN B
(Not to Scale)
V– 4
5 +IN B
–IN A 2
APPLICATIONS
7
+IN A 3
PLL filters
Filters for GPS
Instrumentation
Sensors and controls
Professional quality audio
03718-B-003
OUT A 1
Figure 2. 8-Lead SOIC-N (R-8) and 8-Lead MSOP (RM-8)
OUT A 1
14
OUT D
–IN A 2
13
–IN D
12
+IN D
+IN A 3
GENERAL DESCRIPTION
AD8674
TOP VIEW 11 V–
+IN B 5 (Not to Scale) 10 +IN C
The AD8671/AD8672/AD8674 are very high precision amplifiers
featuring very low noise, very low offset voltage and drift, low
input bias current, 10 MHz bandwidth, and low power
consumption. Outputs are stable with capacitive loads of over
1000 pF. Supply current is less than 3 mA per amplifier at 30 V.
The AD8671/AD8672/AD8674’s combination of ultralow noise,
high precision, speed, and stability is unmatched. The MSOP
version of the AD8671/AD8672 requires only half the board
space of comparable amplifiers.
Applications for these amplifiers include high quality PLL
filters, precision filters, medical and analytical instrumentation,
precision power supply controls, ATE, data acquisition, and
precision controls as well as professional quality audio.
–IN B 6
9
–IN C
OUT B 7
8
OUT C
03718-B-005
V+ 4
Figure 3. 14-Lead SOIC_N (R-14) and 14-Lead TSSOP (RU-14)
The AD8671, AD8672, and AD8674 are members of a growing
series of low noise op amps offered by Analog Devices, Inc.
Table 1. Voltage Noise
Package
Single
Dual
Quad
0.9 nV
AD797
1.1 nV
AD8597
AD8599
1.8 nV
ADA4004-1
ADA4004-2
ADA4004-4
2.8 nV
AD8675
AD8676
3.8 nV
AD8671
AD8672
AD8674
The AD8671/AD8672 are specified over the extended industrial
temperature range (−40°C to +125°C), and the AD8674 is specified
over the industrial temperature range (−40°C to +85°C).
The AD8671/AD8672 are available in the 8-lead SOIC and
8-lead MSOP packages. The AD8674 is available in 14-lead
SOIC and 14-lead TSSOP packages.
Surface-mount devices in MSOP packages are available in tape
and reel only.
Rev. F
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AD8671/AD8672/AD8674
Data Sheet
TABLE OF CONTENTS
Specifications..................................................................................... 3
Output Phase Reversal ............................................................... 12
Electrical Characteristics, ±5.0 V ............................................... 3
Total Noise vs. Source Resistance............................................. 12
Electrical Characteristics, ±15 V ................................................ 4
Total Harmonic Distortion (THD) and Noise ....................... 13
Absolute Maximum Ratings ............................................................ 5
Driving Capacitive Loads .......................................................... 13
ESD Caution .................................................................................. 5
GPS Receiver ............................................................................... 14
Typical Performance Characteristics ............................................. 6
Band-Pass Filter .......................................................................... 14
Applications ..................................................................................... 11
PLL Synthesizers and Loop Filters ........................................... 14
Power Dissipation Calculations ................................................ 11
Outline Dimensions ....................................................................... 15
Unity-Gain Follower Applications ........................................... 11
Ordering Guide .......................................................................... 17
REVISION HISTORY
3/13—Rev. E to Rev. F
4/04—Rev. A to Rev. B
Added Figure 7.............................................................................. 6
Updated Outline Dimensions ................................................... 15
Changes to Ordering Guide ...................................................... 17
Changes to Figure 32.................................................................. 11
Changes to Figures 36, 37, and 38 ............................................ 12
6/10—Rev. D to Rev. E
1/04—Rev. 0 to Rev. A
Added Table 1 and Preceding Sentence ..................................... 1
Added AD8672 and AD8674 parts .............................. Universal
Changes to Specifications .............................................................3
Deleted Figure 3.............................................................................6
Changes to Figures 7, 8, and 9 .....................................................6
Changes to Figure 37.................................................................. 12
Added new Figure 32 ................................................................. 10
12/09—Rev. C to Rev. D
Changes to Features and General Description Sections.......... 1
Changes to Absolute Maximum Ratings Section, Table 3,
and Table 4 ................................................................................ 5
Added Power Dissipation Calculations Section ..................... 11
Updated Outline Dimensions ................................................... 15
Changes to Ordering Guide ...................................................... 17
6/05—Rev. B to Rev. C
Changes to Figure 6 ...................................................................... 1
Updated Outline Dimensions ................................................... 14
Changes to Ordering Guide ...................................................... 16
Rev. F | Page 2 of 20
Data Sheet
AD8671/AD8672/AD8674
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS, ±5.0 V
VS = ±5.0 V, VCM = 0 V, TA = 25°C, unless otherwise noted.
Table 2.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Offset Voltage Drift
AD8671
AD8672/AD8674
Input Bias Current
Symbol
Conditions
VOS
∆VOS/∆T
–40°C < TA < +125°C
–40°C < TA < +125°C
IB
+25°C < TA < +125°C
–40°C < TA < +125°C
Input Offset Current
IOS
+25°C < TA < +125°C
–40°C < TA < +125°C
Input Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Input Capacitance, Common Mode
Input Capacitance, Differential Mode
Input Resistance, Common Mode
Input Resistance, Differential Mode
OUTPUT CHARACTERISTICS
Output Voltage High
Output Voltage Low
Output Voltage High
Output Voltage Low
Output Current
POWER SUPPLY
Power Supply Rejection Ratio
AD8671/AD8672
AD8674
Supply Current/Amplifier
DYNAMIC PERFORMANCE
Slew Rate
Settling Time
Gain Bandwidth Product
NOISE PERFORMANCE
Peak-to-Peak Noise
Voltage Noise Density
Current Noise Density
Channel Separation
AD8672/AD8674
Min
CMRR
AVO
CINCM
CINDM
RIN
RINDM
VCM = –2.5 V to +2.5 V
RL = 2 kΩ, VO = –3 V to +3 V
VOH
VOL
VOH
VOL
IOUT
RL = 2 kΩ, –40°C to +125°C
RL = 2 kΩ, –40°C to +125°C
RL = 600 Ω
RL = 600 Ω
PSRR
VS = ±4 V to ±18 V
–12
–20
–40
–12
–20
–40
–2.5
100
1000
+3.8
+3.7
110
106
Typ
Max
Unit
20
30
75
125
µV
µV
0.3
0.3
+3
+5
+8
+6
+6
+8
0.5
0.8
+12
+20
+40
+12
+20
+40
+2.5
µV/°C
µV/°C
nA
nA
nA
nA
nA
nA
V
dB
V/mV
pF
pF
GΩ
MΩ
120
6000
6.25
7.5
3.5
15
+4.0
–3.9
+3.9
–3.8
±10
130
115
3
ISY
VO = 0 V
–40°C < TA < +125°C
SR
tS
RL = 2 kΩ
To 0.1% (4 V step, G = 1)
To 0.01% (4 V step, G = 1)
4
1.4
5.1
10
en p-p
en
in
0.1 Hz to 10 Hz
f = 1 kHz
f = 1 kHz
77
2.8
0.3
CS
f = 1 kHz
f = 10 kHz
–130
–105
GBP
Rev. F | Page 3 of 20
–3.8
–3.7
3.5
4.2
V
V
V
V
mA
dB
dB
mA
mA
V/µs
µs
µs
MHz
100
3.8
nV p-p
nV/√Hz
pA/√Hz
dB
dB
AD8671/AD8672/AD8674
Data Sheet
ELECTRICAL CHARACTERISTICS, ±15 V
VS = ±15 V, VCM = 0 V, TA = 25°C, unless otherwise noted.
Table 3.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Offset Voltage Drift
AD8671
AD8672/AD8674
Input Bias Current
Symbol
Conditions
VOS
∆VOS/∆T
–40°C < TA < +125°C
–40°C < TA < +125°C
IB
+25°C < TA < +125°C
–40°C < TA < +125°C
Input Offset Current
IOS
+25°C < TA < +125°C
–40°C < TA < +125°C
Input Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Input Capacitance, Common Mode
Input Capacitance, Differential Mode
Input Resistance, Common Mode
Input Resistance, Differential Mode
OUTPUT CHARACTERISTICS
Output Voltage High
Output Voltage Low
Output Voltage High
Output Voltage Low
Output Current
Short Circuit Current
POWER SUPPLY
Power Supply Rejection Ratio
AD8671/AD8672
AD8674
Supply Current/Amplifier
DYNAMIC PERFORMANCE
Slew Rate
Settling Time
Gain Bandwidth Product
NOISE PERFORMANCE
Peak-to-Peak Noise
Voltage Noise Density
Current Noise Density
Channel Separation
AD8672/AD8674
Min
CMRR
AVO
CINCM
CINDM
RIN
RINDM
VCM = –12 V to +12 V
RL = 2 kΩ, VO = –10 V to +10 V
VOH
VOL
VOH
VOL
IOUT
ISC
RL = 2 kΩ, –40°C to +125°C
RL = 2 kΩ, –40°C to +125°C
RL = 600 Ω
RL = 600 Ω
PSRR
VS = ±4 V to ±18 V
–12
–20
–40
–12
–20
–40
–12
100
1000
+13.2
+11
110
106
Typ
Max
Unit
20
30
75
125
µV
µV
0.3
0.3
+3
+5
+8
+6
+6
+8
0.5
0.8
+12
+20
+40
+12
+20
+40
+12
µV/°C
µV/°C
nA
nA
nA
nA
nA
nA
V
dB
V/mV
pF
pF
GΩ
MΩ
120
6000
6.25
7.5
3.5
15
+13.8
–13.8
+12.3
–12.4
±20
±30
130
115
3
ISY
VO = 0 V
–40°C <TA < +125°C
SR
tS
RL = 2 kΩ
To 0.1% (10 V step, G = 1)
To 0.01% (10 V step, G = 1)
4
2.2
6.3
10
en p-p
en
in
0.1 Hz to 10 Hz
f = 1 kHz
f = 1 kHz
77
2.8
0.3
CS
f = 1 kHz
f = 10 kHz
–130
–105
GBP
Rev. F | Page 4 of 20
–13.2
–11
3.5
4.2
V
V
V
V
mA
mA
dB
dB
mA
mA
V/µs
µs
µs
MHz
100
3.8
nV p-p
nV/√Hz
pA/√Hz
dB
dB
Data Sheet
AD8671/AD8672/AD8674
ABSOLUTE MAXIMUM RATINGS
Table 4. 1
Parameter
Supply Voltage
Input Voltage
Differential Input Voltage
Output Short-Circuit Duration
Storage Temperature Range
All Packages
Operating Temperature Range
8-Lead Packages
14-Lead Packages
Junction Temperature Range
All Packages
Lead Temperature Range (Soldering, 60 sec)
1
Rating
36 V
VS– to VS+
±0.7 V
Indefinite
–65°C to +150°C
–40°C to +125°C
–40°C to +85°C
–65°C to +150°C
300°C
Absolute maximum ratings apply at 25°C, unless otherwise noted.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
See the Applications section for a related discussion on power.
Table 5. Package Characteristics
Package Type
8-Lead MSOP (RM)
8-Lead SOIC_N (R)
14-Lead SOIC_N (R)
14-Lead TSSOP (RU)
1
θJA 1
142
120
90
112
θJC
44
43
36
35
Unit
°C/W
°C/W
°C/W
°C/W
θJA is specified for the worst-case conditions, that is., θJA is specified for the
device soldered on a 4-layer circuit board for surface-mount packages.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. F | Page 5 of 20
AD8671/AD8672/AD8674
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
10
32
28
CURRENT NOISE DENSITY (pA/√Hz)
VOLTAGE NOISE DENSITY (nV/√Hz)
VS = ±15V
24
20
16
12
8
1
0
10
20
30
60
50
40
FREQUENCY (Hz)
70
80
90
100
0.1
1
1k
10k
Figure 7. Current Noise Density VS = ±15 V
45
31.5
VS = ±15V
40
27.0
VS = ±5V
TA = 25°C
35
NUMBER OF AMPLIFIERS
22.5
18.0
13.5
9.0
4.5
30
25
20
15
10
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
FREQUENCY (kHz)
0
5 10 15 20 25 30 35 40 45
VOS (µV)
Figure 5. Voltage Noise Density vs. Frequency
Figure 8. Input Offset Voltage Distribution
17.5
35
VS = ±15V
VS = ±15V
TA = 25°C
15.0
30
NUMBER OF AMPLIFIERS
12.5
10.0
7.5
5.0
2.5
25
20
15
10
5
0
1
2
3
4
5
6
7
8
FREQUENCY (kHz)
9
10
03718-B-009
0
–35 –30 –25 –20 –15 –10 –5 0
03718-B-010
0
03718-B-008
5
0
–35 –30 –25 –20 –15 –10 –5 0
5 10 15 20 25 30 35 40 45 50
VOS (µV)
Figure 9. Input Offset Voltage Distribution
Figure 6. Voltage Noise Density vs. Frequency
Rev. F | Page 6 of 20
03718-B-011
VOLTAGE NOISE DENSITY (nV/√Hz)
100
FREQUENCY (Hz)
Figure 4. Voltage Noise Density vs. Frequency
VOLTAGE NOISE DENSITY (nV/√Hz)
10
03718-112
0
03718-B-007
4
Data Sheet
AD8671/AD8672/AD8674
16
4.0
15
3.8
14
3.6
12
ISY (mA)
VOS (µV)
13
11
10
3.4
3.2
3.0
VS = ±5V
VS = ±15V
9
2.8
8
VS = ±15V
2.6
7
125
TEMPERATURE (°C)
03718-B-012
85
25
2.4
–40
25
85
03718-B-015
VS = ±5V
6
–40
125
TEMPERATURE (°C)
Figure 10. Input Offset Voltage vs. Temperature
Figure 13. Supply Current vs. Temperature
5.0
14.5
VS = ±5V
VS = ±15V
RL = 2kΩ
4.5
14.0
4.0
+IB
13.5
OUTPUT VOLTAGE (V)
3.5
2.5
2.0
–IB
1.5
1.0
13.0
RL = 600Ω
12.5
12.0
11.5
11.0
0.5
25
85
125
TEMPERATURE (°C)
03718-B-013
10.5
0
–40
10.0
–40
25
85
125
TEMPERATURE (°C)
Figure 11. Input Bias Current vs. Temperature
03718-B-016
IB (nA)
3.0
Figure 14. Output Voltage High vs. Temperature
2.5
–11.0
VS = ±15V
VS = ±15V
2.0
–11.5
–IB
OUTPUT VOLTAGE (V)
1.0
0.5
+IB
0
–0.5
–12.5
RL = 600Ω
–13.0
–13.5
RL = 2kΩ
25
85
TEMPERATURE (°C)
125
Figure 12. Input Bias Current vs. Temperature
–14.5
–40
25
85
TEMPERATURE (°C)
Figure 15. Output Voltage Low vs. Temperature
Rev. F | Page 7 of 20
125
03718-B-017
–1.0
–40
–12.0
–14.0
03718-B-014
IB (nA)
1.5
AD8671/AD8672/AD8674
Data Sheet
GAIN
225
90
180
80
135
30
90
20
PHASE
10
45
0
0
70
60
50
–10
–45
–20
–90
20
–30
–135
10
30
–180
–40
100k
1M
FREQUENCY (Hz)
AVO = 10
40
0
100
03718-B-018
OPEN-LOOP GAIN (dB)
40
100
10M
AVO = 100
1k
10k
AVO = 1
100k
1M
10M
100M
FREQUENCY (Hz)
Figure 19. Output Impedance vs. Frequency
Figure 16. Open-Loop Gain and Phase Shift vs. Frequency
VSY = ±15V
VIN = 4V
RL = 2kΩ
30000
±5V
VOLTAGE (1V/DIV)
25000
15000
±15V
10000
25
85
125
TEMPERATURE (°C)
TIME (100µs/DIV)
03718-B-019
0
–40
Figure 20. Large Signal Transient Response
Figure 17. Open-Loop Gain vs. Temperature
VSY = ±15V
VIN = 200mV p-p
RL = 2kΩ
50
30
20
VOLTAGE (50mV/DIV)
40
VSY = ±15V
VIN = 10mV
RL = ∞
CL = 20pF
AV = 100
03718-B-022
5000
AV = 10
10
AV = 1
0
–10
–20
–40
–50
1k
10k
100k
1M
10M
FREQUENCY (Hz)
100M
TIME (10ms/DIV)
Figure 21. Small Signal Transient Response
Figure 18. Closed-Loop Gain vs. Frequency
Rev. F | Page 8 of 20
03718-B-023
–30
03718-B-020
CLOSED-LOOP GAIN (dB)
AVO (V/mV)
20000
03718-B-021
50
270
IMPEDANCE (Ω)
VSY = ±15V
RL = 10kΩ
CL = 20pF
FM = 59°
OPEN-LOOP PHASE (dB)
60
Data Sheet
AD8671/AD8672/AD8674
160
60
VSY = ±15V
140
50
120
–OS
100
40
CMRR (dB)
30
20
80
60
40
20
0
10
+OS
1k
10k
CAPACITANCE (pF)
03718-B-024
–20
0
100
–40
10
100
10k
1k
100k
1M
10M
100M
FREQUENCY (Hz)
03718-B-027
SMALL SIGNAL OVERSHOOT (%)
VS = ±15
Figure 22. Small Signal Overshoot vs. Load Capacitance
Figure 25. CMRR vs. Frequency
VSY = ±15V
140
120
0V
100
VIN
PSRR (dB)
VOLTAGE (200mV/DIV)
160
VS = ±15V
VIN = 200mV p-p
AV = –100
RL = 10k
80
60
–PSRR
40
+PSRR
20
VOUT
0
0V
TIME (4s/DIV)
–40
10
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
03718-B-028
03718-B-025
–20
Figure 26. PSRR vs. Frequency
Figure 23. Positive Overdrive Recovery
135
VIN
134
133
PSRR (dB)
0V
132
131
130
0V
129
VOUT
TIME (4s/DIV)
127
–40
25
85
TEMPERATURE (°C)
Figure 27. PSRR vs. Temperature
Figure 24. Negative Overdrive Recovery
Rev. F | Page 9 of 20
125
03718-B-029
128
03718-B-026
VOLTAGE (200mV/DIV)
VS = ±2.5V TO ±18V
VSY = ±15V
VIN = 200mV p-p
AV = –100
RL = 10k
AD8671/AD8672/AD8674
Data Sheet
0
VS = ±15V
VS = ±15V, ±5V
CHANNEL SEPARATION (dB)
VOLTAGE NOISE (50nV/DIV)
–20
–40
–60
–80
–100
–140
100
1k
10k
100k
1M
FREQUENCY (Hz)
Figure 29. Channel Separation
Figure 28. 0.1 Hz to 10 Hz Input Voltage Noise
Rev. F | Page 10 of 20
10M
100M
03718-B-031
TIME (1µs/DIV)
03718-B-030
–120
Data Sheet
AD8671/AD8672/AD8674
APPLICATIONS
POWER DISSIPATION CALCULATIONS
Therefore, the rise above ambient temperature is
To achieve low voltage noise in a bipolar op amp, the current
must be increased. The emitter-base theoretical voltage noise is
approximately
504 mW × 112°C/W = 56°C
e n = 10 9 kT
2
nV/ Hz
qI C
With an ambient temperature of 50°C, the junction temperature
is 106°C. This is less than the specified absolute maximum junction
temperature, but for systems with long product lifetimes (years),
this should be considered carefully.
To achieve the low voltage noise of 2.8 nV/√Hz, the input stage
current is higher than most op amps with an equivalent gain
bandwidth product. The thermal noise of a 1 kΩ resistor is
4 nV/√Hz, which is higher than the voltage noise of AD8671
family. Low voltage noise requires using low values of resistors,
so low voltage noise op amps should have good drive capability,
such as a 600 Ω load. This means that the second stage and
output stage are also biased at higher currents. As a result, the
supply current of a single op amp is 3.5 mA maximum at room
temperature.
Note that these calculations do not include the additional
dissipation caused by the load current on each op amp. Possible
solutions to reduce junction temperature include system level
considerations such as fans, Peltier thermoelectric coolers, and
heat pipes. Board considerations include operation on lower
voltages, such as ±12 V or ±5 V, and using two dual op amps
instead of one quad op amp. If the extremely low voltage noise
and high gain bandwidth is not required, using other quad op
amps, such as ADA4091-4, OP4177, ADA4004-4, OP497, or
AD704 can be considered.
Junction temperature has a direct affect on reliability. For more
information, visit the following Analog Devices, Inc., website:
http://www.analog.com/en/quality-and-reliability/reliabilitydata/content/index.html
UNITY-GAIN FOLLOWER APPLICATIONS
MTTF and FIT calculations can be done based on the junction
temperature and IC process. Use the following equation to
determine the junction temperature:
TJ = TA + PD × θJA
For the AD8671 single in the 8-lead MSOP package, the thermal
resistance, θJA, is 142°C/W. If the ambient temperature is 30°C
and the supply voltages are ±12 V, the power dissipation is
24 V × 3.5 mA = 84 mW
When large transient pulses (>1 V) are applied at the positive
terminal of amplifiers (such as the OP27, LT1007, OPA227, and
AD8671) with back-to-back diodes at the input stage, the use of
a resistor in the feedback loop is recommended to avoid having
the amplifier load the signal generator. The feedback resistor,
RF, should be at least 500 Ω. However, if large values must be
used for RF, a small capacitor, CF, should be inserted in parallel
with RF to compensate for the pole introduced by the input
capacitance and RF.
Figure 30 shows the uncompensated output response with a
10 kΩ resistor in the feedback and the compensated response
with CF = 15 pF.
OUTPUT UNCOMPENSATED
Therefore, the rise above ambient temperature is
OUTPUT
COMPENSATED
84 mW × 142°C/W = 12°C
30 V × 4.2 mA × four op amps = 504 mW
Rev. F | Page 11 of 20
CH2 +OVER
7.885%
TIME (100ns/DIV)
Figure 30. Transient Output Response
03718-B-032
For the AD8674 single in the 14-Lead TSSOP package, the thermal
resistance, θJA, is 112°C/W. Although θJA is lower than it is for the
8-lead package, the four op amps are powered simultaneously. If
the ambient temperature is 50°C and the supply voltages are ±15 V,
the power dissipation is
REF1 +OVER
23.23%
VOLTAGE (1V/DIV)
If the ambient temperature is 30°C, the junction temperature is
42°C. The previously mentioned website that details the effect
of the junction temperature on reliability has a calculator that
requires only the part number and the junction temperature to
determine the process technology.
AD8671/AD8672/AD8674
Data Sheet
OUTPUT PHASE REVERSAL
TOTAL NOISE VS. SOURCE RESISTANCE
Phase reversal is a change of polarity in the amplifier transfer
function that occurs when the input voltage exceeds the supply
voltage. The AD8671/AD8672/AD8674 do not exhibit phase
reversal even when the input voltage is 1 V beyond the supplies.
The low input voltage noise of the AD8671/AD8672/AD8674
makes them a great choice for applications with low source
resistance. However, because they have low input current noise,
they can also be used in circuits with substantial source
resistance.
VSY = ±15V
Figure 32 shows the voltage noise, current noise, thermal noise,
and total rms noise of the AD8671 as a function of the source
resistance.
VOLTAGE (1V/DIV)
VIN
For RS < 475 Ω, the input voltage noise, en, dominates.
For 475 Ω < RS < 412 kΩ, thermal noise dominates.
For RS > 412 kΩ, the input current noise dominates.
VOUT
TIME (10s/DIV)
Figure 31. Output Phase Reversal
C
100
in
10
en_t
(4kR ST)1/2
1
10
100
en
B
A
1k
10k
100k
SOURCE RESISTANCE ()
Figure 32. Noise vs. Source Resistance
Rev. F | Page 12 of 20
1M
03718-B-034
TOTAL NOISE (nV/Hz)
03718-B-033
1000
Data Sheet
AD8671/AD8672/AD8674
TOTAL HARMONIC DISTORTION (THD) AND NOISE
0.1000
VSY = ±15V
RL = 2kΩ
CL = 1nF
VIN = 100mV
AV = +1
VOLTAGE (500mV/DIV)
The AD8671/AD8672/AD8674 exhibit low total harmonic
distortion (THD) over the entire audio frequency range. This
makes them suitable for applications with high closed-loop
gains, including audio applications. Figure 33 shows
approximately 0.0006% of THD + N in a positive unity gain, the
worst-case configuration for distortion.
CH2 +OVER
39.80%
CH2 –OVER
39.80%
03718-B-036
VS = ±5V
VIN = 2.5V
RL = 600Ω
0.0500
0.0200
TIME (10ms/DIV)
Figure 34. AD8671 Capacitive Load Drive
0.0050
RF
0.0020
LT1007
500Ω
0.0010
0.0005
RG
AD8671
500Ω
VCC
CF
220pF
0.0002
RS
50
100
200
500
1k
2k
5k
10k 20k
Hz
03718-B-035
0.0001
20
10Ω
CL
1nF
RL
2kΩ
VIN
VEE
Figure 33. Total Harmonic Distortion and Noise
03718-B-037
PERCENTAGE
0.0100
Figure 35. Recommended Capacitive Load Circuit
DRIVING CAPACITIVE LOADS
The AD8671/AD8672/AD8674 can drive large capacitive loads
without causing instability. However, when configured in unity
gain, driving very large loads can cause unwanted ringing or
instability.
VOLTAGE (100mV/DIV)
CH2 –OVER
6.061%
TIME (10ms/DIV)
Figure 36. Compensated Load Drive
The output response of the circuit is shown in Figure 36.
Rev. F | Page 13 of 20
CH2 +OVER
5.051%
03718-B-038
Figure 34 shows the output of the AD8671 with a capacitive
load of 1 nF. If heavier loads are used in low closed-loop gain or
unity-gain configurations, it is recommended to use external
compensation as shown in the circuit in Figure 35. This
technique reduces the overshoot and prevents the op amp from
oscillation. The trade-off of this circuit is a reduction in output
swing. However, a great added benefit stems from the fact that
the input signal and the op amp’s noise are filtered, and thus the
overall output noise is kept to a minimum.
VSY = ±15V
RL = 2kΩ
CL = 1nF
CF = 220pF
VIN = 100mV
AV = +2
AD8671/AD8672/AD8674
Data Sheet
ADC
LOW NOISE OP AMP
MIXER
VGA
AD8671
AD831
AD8671
DEMODULATOR
LOW-PASS FILTER
AD630
AD8610
AD10200
AD8369
03718-B-039
BAND-PASS FILTER
CODE GENERATOR
Figure 37. Simplified Block Diagram of a GPS Receiver
GPS RECEIVER
The band-pass response is shown in Figure 39.
GPS receivers require low noise to minimize RF effects. The
precision of the AD8671 makes it an excellent choice for such
applications. Its very low noise and wide bandwidth make it
suitable for band-pass and low-pass filters without the penalty
of high power consumption.
200µV/DIV
VS = ±15V
Figure 37 shows a simplified block diagram of a GPS receiver.
The next section details the design equations.
Filters are useful in many applications; for example, band-pass
filters are used in GPS systems, as discussed in the previous
section. Figure 38 shows a second-order band-pass KRC filter.
100
1k
10k
100k
2.25kΩ
VCC
Figure 39. Band-Pass Response
PLL SYNTHESIZERS AND LOOP FILTERS
C2
C2
1nF
Phase-lock loop filters are used in AM/FM modulation.
1nF
R2
2.25kΩ
RB
18kΩ
RA
10kΩ
03718-B-040
VEE
Figure 38. Band-Pass KRC Filter
The equal component topology yields a center frequency
fo =
2
2πRC
and Q =
Loop filters in PLL design require accuracy and care in their
implementation. The AD8671/AD8672/AD8674 are ideal
candidates for such filter design; the low offset voltage and low
input bias current minimize the output error. In addition to the
excellent dc specifications, the AD8671/AD8672/AD8674 have
a unique performance at high frequencies; the high open-loop
gain and wide bandwidth allow the user to design a filter with a
high closed-loop gain if desirable. To optimize the filter design,
it is recommended to use small value resistors to minimize the
thermal noise. A simple example is shown in Figure 40.
2
4−K
PHASE
DETECTOR
where:
K =1+
R1
C1
10kΩ
VCC
1nF
CHARGE
PUMP
RB
RA
VCO
D
VEE
IN
Figure 40. PLL Filter Simplified Block Diagram
Rev. F | Page 14 of 20
03718-B-042
2.25kΩ
VIN
10M
1M
Hz
R3
R1
03718-B-041
BAND-PASS FILTER
Data Sheet
AD8671/AD8672/AD8674
OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)
8
4.00 (0.1574)
3.80 (0.1497)
5
1
6.20 (0.2441)
5.80 (0.2284)
4
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0040)
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
SEATING
PLANE
0.50 (0.0196)
0.25 (0.0099)
45°
8°
0°
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
012407-A
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 41. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
3.20
3.00
2.80
8
3.20
3.00
2.80
1
5.15
4.90
4.65
5
4
PIN 1
IDENTIFIER
0.65 BSC
0.95
0.85
0.75
15° MAX
1.10 MAX
0.40
0.25
6°
0°
0.23
0.09
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 42. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
Rev. F | Page 15 of 20
0.80
0.55
0.40
10-07-2009-B
0.15
0.05
COPLANARITY
0.10
AD8671/AD8672/AD8674
Data Sheet
8.75 (0.3445)
8.55 (0.3366)
4.00 (0.1575)
3.80 (0.1496)
8
14
1
7
6.20 (0.2441)
5.80 (0.2283)
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0039)
COPLANARITY
0.10
0.50 (0.0197)
0.25 (0.0098)
1.75 (0.0689)
1.35 (0.0531)
SEATING
PLANE
0.51 (0.0201)
0.31 (0.0122)
45°
8°
0°
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
060606-A
COMPLIANT TO JEDEC STANDARDS MS-012-AB
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 43. 14-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-14)
Dimensions shown in millimeters and (inches)
5.10
5.00
4.90
14
8
4.50
4.40
4.30
6.40
BSC
1
7
PIN 1
0.65 BSC
1.20
MAX
0.15
0.05
COPLANARITY
0.10
0.30
0.19
0.20
0.09
SEATING
PLANE
8°
0°
COMPLIANT TO JEDEC STANDARDS MO-153-AB-1
Figure 44. 14-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-14)
Dimensions shown in millimeters
Rev. F | Page 16 of 20
0.75
0.60
0.45
061908-A
1.05
1.00
0.80
Data Sheet
AD8671/AD8672/AD8674
ORDERING GUIDE
Model 1
AD8671ARZ
AD8671ARZ-REEL
AD8671ARZ-REEL7
AD8671ARMZ
AD8671ARMZ-REEL
AD8672AR
AD8672AR-REEL
AD8672AR-REEL7
AD8672ARZ
AD8672ARZ-REEL
AD8672ARZ-REEL7
AD8672ARMZ
AD8672ARMZ-REEL
AD8674ARZ
AD8674ARZ-REEL
AD8674ARZ-REEL7
AD8674ARU
AD8674ARUZ
AD8674ARUZ-REEL
1
Temperature Range
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
Package Description
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead MSOP
8-Lead MSOP
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead MSOP
8-Lead MSOP
14-Lead SOIC_N
14-Lead SOIC_N
14-Lead SOIC_N
14-Lead TSSOP
14-Lead TSSOP
14-Lead TSSOP
Z = RoHS Compliant Part.
Rev. F | Page 17 of 20
Package Option
R-8
R-8
R-8
RM-8
RM-8
R-8
R-8
R-8
R-8
R-8
R-8
RM-8
RM-8
R-14
R-14
R-14
RU-14
RU-14
RU-14
Branding
A0V
A0V
A0W
A0W
AD8671/AD8672/AD8674
Data Sheet
NOTES
Rev. F | Page 18 of 20
Data Sheet
AD8671/AD8672/AD8674
NOTES
Rev. F | Page 19 of 20
AD8671/AD8672/AD8674
Data Sheet
NOTES
©2004–2013 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D03718–0–3/13(F)
Rev. F | Page 20 of 20