Sample & Buy Product Folder Support & Community Tools & Software Technical Documents CSD23280F3 SLPS601 – APRIL 2016 CSD23280F3 –12-V P-Channel FemtoFET™ MOSFET 1 Features • • • • 1 • • • • Product Summary Low On Resistance Ultra-Low Qg and Qgd High Operating Drain Current Ultra-Small Footprint – 0.73 mm × 0.64 mm Ultra-Low Profile – 0.35-mm Max Height Integrated ESD Protection Diode – Rated > 4-kV HBM – Rated > 2-kV CDM Lead and Halogen Free RoHS Compliant TA = 25°C • • UNIT Drain-to-Source Voltage –12 V Qg Gate Charge Total (4.5 V) 0.95 nC Qgd Gate Charge Gate-to-Drain RDS(on) VGS(th) Drain-to-Source On-Resistance 0.068 nC VGS = –1.5 V 230 mΩ VGS = –1.8 V 180 mΩ VGS = –2.5 V 129 mΩ VGS = –4.5 V 97 mΩ Threshold Voltage –0.65 V Ordering Information(1) 2 Applications • • TYPICAL VALUE VDS Optimized for Load Switch Applications Optimized for General Purpose Switching Applications Battery Applications Handheld and Mobile Applications 3 Description This –12-V, 97-mΩ, P-Channel FemtoFET™ MOSFET is designed and optimized to minimize the footprint in many handheld and mobile applications. This technology is capable of replacing standard small signal MOSFETs while providing a substantial reduction in footprint size. . . DEVICE QTY CSD23280F3 3000 CSD23280F3T 250 MEDIA PACKAGE SHIP 7-Inch Reel Femto 0.73-mm × 0.64-mm Land Grid Array (LGA) Tape and Reel (1) For all available packages, see the orderable addendum at the end of the data sheet. Absolute Maximum Ratings TA = 25°C VALUE UNIT VDS Drain-to-Source Voltage –12 V VGS Gate-to-Source Voltage –6 V ID Continuous Drain Current(1) 1.8 A IDM Pulsed Drain Current(1)(2) 11.4 A PD Power Dissipation(1) 500 mW Human Body Model (HBM) 4000 V Charged Device Model (CDM) 2000 V –55 to 150 °C V (ESD) TJ, Tstg Operating Junction, Storage Temperature (1) Typical RθJA = 255°C/W on 1-in2 (6.45-cm2), 2-oz. (0.071-mm) thick Cu pad on a 0.06-in (1.52-mm) thick FR4 PCB. (2) Pulse duration ≤ 100 μs, duty cycle ≤ 1% . Typical Part Dimensions Top View G 0.35 mm D 0.64 mm 0.73 mm S 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. CSD23280F3 SLPS601 – APRIL 2016 www.ti.com Table of Contents 1 2 3 4 5 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Specifications......................................................... 6.1 6.2 6.3 6.4 1 1 1 2 3 7 5.1 Electrical Characteristics........................................... 3 5.2 Thermal Information .................................................. 3 5.3 Typical MOSFET Characteristics.............................. 4 6 Community Resources.............................................. Trademarks ............................................................... Electrostatic Discharge Caution ................................ Glossary .................................................................... 7 7 7 7 Mechanical, Packaging, and Orderable Information ............................................................. 8 7.1 Mechanical Dimensions ............................................ 8 7.2 Recommended Minimum PCB Layout...................... 9 7.3 Recommended Stencil Pattern ................................. 9 Device and Documentation Support.................... 7 4 Revision History 2 DATE REVISION NOTES April 2016 * Initial release. Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: CSD23280F3 CSD23280F3 www.ti.com SLPS601 – APRIL 2016 5 Specifications 5.1 Electrical Characteristics TA = 25°C (unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT STATIC CHARACTERISTICS BVDSS Drain-to-source voltage VGS = 0 V, IDS = –250 μA IDSS Drain-to-source leakage current VGS = 0 V, VDS = –9.6 V –50 nA IGSS Gate-to-source leakage current VDS = 0 V, VGS = –5 V –25 nA VGS(th) Gate-to-source threshold voltage VDS = VGS, IDS = –250 μA RDS(on) gfs Drain-to-source on-resistance Transconductance –12 –0.40 V –0.65 –0.95 VGS = –1.5 V, IDS = –0.1 A 230 399 mΩ V VGS = –1.8 V, IDS = –0.4 A 180 250 mΩ VGS = –2.5 V, IDS = –0.4 A 129 165 mΩ VGS = –4.5 V, IDS = –0.4 A 97 116 mΩ VDS = –1.2 V, IDS = –0.4 A 3 S DYNAMIC CHARACTERISTICS Ciss Input capacitance Coss Output capacitance Crss Reverse transfer Capacitance RG Series gate resistance Qg Gate charge total (4.5 V) Qgd Gate charge gate-to-drain Qgs Gate charge gate-to-source Qg(th) Gate charge at Vth Qoss Output charge td(on) Turn on delay time tr Rise time td(off) Turn off delay time tf Fall time 180 234 pF 73 95 pF 8.5 11.1 pF 1.23 nC VGS = 0 V, VDS = –6 V, ƒ = 1 MHz Ω 9 0.95 VDS = –6 V, IDS = –0.4 A VDS = –6 V, VGS = 0 V 0.068 nC 0.30 nC 0.15 nC 1.07 nC 8 ns VDS = –6 V, VGS = –4.5 V, IDS = –0.4 A, RG = 0 Ω 4 ns 21 ns 8 ns DIODE CHARACTERISTICS VSD Diode forward voltage ISD = –0.4 A, VGS = 0 V –0.73 –1.0 V 5.2 Thermal Information TA = 25°C (unless otherwise stated) THERMAL METRIC RθJA (1) (2) TYPICAL VALUES UNIT Junction-to-ambient thermal resistance (1) 90 °C/W Junction-to-ambient thermal resistance (2) 255 °C/W Device mounted on FR4 material with 1-in2 (6.45-cm2), 2-oz. (0.071-mm) thick Cu. Device mounted on FR4 material with minimum Cu mounting area. Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: CSD23280F3 3 CSD23280F3 SLPS601 – APRIL 2016 www.ti.com 5.3 Typical MOSFET Characteristics TA = 25°C (unless otherwise stated) Figure 1. Transient Thermal Impedance 5 VGS = -1.5 V VGS = -1.8 V VGS = -2.5 V VGS = -4.5 V 9 8 -IDS - Drain-To-Source Current (A) -IDS - Drain-to-Source Current (A) 10 7 6 5 4 3 2 1 TC = 125° C TC = 25° C TC = -55° C 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 0 0 0.2 0.4 0.6 0.8 1 -VDS - Drain-to-Source Voltage (V) 1.2 1.4 0 0.4 D002 0.8 1.2 1.6 2 -VGS - Gate-To-Source Voltage (V) 2.4 2.8 D003 VDS = –5 V Figure 2. Saturation Characteristics 4 Submit Documentation Feedback Figure 3. Transfer Characteristics Copyright © 2016, Texas Instruments Incorporated Product Folder Links: CSD23280F3 CSD23280F3 www.ti.com SLPS601 – APRIL 2016 Typical MOSFET Characteristics (continued) TA = 25°C (unless otherwise stated) 1000 4 C - Capacitance (pF) -VGS - Gate-to-Source Voltage (V) 5 4.5 3.5 3 2.5 2 1.5 100 10 1 Ciss = Cgd + Cgs Coss = Cds + Cgd Crss = Cgd 0.5 1 0 0 0.2 0.4 0.6 0.8 Qg - Gate Charge (nC) VDS = –6 V 1 0 1.2 2 D004 D005 Figure 5. Capacitance 350 RDS(on) - On-State Resistance (m:) 0.95 -VGS(th) - Threshold Voltage (V) 12 ID = –0.4 A Figure 4. Gate Charge 0.85 0.75 0.65 0.55 0.45 0.35 0.25 -75 4 6 8 10 -VDS - Drain-to-Source Voltage (V) TC = 25° C, I D = -0.4 A TC = 125° C, I D = -0.4 A 300 250 200 150 100 50 0 -50 -25 0 25 50 75 100 TC - Case Temperature (qC) 125 150 0 175 1 D006 2 3 4 5 6 -VGS - Gate-To-Source Voltage (V) 7 8 D007 ID = –250 µA Figure 6. Threshold Voltage vs Temperature Figure 7. On-State Resistance vs Gate-to-Source Voltage 10 1.3 VGS = -1.8 V VGS = -2.5 V VGS = -4.5 V -ISD - Source-To-Drain Current (A) Normalized On-State Resistance 1.4 1.2 1.1 1 0.9 0.8 0.7 -75 TC = 25qC TC = 125qC 1 0.1 0.01 0.001 0.0001 -50 -25 0 25 50 75 100 TC - Case Temperature (qC) VGS = –4.5 V 125 150 175 0 0.2 0.4 0.6 0.8 -VSD - Source-To-Drain Voltage (V) D008 1 D009 ID = –0.4 A Figure 8. Normalized On-State Resistance vs Temperature Figure 9. Typical Diode Forward Voltage Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: CSD23280F3 5 CSD23280F3 SLPS601 – APRIL 2016 www.ti.com Typical MOSFET Characteristics (continued) TA = 25°C (unless otherwise stated) 3 -IDS - Drain-to-Source Current (A) -IDS - Drain-To-Source Current (A) 100 10 1 0.1 100 ms 10 ms 0.01 0.1 1 ms 100 µs 1 10 -VDS - Drain-To-Source Voltage (V) 100 2.5 2 1.5 1 0.5 0 -50 -25 D010 0 25 50 75 100 125 TA - Ambient Temperature (qC) 150 175 D011 Single Pulse, Max RθJA = 255°C/W Figure 10. Maximum Safe Operating Area 6 Figure 11. Maximum Drain Current vs Temperature Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: CSD23280F3 CSD23280F3 www.ti.com SLPS601 – APRIL 2016 6 Device and Documentation Support 6.1 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 6.2 Trademarks FemtoFET, E2E are trademarks of Texas Instruments. All other trademarks are the property of their respective owners. 6.3 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 6.4 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: CSD23280F3 7 CSD23280F3 SLPS601 – APRIL 2016 www.ti.com 7 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 7.1 Mechanical Dimensions 0.73 0.65 A B PIN 1 INDEX AREA 0.64 0.56 0.35 MAX C SEATING PLANE 0.4 0.225 2 3 0.175 0.51 0.49 0.35 1 0.015 0.16 2X 0.14 C B A 2X 0.16 0.14 0.015 C A B 0.26 0.24 (1) All linear dimensions are in millimeters (dimensions and tolerancing per AME T14.5M-1994). (2) This drawing is subject to change without notice. (3) This package is a PB-free solder land design. Pin Configuration Position 8 Designation Pin 1 Gate Pin 2 Source Pin 3 Drain Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: CSD23280F3 CSD23280F3 www.ti.com SLPS601 – APRIL 2016 7.2 Recommended Minimum PCB Layout (0.15) 2X (0.25) 2X (0.15) 0.05 MIN ALL AROUND TYP 1 3 SYMM (0.35) (0.5) 2 (R0.05) TYP METAL UNDER SOLDER MASK TYP (0.175) SOLDER MASK OPENING TYP PKG (0.4) (1) All dimensions are in millimeters. 7.3 Recommended Stencil Pattern 2X (0.25) (0.15) 2X (0.15) 1 3 SYMM (0.35) (0.5) 2 (R0.05) TYP PKG (0.175) (0.4) (1) All dimensions are in millimeters. Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Product Folder Links: CSD23280F3 9 PACKAGE OPTION ADDENDUM www.ti.com 20-May-2016 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) CSD23280F3 ACTIVE PICOSTAR YJM 3 3000 Green (RoHS & no Sb/Br) Call TI Level-1-260C-UNLIM -55 to 150 5 CSD23280F3T ACTIVE PICOSTAR YJM 3 250 Green (RoHS & no Sb/Br) Call TI Level-1-260C-UNLIM -55 to 150 5 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 20-May-2016 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 9-Jul-2016 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) CSD23280F3 PICOST AR YJM 3 3000 180.0 8.4 CSD23280F3 PICOST AR YJM 3 3000 178.0 8.4 Pack Materials-Page 1 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 0.7 0.79 0.44 4.0 8.0 Q2 0.7 0.79 0.44 4.0 8.0 Q2 PACKAGE MATERIALS INFORMATION www.ti.com 9-Jul-2016 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CSD23280F3 PICOSTAR YJM 3 3000 182.0 182.0 20.0 CSD23280F3 PICOSTAR YJM 3 3000 220.0 220.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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