Data Sheet March 1997 L7554 Low-Power SLIC Features ■ Low active power (typical 165 mW during on-hook transmission) ■ Sleep state for low idle power (76 mW) ■ Quiet Tip/Ring polarity reversal ■ Supports meter pulse injection ■ Spare op amp for meter pulse filtering ■ –24 V to –72 V power supply operation ■ Distortion-free on-hook transmission ■ Convenient operating states: — Forward powerup — Polarity reversal powerup — Forward low-power scan — Polarity reversal low-power scan — Ground start — Disconnect (high impedance) ■ Adjustable supervision functions: — Off-hook detector with longitudinal rejection — Ground key detector — Ring trip detector ■ Independent, adjustable, dc and ac parameters: — dc feed resistance — Loop current limit — Termination impedance ■ Thermal protection Description This electronic subscriber loop interface circuit (SLIC) is optimized for low-power consumption while providing an extensive set of features. Quiet polarity reversal is possible because the ac path is uninterrupted during transition. The L7554 includes the ground start state and a summing node for meter pulse injection to 2.2 Vrms. A spare, uncommitted op amp is included for meter pulse filtering. The device is being offered in two versions, based upon maximum battery. The L7554AP is guaranteed to –60 V, and the L7554BP is guaranteed to –72 V. The device is available in a 44-pin PLCC package. It is built by using a 90 V complementary bipolar (CBIC) process. Data Sheet March 1997 L7554 Low-Power SLIC Table of Contents Content Page Features .................................................................................................................................................................. 1 Description ............................................................................................................................................................... 1 Pin Information ......................................................................................................................................................... 4 Functional Description .............................................................................................................................................. 6 Absolute Maximum Ratings ..................................................................................................................................... 6 Recommended Operating Conditions ..................................................................................................................... 7 Electrical Characteristics ......................................................................................................................................... 7 Ring Trip Requirements ..................................................................................................................................... 11 Test Configurations ............................................................................................................................................... 12 Applications ........................................................................................................................................................... 14 Design Considerations ....................................................................................................................................... 16 Characteristic Curves......................................................................................................................................... 17 dc Applications ................................................................................................................................................... 20 Battery Feed.................................................................................................................................................... 20 Overhead Voltage .......................................................................................................................................... 20 Adjusting Overhead Voltage ........................................................................................................................... 21 Adjusting dc Feed Resistance......................................................................................................................... 22 Adjusting Overhead Voltage and dc Feed Resistance Simultaneously .......................................................... 22 Loop Range..................................................................................................................................................... 22 Off-Hook Detection ......................................................................................................................................... 22 Ring Trip Detection......................................................................................................................................... 23 Ring Ground Detection................................................................................................................................... 23 ac Design ........................................................................................................................................................... 24 First-Generation Codecs.................................................................................................................................. 24 Second-Generation Codecs ............................................................................................................................ 24 Third-Generation Codecs ................................................................................................................................ 24 Selection Criteria ............................................................................................................................................. 24 PCB Layout Information ......................................................................................................................................... 26 Outline Diagram...................................................................................................................................................... 27 44-Pin PLCC ....................................................................................................................................................... 27 Ordering Information ........................................................................................................................................... 28 2 Lucent Technologies Inc. Data Sheet March 1997 L7554 Low-Power SLIC FB2 FB1 CF2 CF1 AGND VREG BGND VBAT VCC IPROG Description (continued) POWER CONDITIONING & REFERENCE RECTIFIER – –1 V/24 mA VTX TXI 3 DCOUT 9.6 VITR 0.1 µF + CEXTERNAL SN PT PR DCR A=4 SPARE OP AMP – XMT + A = –4 – RCVN + RCVP 1 B0 dc RESISTANCE ADJUST BATTERY FEED STATE CONTROL B1 B2 LCTH LOOP CLOSURE DETECTOR + NLC – + RTSP RTSN ICM RING TRIP DETECTOR NRDET – RING GROUND DETECTOR RGDET 12-2569 (C) Figure 1. Functional Diagram Lucent Technologies Inc. 3 Data Sheet March 1997 L7554 Low-Power SLIC 6 5 4 3 FB2 IPROG Pin Information 2 1 44 43 42 41 40 7 39 FB1 VCC 8 38 SN RCVP 9 37 XMT RCVN 10 36 B1 TXI 11 35 B2 LCTH 12 34 NLC VREG 13 33 NRDET DCOUT 14 32 RTSP VBAT 15 31 RTSN PR 16 30 PT 29 VTX L7554 18 19 20 21 22 23 24 25 26 27 CF2 CF1 VITR ICM RGDET B0 AGND AGND DCR BGND 17 28 12-2571 (C) Figure 2. Pin Diagram (PLCC Chip) Table 1. Pin Descriptions Pin 4 Symbol Type Description 3 IPROG I Current-Limit Program Input. A resistor to DCOUT sets the dc current limit of the device. 8 VCC — 9 RCVP I Receive ac Signal Input (Noninverting). This high-impedance input controls the ac differential voltage on Tip and Ring. 10 RCVN I Receive ac Signal Input (Inverting). This high-impedance input controls the ac differential voltage on Tip and Ring. 11 TXI — 12 LCTH I Loop Closure Threshold Input. Connect a resistor to DCOUT to set off-hook threshold. 13 VREG I Regulated Negative dc Battery Voltage. Can be connected to an external regulator. Otherwise, connect to VBAT. 14 DCOUT O dc Output Voltage. This output is a voltage that is directly proportional to the absolute value of the differential Tip/Ring current. 15 VBAT — Battery Supply. Negative high-voltage power supply. 16 PR I/O Protected Ring. The output of the ring driver amplifier and input to loop sensing circuitry. Connect to loop through overvoltage protection. 18 CF2 — Filter Capacitor 2. Connect a 0.1 µF capacitor from this pin to AGND. 19 CF1 — Filter Capacitor 1. Connect a 0.47 µF capacitor from this pin to pin CF2. +5 V Power Supply. ac/dc Separation. Connect a 0.1 µF capacitor from this pin to VTX. Lucent Technologies Inc. Data Sheet March 1997 L7554 Low-Power SLIC Pin Information (continued) Table 1. Pin Descriptions (continued) Pin Symbol Type Description 20 VITR O Transmit ac Output Voltage. This output is a voltage that is directly proportional to the differential ac Tip/Ring current. 21 ICM I Common-Mode Current Sense. To program ring ground sense threshold, connect a resistor to VCC and connect a capacitor to AGND to filter 50/60 Hz. If unused, the pin can be left unconnected. 22 RGDET O Ring Ground Detect. When high, this open-collector output indicates the presence of a ring ground. To use, connect a 100 kΩ resistor to VCC. State Control Input. B0, B1, and B2 determine the state of the SLIC. See Table 2. 23 B0 I 24 AGND — Analog Signal Ground. 25 AGND — Analog Signal Ground. 26 DCR I 27 BGND — Battery Ground. Ground return for the battery supply. 29 VTX O This output is a voltage that is directly proportional to the differential Tip/Ring current. 30 PT I/O Protected Tip. The output of the tip driver amplifier and input to loop sensing. Connect to loop through overvoltage protection. 31 RTSN I Ring Trip Sense Negative. Connect this pin to the ringing generator signal through a high-value resistor. 32 RTSP I Ring Trip Sense Positive. Connect this pin to the ring relay and the ringer series resistor through a high-value resistor. 33 NRDET O Ring Trip Detector Output. When low, this logic output indicates that ringing is tripped. 34 NLC O Loop Detector Output. When low, this logic output indicates an off-hook condition. 35 B2 I State Control Input. B0, B1, and B2 determine the state of the SLIC. See Table 2. 36 B1 I/O State Control Input. B0, B1, and B2 determine the state of the SLIC. See Table 2. 37 XMT O Transmit ac Output Voltage. The output of the uncommitted operational amplifier. 38 SN I Summing Node. The inverting input of the uncommitted operational amplifier. A resistor or network to XMT sets the gain. 39 FB1 I Forward Battery Slowdown. A 0.1 µF capacitor from FB1 to AGND and from FB2 to AGND will ramp the polarity reversal transition for added flexibility in applications requiring quiet polarity reversal. If not needed, the pin can be left open. 40 FB2 I Forward Battery Slowdown. A 0.1 µF capacitor from FB2 to AGND and from FB1 to AGND will ramp the polarity reversal transition for added flexibility in applications requiring quiet polarity reversal. If not needed, the pin can be left open. dc Resistance for Low Loop Currents. Leave open for dc feed resistance of 118 Ω, or short to DCOUT for 618 Ω. Intermediate values can be set by a simple resistor divider from DCOUT to ground with the tap at DCR. Lucent Technologies Inc. 5 Data Sheet March 1997 L7554 Low-Power SLIC Functional Description Table 2. Input State Coding B0 B1 B2 State/Definition 1 1 1 Powerup, Forward Battery. Normal talk and battery feed state. Pin PT is positive with respect to PR. On-hook transmission is enabled. 1 1 0 Powerup, Reverse Battery. Normal talk and battery feed state. Pin PR is positive with respect to PT. On-hook transmission is enabled. 0 1 1 Ground Start. Tip drive amplifier is turned off. The device presents a high-impedance (>100 kΩ) to the PT pin and a current-limited battery to the PR pin. Output pin RGDET indicates current flowing in the ring lead. 0 1 0 Low-Power Scan, Reverse Battery. Except for off-hook supervision, all circuits are shut down to conserve power. Pin PR is positive with respect to PT. On-hook transmission is disabled. 0 0 1 Low-Power Scan, Forward Battery. Except for off-hook supervision, all circuits are shut down to conserve power. Pin PT is positive with respect to PR. On-hook transmission is disabled. 0 0 0 Disconnect. The Tip and Ring amplifiers are turned off and the SLIC goes to a high-impedance state (>100 kΩ). Table 3. Supervision Coding Pin NRDET Pin NLC 0 = ring trip 1 = no ring trip 0 = off-hook 1 = on-hook Pin RGDET 1 = ring ground 0 = no ring ground Absolute Maximum Ratings (TA = 25 °C) Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are absolute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess of those given in the operational sections of the data sheet. Exposure to absolute maximum ratings for extended periods can adversely affect device reliability. Symbol Value Unit 5 V Power Supply VCC 7.0 V Battery (Talking) Supply VBAT –75 V Logic Input Voltage — –0.5 to +7.0 V Analog Input Voltage — –7.0 to +7.0 V Maximum Junction Temperature TJ 165 °C Storage Temperature Range Tstg –40 to +125 °C Relative Humidity Range RH 5 to 95 % Parameter — ±3 V PT or PR Fault Voltage (dc) VPT, VPR (VBAT – 5) to +3 V PT or PR Fault Voltage (10 x 1000 µs) VPT, VPR (VBAT – 15) to +15 V IRTSP, IRTSN ±240 µA Ground Potential Difference (BGND to AGND) Current into Ring Trip Inputs Note: The IC can be damaged unless all ground connections are applied before, and removed after, all other connections. Furthermore, when powering the device, the user must guarantee that no external potential creates a voltage on any pin of the device that exceeds the device ratings. Some of the known examples of conditions that cause such potentials during powerup are the following: 1) an inductor connected to Tip and Ring can force an overvoltage on VBAT through the protection devices if the VBAT connection chatters, and 2) inductance in the VBAT lead could resonate with the VBAT filter capacitor to cause a destructive overvoltage. 6 Lucent Technologies Inc. Data Sheet March 1997 L7554 Low-Power SLIC Recommended Operating Conditions Parameter Min Typ Max Unit Ambient Temperature –40 — 85 °C VCC Supply Voltage 4.75 5.0 5.25 V VBAT Supply Voltage: L7554AP L7554BP –24 –24 –40 –48 –60 –72 V — 10 ILIM mA dc Loop Current-limit Programming Range 5 40 45 mA On- and Off-hook 2-wire Signal Level — 1 2.2 Vrms 150 600 1300 Ω V Loop Closure Threshold-detection Programming Range ac Termination Impedance Programming Range Electrical Characteristics Minimum and maximum values are testing requirements. Typical values are characteristic of the device and are the result of engineering evaluations. Typical values are for information purposes only and are not part of the testing requirements. Minimum and maximum values apply across the entire temperature range (–40 °C to +85 °C) and the entire battery range unless otherwise specified. Typical is defined as 25 °C, VCC = 5.0 V, VBAT = –48 V, and ILIM = 40 mA. Positive currents flow into the device. Test circuit is Figure 4 unless noted. Table 4. Power Supply Parameter Min Typ Max Unit Power Supply—Powerup, No Loop Current ICC IBAT (VBAT = –48 V) Power Dissipation (VBAT = –48 V) — — — 4.1 –3.0 165 4.8 –3.5 191 mA mA mW Power Supply—Low-Power Scan, Forward Bat, No Loop Current ICC IBAT (VBAT = –48 V) Power Dissipation (VBAT = –48 V) — — — 2.7 –1.4 82 3.7 –1.7 100 mA mA mW Power Supply Rejection 500 Hz to 3 kHz (See Figures 5, 6, 15, and 16.)1 VCC VBAT 35 45 — — — — dB dB Thermal Protection Shutdown (Tjc) — 175 — °C Thermal Resistance, Junction to Ambient (θJA) — 47 — °C/W 1. This parameter is not tested in production. It is guaranteed by design and device characterization. Lucent Technologies Inc. 7 Data Sheet March 1997 L7554 Low-Power SLIC Electrical Characteristics (continued) Table 5. 2-Wire Port Parameter Min Typ Max Unit Tip or Ring Drive Current = dc + Longitudinal + Signal Currents 65 — — mA Signal Current 15 — — mArms Longitudinal Current Capability per Wire1 8.5 15 — mArms dc Loop Current Limit2 RLOOP = 100 Ω Programmability Range Accuracy (20 mA < ILIM < 40 mA) — 5 — ILIM — — — 45 ±12 mA mA % — VBAT/2 — V |VBAT + 7.0| |VBAT + 10.0| |VBAT + 6.5| |VBAT + 6.8| |VBAT + 6.0| — V V Disconnect State PT Resistance (VBAT < VPT < 0 V) PR Resistance (VBAT < VPR < 0 V) 100 100 143 133 — — kΩ kΩ Ground Start State PT Resistance 100 143 — kΩ dc Feed Resistance (for ILOOP below regulation level) 90 113 133 Ω Loop Resistance Range (–3.17 dBm overload into 600 Ω; not including protection) ILOOP = 20 mA at VBAT = –48 V ILOOP = 20 mA at VBAT = –24 V 1900 700 — — — — Ω Ω Longitudinal to Metallic Balance—IEEE 3 Std. 455 (See Figure 7.)4 50 Hz to 1 kHz 1 kHz to 3 kHz 64 60 75 70 — — dB dB Metallic to Longitudinal Balance 200 Hz to 4 kHz 46 — — dB — –55 –45 dBV Powerup Open Loop Voltage Levels Common-mode Voltage Differential Voltage: VBAT = –48 V, Temperature = 25 °C VBAT = –72 V, Temperature = 85 °C (L7554BP) 8.)5 RFI Rejection (See Figure 0.5 Vrms, 50 Ω Source, 30% AM Mod. 1 kHz 500 kHz to 100 MHz 1. The longitudinal current is independent of dc loop current. 2. Current-limit ILIM is programmed by a resistor, RPROG, from pin IPROG to DCOUT. ILIM is specified at the loop resistance where current limiting begins (see Figure 25). Select RPROG (kΩ) = 1.67 x ILIM (mA). 3. IEEE is a registered trademark of The Institute of Electrical and Electronics Engineers, Inc. 4. Longitudinal balance of circuit card will depend on loop series resistance matching (see Figures 23 and 24). 5. This parameter is not tested in production. It is guaranteed by design and device characterization. 8 Lucent Technologies Inc. Data Sheet March 1997 L7554 Low-Power SLIC Electrical Characteristics (continued) Table 6. Analog Pin Characteristics Parameter Min Typ Max Unit –119 –200 –125 — –127 200 V/A mV Loop Closure Detector Threshold1 Programming Accuracy — — ±20 % Ring Ground Detector Threshold2 RICM = 83 kΩ Programming Accuracy 3 — 6 — 10 ±25 kΩ % Ring Trip Comparator Input Offset Voltage — — ±10 mV RCVN, RCVP Input Bias Current — –0.2 –1 µA Min Typ Max Unit Input Offset Voltage Input Offset Current Input Bias Current Differential Input Resistance — — — — ±5 ±10 200 1.5 — — — — mV nA nA MΩ Output Voltage Swing (RL = 10 kΩ) Output Resistance (AVCL = 1) — — ±3.5 2.0 — — Vpk Ω Small Signal GBW — 700 — kHz Differential PT/PR Current Sense (DCOUT) Gain (PT/PR to DCOUT) Offset Voltage @ ILOOP = 0, VBAT = –48 V 1. Loop closure threshold is programmed by resistor RLCTH from pin LCTH to pin DCOUT. 2. Ring ground threshold is programmed by resistor RICM2 from pin ICM to VCC. Table 7. Uncommitted Op Amp Characteristics Parameter Lucent Technologies Inc. 9 Data Sheet March 1997 L7554 Low-Power SLIC Electrical Characteristics (continued) Table 8. ac Feed Characteristics Parameter Min Typ Max Unit 150 — 1300 Ω — 40 46 Ω — — — — 0.3 1.0 % % Transmit Gain, f = 1 kHz (PT/PR to VITR) Transmit Accuracy in dB, 25 °C Transmit Accuracy in dB, Full Temperature Range — –0.15 –0.22 –400 0 0 — 0.15 0.22 V/A dB dB Receive + Gain, f = 1 kHz (RCVP to PT/PR) Receive – Gain, f = 1 kHz (RCVN to PT/PR) Receive Accuracy in dB, 25 °C Receive Accuracy in dB, Full Temperature Range — — –0.18 –0.25 8.00 –8.00 0 0 — — 0.18 0.25 – – dB dB Gain vs. Frequency (transmit and receive) (600 Ω termination; reference 1 kHz2 ) 200 Hz to 300 Hz 300 Hz to 3.4 kHz 3.4 kHz to 16 kHz 16 kHz to 266 kHz –1.00 –0.3 –0.5 — 0.0 0.0 –0.1 — 0.05 0.05 0.3 2.0 dB dB dB dB Gain vs. Level (transmit and receive)(reference 0 dBV2) –50 dB to +3 dB –0.05 0 0.05 dB Return 200 Hz to 500 Hz 500 Hz to 3400 Hz 20 26 24 29 — — dB dB 2-wire Idle-channel Noise (600 Ω termination) Psophometric C-message 3 kHz Flat — — — –87 2 10 –77 12 20 dBmp dBrnC dBrn Transmit Idle-channel Noise Psophometric C-message 3 kHz flat — — — –82 7 15 –77 12 20 dBmp dBrnC dBrn Transhybrid Loss3 200 Hz to 500 Hz 500 Hz to 3400 Hz 21 26 24 29 — — dB dB ac Termination Longitudinal Impedance1 Impedance2 Total Harmonic Distortion—200 Hz to 4 kHz2 Off-hook On-hook Loss3 1. Set by external components. Any complex impedance R1 + R2 || C between 150 Ω and 1300 Ω can be synthesized. 2. This parameter is not tested in production. It is guaranteed by design and device characterization. 3. Return loss and transhybrid loss are functions of device gain accuracies and the external hybrid circuit. Guaranteed performance assumes 1% tolerance of external components. 10 Lucent Technologies Inc. Data Sheet March 1997 L7554 Low-Power SLIC Electrical Characteristics (continued) Table 9. Logic Inputs and Outputs All outputs except RGDET are open-collector with internal pull-up resistor. RGDET is open-collector without internal pull-up. Parameter Symbol Min Typ Max Unit Input Voltages Low Level (permissible range) High Level (permissible range) VIL VIH –0.5 2.0 0.4 2.4 0.7 VCC V V Input Currents Low Level (VCC = 5.25 V, VI = 0.4 V) High Level (VCC = 5.25 V, VI = 2.4 V) IIL IIH — — –115 –60 –200 –100 µA µA VOL VOH 0 2.4 0.2 — 0.4 VCC V V Output Voltages (open-collector with internal pull-up resistor) Low Level (VCC = 4.75 V, IOL = 360 µA) High Level (VCC = 4.75 V, IOH = –20 µA) Ring Trip Requirements 200 Ω ■ ■ ■ Ringing signal: — Voltage, minimum 35 Vrms, maximum 100 Vrms. — Frequency, 17 Hz to 23 Hz. — Crest factor, 1.4 to 2. Ringing trip: — ≤100 ms (typical), ≤250 ms (VBAT = –33 V, loop length = 530 Ω). TIP RING SWITCH CLOSES < 12 ms 6 µF TIP RING 10 kΩ Pretrip: — The circuits in Figure 3 will not cause ringing trip. 2 µF 100 Ω RING TIP 12-2572 (C) Figure 3. Ring Trip Circuits Lucent Technologies Inc. 11 Data Sheet March 1997 L7554 Low-Power SLIC Test Configurations VBAT VCC 0.1 µF VREG VBAT 100 Ω 0.1 µF BGND VCC PT AGND VTR 20 kΩ SN RLOOP 20 kΩ L7554 SLIC XMT XMT 65 kΩ 100 Ω PR 26 kΩ RCVN RCV 10 kΩ DCOUT RCVP 68.1 kΩ IPROG B0 B1 24.9 kΩ B2 LCTH NLC NRDET RGDET RTSP CF1 RTSN 0.1 µF ICM VTX CF2 TXI 0.1 µF FB2 FB1 0.1 µF 12-2570 (C) Figure 4. L7554 Basic Test Circuit VBAT OR VCC VBAT OR VCC 100 Ω 100 Ω DISCONNECT BYPASS CAP 4.7 µF VS VS VBAT OR VCC VBAT OR VCC 67.5 Ω TP + 900 Ω BASIC TEST CIRCUIT – + PR VM – VS PSRR = 20 log ---------V T/R 12-2335.a (C) Figure 5. Metallic PSRR 12 PT 10 µF BASIC TEST CIRCUIT VT/R DISCONNECT BYPASS CAP 4.7 µF 67.5 Ω 56.3 Ω PR 10 µF VS PSRR = 20 log ------VM 12-2336.a (C) Figure 6. Longitudinal PSRR Lucent Technologies Inc. Data Sheet March 1997 L7554 Low-Power SLIC Test Configurations (continued) ILONG 100 µF PT + PT VS 368 Ω VPT + VM 368 Ω – BASIC TEST CIRCUIT BASIC TEST CIRCUIT – – ILONG PR VPR + 100 µF PR VS LONGITUDINAL BALANCE = 20 log ------VM ZLONG = ∆ VPR ∆ VPT OR ∆ ILONG ∆ ILONG 12-2584 (C) 12-2585 (C) Figure 7. Longitudinal Balance 82.5 Ω 0.01 µF 600 Ω 50 Ω LB1201 2.15 µF 4 82.5 Ω 0.01 µF PT 1 6,7 VS Figure 9. Longitudinal Impedance XMT PT 2 BASIC TEST CIRCUIT VBAT PR + 600 Ω BASIC TEST CIRCUIT VT/R – RCV PR VS HP4935A TIMS VS = 0.5 Vrms 30% AM 1 kHz MODULATION, f = 500 kHz––1 MHz DEVICE IN POWERUP MODE, 600 Ω TERMINATION VXMT GXMT = VT/R GRCV = 12-2586 (C) VT/R VRCV 12-2587 (C) Figure 8. RFI Rejection Figure 10. ac Gains Lucent Technologies Inc. 13 Data Sheet March 1997 L7554 Low-Power SLIC Applications VBAT CBAT 0.1 µF RPROG 66.8 kΩ RLCTH 24.9 kΩ VCC 3 15 VBAT IPROG 14 DCOUT 12 LCTH 8 VREG VTX 29 CB2 0.1 µF TXI 11 VCC 0.1 µF CCC VITR RT2 18.7 kΩ 20 30 20 Ω 250 V PROT L7554 SLIC L7581 RELAY RING RPR 16 20 Ω RTSP 2.0 MΩ 32 RTS1 402 Ω CRTS2 0.27 µF PT RCVP RCVN 9 RTSP VFXIN RHB1 28.0 kΩ RRCV 48.7 kΩ VFXIP + PCM HIGHWAY PWRON CGP 330 pF GSR CONTROL INPUTS DR FSX FSR MC PD CLKSEL A/µ SYNCH AND CLOCK CONTROL INPUTS T7513 CODEC NLC 34 SUPERVISION OUTPUTS NRDET 33 CRTS1 0.022 µF DX PWROP RGP 20.0 kΩ 10 B2 35 B1 36 B0 23 PR GSX – RT1 86.6 kΩ TIP RPT RX 28.0 kΩ 31 RTSN RTS2 274 kΩ RTSN 2.0 MΩ CF2 18 CF1 19 AGND AGND BGND 25 24 27 CF1 0.47 µF VRING VBAT CF2 0.1 µF 12-2573 (C) Figure 11. Basic Loop Start Application Circuit Using T7513 Type Codec VCC LOOP START APPLICATION CIRCUIT RGDET ICM 22 RGDET 100 kΩ 21 82.5 kΩ RICM2 0.47 µF CICM 12-2821 (C) Figure 12. Ground Start Application Circuit 14 Lucent Technologies Inc. Data Sheet March 1997 L7554 Low-Power SLIC Applications (continued) Table 10. Parts List for Loop Start and Ground Start Applications Name Integrated Circuits SLIC Protector Ringing Relay Codec Overvoltage Protection RPT RPR Power Supply CBAT1 CCC CF1 CF2 dc Profile RPROG ac Characteristics CB2 CGB RT1 RRCV RGP Value Function L7554 250 V Thyristor type L7581 T7513 Subscriber loop interface circuit (SLIC). Secondary protection. Switches ringing signals. First-generation codec. 20 Ω, Fusible 20 Ω, Fusible Protection resistor. Protection resistor. 0.1 µF, 20%, 100 V 0.1 µF, 20%, 10 V 0.47 µF, 20%, 100 V 0.1 µF, 20%, 100 V VBAT filter capacitor. VCC filter. With CF2, improves idle channel noise. With CF1, improves idle channel noise. 66.8 kΩ, 1%, 1/4 W Sets dc loop current limit. 0.1 µF, 20%, 100 V 330 µF, 20%, 10 V 86.6 kΩ, 1%, 1/4 W 48.7 kΩ, 1%, 1/4 W 20.0 kΩ, 1%, 1/4 W ac/dc separation capacitor. Loop stability. With RGP and RRCV, sets ac termination impedance. With RGP and RT1, sets receive gain. With RT1 and RRCV, sets ac termination impedance and receive gain. Loop stability. With RX, sets transmit gain in codec. With RT2, sets transmit gain in codec. Sets hybrid balance. CGP RT2 RX RHB1 Supervision RLCTH RTS1 RTS2 330 pF, 10 V, 20% 18.7 kΩ, 1%, 1/4 W 28.0 kΩ, 1%, 1/4 W 28.0 kΩ, 1%, 1/4 W CRTS1 CRTS2 RTSN RTSP Ground Start CICM RGDET RICM2 0.022 µF, 20%, 5 V 0.27 µF, 20%, 100 V 2 MΩ, 5%, 1/4 W 2 MΩ, 5%, 1/4 W Sets loop closure (off-hook) threshold. Ringing source series resistor. With CRTS2, forms first pole of a double pole, 2 Hz ring trip sense filter. With RTSN, RTSP, forms second 2 Hz filter pole. With RTS2, forms first 2 Hz filter pole. With CRTS1, RTSP, forms second 2 Hz filter pole. With CRTS1, RTSN, forms second 2 Hz filter pole. 0.47 µF, 20%, 10 V 100 kΩ, 20%, 1/4 W 82.5 kΩ, 1%, 1/4 W Provides 60 Hz filtering for ring ground detection. Digital output pull-up resistor. Sets ring ground detection threshold. Lucent Technologies Inc. 24.9 kΩ, 1%, 1/4 W 402 Ω, 5%, 2 W 274 kΩ, 5%, 1/4 W 15 Data Sheet March 1997 L7554 Low-Power SLIC Applications (continued) Design Considerations Table 11 shows the design parameters of the application circuit shown in Figure 11. Components that are adjusted to program these values are also shown. Table 11. 600 Ω Design Parameters Design Parameter Parameter Value Components Adjusted Loop Closure Threshold 10 mA RLCTH dc Loop Current Limit 40 mA RPROG dc Feed Resistance 183 Ω RPT, RPR 3.14 dBm — ac Termination Impedance 600 Ω RT1, RGP, RRCV Hybrid Balance Line Impedance 600 Ω RHB1 Transmit Gain 0 dB RT2, RX Receive Gain 0 dB RRCV, RGP, RT1 2-wire Signal Overload Level 16 Lucent Technologies Inc. Data Sheet March 1997 L7554 Low-Power SLIC Applications (continued) Characteristic Curves 0 0 –10 RECEIVE GAIN –20 PSRR (dB) (dB) –10 –20 –30 SPEC. –40 BELOW CURRENT LIMIT –50 –60 HYBRID BALANCE –40 CURRENT LIMIT –30 –70 –50 100 1000 104 –80 105 10 100 1000 FREQUENCY (Hz) 104 105 106 FREQUENCY (Hz) 12-2828 (C) Figure 13. 7551 Receive Gain and Hybrid Balance vs. Frequency 12-2830 (C) Figure 15. 7551 Typical VCC Power Supply Rejection 0 –10 0 TRANSMIT GAIN –20 CURRENT LIMIT PSRR (dB) (dB) –10 –20 –30 RETURN LOSS –30 –40 SPECIFICATION RANGE –50 –60 BELOW CURRENT LIMIT –40 –70 –50 100 –80 1000 104 105 FREQUENCY (Hz) 10 100 1000 104 105 FREQUENCY (Hz) 12-2829 (C) Figure 14. 7551 Transmit Gain and Return Loss vs. Frequency Lucent Technologies Inc. 106 12-2871 (C) Figure 16. 7551 Typical VBAT Power Supply Rejection 17 Data Sheet March 1997 L7554 Low-Power SLIC Applications (continued) 25 50 20 40 LOOP CURRENT (mA) OFF-HOOK THRESHOLD LOOP CURRENT (mA) Characteristic Curves (continued) 15 10 5 0 30 1 10 kΩ ILIM 20 –1 RDC1 10 0 10 20 40 30 50 0 60 0 10 LOOP CLOSURE THRESHOLD RESISTOR, RLCTH (kΩ) Note: VBAT = –48 V. 12-3015 (C) 20 30 50 40 LOOP VOLTAGE (V) Note: VBAT = –48 V; ILIM = 22 mA; RDC1 = 113 Ω. 12-3050 (C) Figure 17. Loop Closure Program Resistor Selection Figure 19. Loop Current vs. Loop Voltage 50 2000 POWER (mW) 300 cu. ft./ min. 36 °C/W 1000 STILL AIR 47 °C/W 500 0 30 20 10 0 20 40 60 80 100 120 140 160 180 0 500 1000 1500 2000 LOOP RESISTANCE, RLOOP (Ω) AMBIENT TEMPERATURE, TA (°C) Note: VBAT = –48 V; ILIM = 22 mA; RDC1 = 113 Ω. Note: Tip lead is open; VBAT = –48 V. 12-3016 (C) Figure 18. Ring Ground Detection Programming 18 LOOP CURRENT (mA) 40 1500 12-3051 (C) Figure 20. Loop Current vs. Loop Resistance Lucent Technologies Inc. Data Sheet March 1997 L7554 Low-Power SLIC Applications (continued) Characteristic Curves (continued) PROTECTION RESISTOR MISMATCH (%) SLIC POWER DISSIPATION (mW) 1500 1000 500 0 0 500 1000 1500 2000 8 7 6 49 dB, RP MATCHED TO 1.5 Ω 5 4 3 2 1 0 58 dB, RP MATCHED TO 0.5 Ω 0 LOOP RESISTANCE, RLOOP (Ω) 20 40 80 60 100 120 PROTECTION RESISTOR VALUE (Ω) 12-3019 (C) Note: VBAT = –48 V; ILIM = 22 mA; RDC1 = 113 Ω. 12-3052 (C) Figure 23. Longitudinal Balance Resistor Mismatch Requirements Figure 21. 7551 Typical SLIC Power Dissipation vs. Loop Resistance 2000 POWER (mW) 1500 300 cu. ft./ min. 36 °C/W 1000 STILL AIR 47 °C/W LONGITUDINAL BALANCE (dB) 60 55 50 45 500 40 0.0 0 20 0.5 1.0 1.5 2.0 2.5 PROTECTION RESISTOR MISMATCH (Ω) 40 60 80 100 120 140 160 180 12-3021 (C) AMBIENT TEMPERATURE, TA (°C) 12-2825 (C) Figure 24. Longitudinal Balance vs. Protection Resistor Mismatch Figure 22. Power Derating Lucent Technologies Inc. 19 Data Sheet March 1997 L7554 Low-Power SLIC Applications (continued) Starting from the on-hook condition and going through to a short circuit, the curve passes through two regions: dc Applications Region 1; On-hook and low loop currents. The slope corresponds to the dc resistance of the SLIC, RDC1 (default is 113 Ω typical). The open-circuit voltage is the battery voltage less the overhead voltage of the device, VOH (default is 6.5 V typical). These values are suitable for most applications, but can be adjusted if needed. For more information, see the sections entitled Adjusting dc Feed Resistance and Adjusting Overhead Voltage. Battery Feed The dc feed characteristic can be described by: VT ⁄ R = ( VBAT – VOH) × RL -------------------------------------------R L + 2R P + Rdc IL = Region 2; Current limit. The dc current is limited to a value determined by external resistor RPROG. This region of the dc template has a high resistance (10 kΩ). VBAT – VOH R L + 2R P + Rdc ----------------------------------- where: IL = dc loop current. VT/R = dc loop voltage. |VBAT| = battery voltage magnitude. VOH = overhead voltage. This is the difference between the battery voltage and the open loop Tip/Ring voltage. RL = loop resistance, not including protection resistors. RP = protection resistor value. Rdc = SLIC internal dc feed resistance. Calculate the external resistor as follows: RPROG (kΩ) = 1.67 ILIM (mA) Overhead Voltage In order to drive an on-hook ac signal, the SLIC must set up the Tip and Ring voltage to a value less than the battery voltage. The amount that the open loop voltage is decreased relative to the battery is referred to as the overhead voltage. Expressed as an equation, The design begins by drawing the desired dc template. An example is shown in Figure 25. Without this buffer voltage, amplifier saturation will occur and the signal will be clipped. The 7551 is automatically set at the factory to allow undistorted on-hook transmission of a 3.17 dBm signal into a 900 Ω loop impedance. For applications where higher signal levels are needed, e.g., periodic pulse metering, the 2-wire port of the SLIC can be programmed with pin DCR. 50 LOOP CURRENT (mA) 40 30 1 10 kΩ VOH = |VBAT| – (VPT – VPR) ILIM The drive amplifiers are capable of 4 Vrms minimum (VAMP). Referring to Figure 26, the internal resistance has a worst-case value of 46 Ω. So, the maximum signal the device can guarantee is: 20 –1 RDC1 10 Z T/R V T/R = 4 V ----------------------------------------- Z T/R + 2 ( R P + 46 ) 0 0 10 20 30 40 50 LOOP VOLTAGE (V) Note: VBAT = –48 V; ILIM = 22 mA; RDC1 = 113 Ω. 12-3050 (C) Figure 25. Loop Current vs. Loop Voltage 20 Thus, RP ≤ 35 Ω allows 2.2 Vrms metering signals. The next step is to determine the amount of overhead voltage needed. The peak voltage at output of Tip and Ring amplifiers is related to the peak signal voltage by: vamp = v T/R 1 + Λ Λ 2 ( R P + 40 Ω ) ------------------------------ ZT ⁄ R Lucent Technologies Inc. Data Sheet March 1997 L7554 Low-Power SLIC Applications (continued) Accounting for VSAT tolerance of 0.5 V, a nominal overhead of 9.9 V would ensure transmission of an undistorted 2.2 V metering signal. dc Applications (continued) Adjusting Overhead Voltage RP ROC/2 + + VT/R To adjust the open loop 2-wire voltage, pin DCR is programmed at the midpoint of a resistive divider from ground to either –5 V or VBAT. In the case of –5 V, the overhead voltage will be independent of the battery voltage. Figure 27 shows the equivalent input circuit to adjust the overhead. [ZT/R] VAMP – – ROC/2 RP R1 25 kΩ ± 30% 12-2563 (C) DCR Figure 26. SLIC 2-Wire Output Stage In addition to the required peak signal level, the SLIC needs about 2 V from each power supply to bias the amplifier circuitry. It can be thought of as an internal saturation voltage. Combining the saturation voltage and the peak signal level, the required overhead can be expressed as: VOH = 2 ( R P + 40 Ω ) Λ = V S A T + 1 + ------------------------------ v T ⁄ R ZT ⁄ R V S A T + 1 + 2 ( R P + 40 Ω ) 2 Z T ⁄ R - × 10 dBm ⁄ 20 ------------------------------ --------------1000 ZT ⁄ R where VSAT is the combined internal saturation voltage between the Tip/Ring amplifiers and VSAT (4.0 V typ.). RP (Ω) is the protection resistor value, and 40 Ω is the output series resistance of each internal amplifier. ZT/R (Ω) is the ac loop impedance. Example 1, On-hook Transmission of a Meter Pulse: Signal level: 2.2 Vrms into 200 Ω 35 Ω protection resistors ILOOP = 0 (on-hook transmission of the metering signal) R2 –5 V 12-2562 (C) Figure 27. Equivalent Circuit for Adjusting the Overhead Voltage The overhead voltage is programmed by using the following equation: VOH = 6.5 – 4 VDCR R 1 || 25 kΩ = 6.5 – 4 – 5 × -------------------------------------- R 2 + R 1 || 25 kΩ R 1 || 25 kΩ = 6.5 + 20 -------------------------------------- R 2 + R 1 || 25 kΩ 2 ( 35 + 40 ) V OH = 4.0 + 1 + ---------------------------- 2 ( 2.2 ) 200 = 9.4 V Lucent Technologies Inc. 21 Data Sheet March 1997 L7554 Low-Power SLIC Applications (continued) This is an equivalent circuit for adjusting both the dc feed resistance and overhead voltage together. dc Applications (continued) The adjustments can be made by the simple superposition of the overhead and dc feed equations: Adjusting dc Feed Resistance R 1 || 25 kΩ || R 3 V O H = 6.5 + 20 ---------------------------------------------- R 2 + R 1 || 25 kΩ || R 3 The dc feed resistance may be adjusted with the help of Figure 28. R1 25 kΩ ± 30% R 1 || 25 kΩ Rdc = 113 Ω + 500 Ω ----------------------------------- R 3 + R 1 || 25 kΩ DCR When selecting external components, select R1 on the order of 5 kΩ to minimize the programming inaccuracy caused by the internal 25 kΩ resistor. Lower values can be used; the only disadvantage is the power consumption of the external resistors. DCOUT Loop Range R3 12-2560 (C) The equation below can be rearranged to provide the loop range for a required loop current: Figure 28. Equivalent Circuit for Adjusting the dc Feed Resistance RL = Off-Hook Detection ∆V D C R Rdc = 113 Ω + 500 Ω -------------------∆V D C O U T R 1 || 25 kΩ = 113 Ω + 500 Ω ---------------------------------- R 3 + R 1 || 25 kΩ Adjusting Overhead Voltage and dc Feed Resistance Simultaneously The following paragraphs describe the independent setting of the overhead voltage and the dc feed resistance. If both need to be set to customized values, combine the two circuits as shown in Figure 29. The loop closure comparator has built-in longitudinal rejection, eliminating the need for an external 60 Hz filter. This applies in both powerup and low-power scan states. The loop-closure detection threshold is set by resistor RLCTH. Referring to Figure 30, NLC is high in an on-hook condition (ITR = 0, VDCOUT = 0), and VLCTH = 0.05 mA x RLCTH. The off-hook comparator goes low when VLCTH crosses zero and then goes negative: VLCTH = 0.05 mA x RLCTH + VDCOUT = 0.05 x RLCTH – 0.125 V/mA x ITR RLCTH(kΩ) = 2.5 x ITR(mA) RP R1 PT ITR 25 kΩ ± 30% + – RL DCR R2 VBAT – VOH IL ---------------------------- – 2R P – Rdc –0.125 V/mA DCOUT RLCTH PR R3 RP LCTH 0.05 mA –5 V + – NLC DCOUT 12-2561 (C) 12-2553.a (C) Figure 29. Adjusting Both Overhead Voltage and dc Feed Resistance 22 Figure 30. Off-Hook Detection Circuit Lucent Technologies Inc. Data Sheet March 1997 L7554 Low-Power SLIC Applications (continued) The current IN is repeated as IP in the positive comparator input. The voltage at comparator input RTSP is: dc Applications (continued) VRTSP Ring Trip Detection The ring trip circuit is a comparator that has a special input section optimized for this application. The equivalent circuit is shown in Figure 31, along with its use in an application using unbalanced, battery-backed ringing. = V BAT + I L O O P ( dc ) × R T S 1 + I P × R T S P Using this equation and the values in the example, the voltage at input RTSP is –12 V during ringing injection (ILOOP(dc) = 0). Input RTSP is, therefore, at a level of 5 V below RTSN. When enough dc loop current flows through RTS1 to raise its dc drop to 5 V, the comparator will trip. In this example, PHONE HOOK SWITCH 5V I LOOP ( dc ) = ----------------402 Ω RLOOP RTSP RC PHONE RTSP + 2 MΩ RTS1 402 Ω CRTS2 0.27 µF RTS2 274 kΩ RTSN 2 MΩ IP = IN CRTS1 0.022 µF IN NRDET + – 7V = 12.5 mA – RTSN 15 kΩ VRING Ring Ground Detection VBAT 12-3014 (C) Figure 31. Ring Trip Equivalent Circuit and Equivalent Application The comparator input voltage compliance is VCC to VBAT, and the maximum current is 240 µA in either direction. Its application is straightforward. A resistance (RTSN + RTS2) in series with the RTSN input establishes a current that is repeated in the RTSP input. A slightly lower resistance (RTSP) is placed in series with the RTSP input. When ringing is being injected, no dc current flows through RTS1, so the RTSP input is at a lower potential than RTSN. When enough dc loop current flows, the RTSP input voltage increases to trip the comparator. In Figure 31, a low-pass filter with a double pole at 2 Hz was implemented to prevent false ring trip. The following example illustrates how the detection circuit of Figure 31 will trip at 12.5 mA dc loop current using a –48 V battery. Pin ICM sinks a current proportional to the longitudinal loop current. It is also connected to an internal comparator whose output is pin RGDET. In a ground start application where Tip is open, the ring ground current is half differential and half common mode. In this case, to set the ring ground current threshold, connect a resistor RICM from pin ICM to VCC. Select the resistor according to the following relation: R I C M ( kΩ ) = V CC × 120 --------------------I RG ( mA ) The above equation is shown graphically in Figure 18. It applies for the case of Tip open. The more general equation can be used in ground key application to detect a common-mode current ICM: R I C M ( kΩ ) = V CC × 60 ------------------I CM ( mA ) –7 – (–48) I N = --------------------------2.289 kΩ = 17.9 µA Lucent Technologies Inc. 23 Data Sheet March 1997 L7554 Low-Power SLIC Applications (continued) ac Design There are four key ac design parameters. Termination impedance is the impedance looking into the 2-wire port of the line card. It is set to match the impedance of the telephone loop in order to minimize echo return to the telephone set. Transmit gain is measured from the 2-wire port to the PCM highway, while receive gain is done from the PCM highway to the transmit port. Finally, the hybrid balance network cancels the unwanted amount of the receive signal that appears at the transmit port. At this point in the design, the codec needs to be selected. The discrete network between the SLIC and the codec can then be designed. The following is a brief codec feature and selection summary. First-Generation Codecs These perform the basic filtering, A/D (transmit), D/A (receive), and µ-law/A-law companding. They all have an op amp in front of the A/D converter for transmit gain setting and hybrid balance (cancellation at the summing node). Depending on the type, some have differential analog input stages, differential analog output stages, and µ-law/A-law selectability. This generation of codecs have the lowest cost. They are most suitable for applications with fixed gains, termination impedance, and hybrid balance. 24 Second-Generation Codecs This class of devices includes a microprocessor interface for software control of the gains and hybrid balance. The hybrid balance is included in the device. ac programmability adds application flexibility and saves several passive components and also adds several I/O latches that are needed in the application. However, there is no transmit op amp, since the transmit gain and hybrid balance are set internally. Third-Generation Codecs This class of devices includes the gains, termination impedance, and hybrid balance—all under microprocessor control. Depending on the device, it may or may not include latches. Selection Criteria In the codec selection, increasing software control and flexibility are traded for device cost. To help decide, it may be useful to consider the following. Will the application require only one value for each gain and impedance? Will the board be used in different countries with different requirements? Will several versions of the board be built? If so, will one version of the board be most of the production volume? Does the application need only real termination impedance? Does the hybrid balance need to be adjusted in the field? In the following examples, use of a first-generation codec is shown. The equations for second- and third-generation codecs are simply subsets of these. There are two examples: The first shows the simplest circuit, which uses a minimum number of discrete components to synthesize a real termination impedance. The second example shows the use of the uncommitted op amp to synthesize a complex termination. The design has been automated in a DOS-based program, available on request. Lucent Technologies Inc. Data Sheet March 1997 L7554 Low-Power SLIC Applications (continued) ac Design (continued) ac equivalent circuits using a T7513 Codec are shown in Figures 32 and 33. RX VGSX –0.4 V/mA – AV = 1 ZT RCVN – RP PT 40 Ω AV = 4 + VT/R – RP PR 40 Ω VFXIP RT1 RHB1 RRCV RCVP + IT/R VS VFXIN VITR + ZT/R RT2 – + VFR (PWROP) RG AV = –1 L7554 SLIC SLIC ATT7564 T7513 CODEC 12-2554.a (C) Figure 32. ac Equivalent Circuit Not Including Spare Op Amp ZT5 RX VGSX – + ZT/R AV = 1 ZT VITR – RP PT 40 Ω AV = 4 + IT/R VS –0.4 V/mA + VT/R – RP PR 40 Ω RT4 SN AGND – XMT RT6 + VFXIN VFXIP RT3 RCVN RHB1 RRCV RCVP – + VFR (PWROP) RGN AV = –1 L7554 SLIC T7513 CODEC 12-3013 (C) Figure 33. ac Equivalent Circuit Including Spare Op Amp Lucent Technologies Inc. 25 Data Sheet March 1997 L7554 Low-Power SLIC Applications (continued) Example 2, Complex Termination: ac Design (continued) For complex termination, the spare op amp is used (see Figure 33). Example 1, Real Termination The following design equations refer to the circuit in Figure 32. Use these to synthesize real termination impedance. = 2R P + 80 Ω + k ( Z T5 ) Termination Impedance: zt = vT ⁄ R ---------–i t r 3200 z t = 2R P + 80 Ω + ----------------------------------RT1 RT1 1 + --------- + -----------RGP RRCV vT ⁄ R ---------- PCB Layout Information 8 ------------------------------------------------------------------R R CV R R C V zt 1 + ----------+ ------------ 1 + ---------- RT1 RGP ZT ⁄ R Transmit Gain: vgsx ---------vT ⁄ R gtx = RX RT2 400 ZT ⁄ R -------- × ---------- Hybrid Balance: V gsx hbal = 20log ------------ Vfr To optimize the hybrid balance, the sum of the currents at the VFX input of the codec op amp should be set to 0. The following expressions assume that the test network is the same as the termination impedance. RX h b a l = 20 log --------R H B 26 – R X 400 Z T5 gtx = ----------- × ---------- × --------R T6 Z T/R R T4 vfr g rcv = g tx = 8 grcv = ---------------------------------------------------------------------------R RCV R RCV zt R X- + ------------ ------------- 1 + ---------- R H B1= +-------------------R T3 R GN Z T/R gtx × g rcv The hybrid balance equation is the same as in Example 1. Receive Gain: g rcv = 3200 Z T5 z t = 2R P + 80 Ω + -----------------------------------( --------- ) R T 3 R T4 RT3 1 + --------- + -----------RGN RRCV Make the leads to BGND and VBAT as wide as possible for thermal and electrical reasons. Also, maximize the amount of PCB copper in the area of—and specifically on—the leads connected to this device for the lowest operating temperature. When powering the device, ensure that no external potential creates a voltage on any pin of the device that exceeds the device ratings. In this application, some of the conditions that cause such potentials during powerup are the following: 1) an inductor connected to PT and PR (this can force an overvoltage on VBAT through the protection devices if the VBAT connection chatters) and 2) inductance in the VBAT lead (this could resonate with the VBAT filter capacitor to cause a destructive overvoltage). This device is normally used on a circuit card that is subjected to hot plug-in, meaning the card is plugged into a biased backplane connector. In order to prevent damage to the IC, all ground connections must be applied before, and removed after, all other connections. – gtx × g r c v Lucent Technologies Inc. Data Sheet March 1997 L7554 Low-Power SLIC Outline Diagram 44-Pin PLCC Controlling dimensions are in millimeters. 17.65 MAX 16.66 MAX PIN #1 IDENTIFIER ZONE 6 1 40 7 39 16.66 MAX 17.65 MAX 29 17 18 28 4.57 MAX SEATING PLANE 1.27 TYP 0.53 MAX 0.51 MIN TYP 0.10 5-2506r7 (C) Lucent Technologies Inc. 27 Data Sheet March 1997 L7554 Low-Power SLIC Ordering Information Device Part No. ATTL7554AP ATTL7554AP–TR* ATTL7554BP ATTL7554BP–TR* Description Package Comcode Low-Power SLIC, –60 V Low-Power SLIC, –60 V Low-Power SLIC, –72 V Low-Power SLIC, –72 V 44-Pin PLCC 44-Pin PLCC (Tape and Reel) 44-Pin PLCC 44-Pin PLCC (Tape and Reel) 107080921 107177172 107548927 107548943 *Devices on tape and reel must be ordered in 1000-piece increments. For additional information, contact your Microelectronics Group Account Manager or the following: INTERNET: http://www.lucent.com/micro U.S.A.: Microelectronics Group, Lucent Technologies Inc., 555 Union Boulevard, Room 30L-15P-BA, Allentown, PA 18103 1-800-372-2447, FAX 610-712-4106 (In CANADA: 1-800-553-2448, FAX 610-712-4106), e-mail [email protected] ASIA PACIFIC: Microelectronics Group, Lucent Technologies Singapore Pte. Ltd., 77 Science Park Drive, #03-18 Cintech III, Singapore 118256 Tel. (65) 778 8833, FAX (65) 777 7495 JAPAN: Microelectronics Group, Lucent Technologies Japan Ltd., 7-18, Higashi-Gotanda 2-chome, Shinagawa-ku, Tokyo 141, Japan Tel. (81) 3 5421 1600, FAX (81) 3 5421 1700 For data requests in Europe: MICROELECTRONICS GROUP DATALINE: Tel. (44) 1734 324 299, FAX (44) 1734 328 148 For technical inquiries in Europe: CENTRAL EUROPE: (49) 89 95086 0 (Munich), NORTHERN EUROPE: (44) 1344 865 900 (Bracknell UK), FRANCE: (33) 1 41 45 77 00 (Paris), SOUTHERN EUROPE: (39) 2 6601 1800 (Milan) or (34) 1 807 1700 (Madrid) Lucent Technologies Inc. reserves the right to make changes to the product(s) or information contained herein without notice. No liability is assumed as a result of their use or application. No rights under any patent accompany the sale of any such product(s) or information. Copyright © 1997 Lucent Technologies Inc. All Rights Reserved Printed in U.S.A. March 1997 DS97-202ALC (Replaces DS96-229LCAS) Printed On Recycled Paper