Excelics EPA120E-CP083 High efficiency heterojunction power fet Datasheet

EPA120E-CP083
High Efficiency Heterojunction Power FET
UPDATED 02/15/2005
FEATURES
•
•
•
•
•
•
NON-HERMETIC SURFACE MOUNT
160MIL METAL CERAMIC PACKAGE
+29 dBm OUTPUT POWER AT 1dB COMPRESSION
19.5 dB GAIN AT 2 GHz
0.3x1200 MICRON RECESSED “MUSHROOM” GATE
Si3N4 PASSIVATION
ADVANCED EPITAXIAL DOPING PROFILE PROVIDES
HIGH POWER EFFICIENCY, LINEARITY AND RELIABILITY
Caution! ESD sensitive device.
ELECTRICAL CHARACTERISTICS (Ta = 25°C)
SYMBOL
P1dB
G1dB
PAE
All Dimensions in mil
Tolerance: ± 3 mil
PARAMETER/TEST CONDITIONS
Output Power at 1dB Compression
f=
Vds = 8 V, Ids=50% Idss
f=
Gain at 1dB Compression
f=
Vds = 8 V, Ids=50% Idss
f=
Power Added Efficiency at 1dB Compression
Vds = 8 V, Ids=50% Idss
f=
2.0 GHz
12.0 GHz
2.0 GHz
12.0 GHz
MIN
TYP
27.5
29.0
29.0
19.5
7.0
18.0
MAX
UNITS
dBm
dB
43
2.0 GHz
IDSS
Saturated Drain Current
VDS = 3 V, VGS = 0 V
210
360
GM
Transconductance
VDS = 3 V, VGS = 0 V
240
380
VP
Pinch-off Voltage
VDS = 3 V, IDS = 3.5 mA
-1.0
%
510
mA
mS
-2.5
V
BVGD
Drain Breakdown Voltage
IGD = 1.2 mA
-13
-15
V
BVGS
Source Breakdown Voltage
IGS = 1.2 mA
-7
-14
V
RTH*
Thermal Resistance
40
o
C/W
Notes: * Overall Rth depends on case mounting.
ABSOLUTE MAXIMUM RATINGS FOR CONTINUOUS OPERATION1,2
SYMBOL
CHARACTERISTIC
VALUE
VDS
Drain to Source Voltage
8V
VGS
Gate to Source Voltage
-3 V
IDS
Drain Current
405 mA
IGSF
Forward Gate Current
10 mA
PIN
Input Power
PT
Total Power Dissipation
3.8 W
TCH
Channel Temperature
150°C
TSTG
Storage Temperature
-65/+150°C
@ 3dB compression
Note: 1. Exceeding any of the above ratings may result in permanent damage.
2. Exceeding any of the above ratings may reduce MTTF below design goals.
Specifications are subject to change without notice.
Excelics Semiconductor, Inc. 310 De Guigne Drive, Sunnyvale, CA 94085
Phone: 408-737-1711 Fax: 408-737-1868 Web: www.excelics.com
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Revised February 2005
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