BSS138 N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description Features These N-Channel enhancement mode field effect transistors are produced using Fairchild’s proprietary, high cell density, DMOS technology. These products have been designed to minimize on-state resistance while provide rugged, reliable, and fast switching performance.These products are particularly suited for low voltage, low current applications such as small servo motor control, power MOSFET gate drivers, and other switching applications. • 0.22 A, 50 V. RDS(ON) = 3.5Ω @ VGS = 10 V RDS(ON) = 6.0Ω @ VGS = 4.5 V • High density cell design for extremely low RDS(ON) • Rugged and Reliable • Compact industry standard SOT-23 surface mount package D D S S G SOT-23 G Absolute Maximum Ratings Symbol TA=25oC unless otherwise noted Parameter VDSS Drain-Source Voltage VGSS Gate-Source Voltage ID Drain Current PD Maximum Power Dissipation – Continuous (Note 1) – Pulsed Operating and Storage Junction Temperature Range Maximum Lead Temperature for Soldering Purposes, 1/16” from Case for 10 Seconds TL Units 50 V ±20 V 0.22 A 0.88 (Note 1) Derate Above 25°C TJ, TSTG Ratings 0.36 2.8 W mW/°C −55 to +150 °C 300 °C 350 °C/W Thermal Characteristics Thermal Resistance, Junction-to-Ambient RθJA (Note 1) Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity SS BSS138 7’’ 8mm 3000 units 2005 Fairchild Semiconductor Corporation BSS138 Rev C(W) BSS138 October 2005 Symbol Parameter TA = 25°C unless otherwise noted Test Conditions Min Typ Max Units Off Characteristics BVDSS ∆BVDSS ∆TJ IDSS Drain–Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current ID = 250 µA VGS = 0 V, ID = 250 µA,Referenced to 25°C VDS = 50 V, 50 V 72 VGS = 0 V VDS = 50 V, VGS = 0 V TJ = 125°C IGSS Gate–Body Leakage. On Characteristics mV/°C 0.5 µA 5 µA VDS = 30 V, VGS = 0 V 100 nA VGS = ±20 V, VDS = 0 V ±100 nA (Note 2) VGS(th) ∆VGS(th) ∆TJ RDS(on) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance ID(on) gFS VDS = VGS, ID = 1 mA 0.8 ID = 1 mA,Referenced to 25°C On–State Drain Current ID = 0.22 A VGS = 10 V, ID = 0.22 A VGS = 4.5 V, VGS = 10 V, ID = 0.22 A, TJ = 125°C VGS = 10 V, VDS = 5 V 0.2 Forward Transconductance VDS = 10V, ID = 0.22 A 0.12 VDS = 25 V, f = 1.0 MHz V GS = 0 V, 1.3 –2 1.5 0.7 1.0 1.1 3.5 6.0 5.8 V mV/°C Ω A 0.5 S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance RG Gate Resistance Switching Characteristics td(on) Turn–On Delay Time tr Turn–On Rise Time td(off) Turn–Off Delay Time tf Turn–Off Fall Time Qg Total Gate Charge Qgs Gate–Source Charge Qgd Gate–Drain Charge VGS = 15 mV, f = 1.0 MHz 27 pF 13 pF 6 pF 9 Ω (Note 2) VDD = 30 V, VGS = 10 V, VDS = 25 V, VGS = 10 V ID = 0.29 A, RGEN = 6 Ω ID = 0.22 A, 2.5 5 9 18 ns ns 20 36 ns 7 14 ns 1.7 2.4 nC 0.1 nC 0.4 nC Drain–Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain–Source Diode Forward Current VSD Drain–Source Diode Forward Voltage VGS = 0 V, IS = 0.44 A(Note 2) 0.8 0.22 A 1.4 V Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 350°C/W when mounted on a minimum pad.. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0% BSS138 Rev C(W) BSS138 Electrical Characteristics BSS138 Typical Characteristics 1 VGS = 10V 3.4 6.0V 4.5V ID, DRAIN CURRENT (A) 0.8 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 3.5V 3.0V 0.6 2.5V 0.4 0.2 2.0V 3 VGS = 2.5V 2.6 2.2 3.0V 1.8 3.5V 4.0V 4.5V 1.4 6.0V 10V 1 0.6 0 0 0.5 1 1.5 2 2.5 0 3 0.2 Figure 1. On-Region Characteristics. 0.8 1 4.1 ID = 220mA VGS = 10V 1.8 RDS(ON), ON-RESISTANCE (OHM) RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 0.6 Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 2 1.6 1.4 1.2 1 0.8 ID = 110mA 3.5 2.9 TA = 125oC 2.3 1.7 TA = 25oC 1.1 0.5 0.6 -50 -25 0 25 50 75 100 125 150 0 2 o 4 6 8 10 VGS, GATE TO SOURCE VOLTAGE (V) TJ, JUNCTION TEMPERATURE ( C) Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 1 0.6 o o TA = -55 C 0.5 IS, REVERSE DRAIN CURRENT (A) VGS = 0V VDS = 10V ID, DRAIN CURRENT (A) 0.4 ID, DRAIN CURRENT (A) VDS, DRAIN TO SOURCE VOLTAGE (V) 25 C 125oC 0.4 0.3 0.2 0.1 0 0.1 TA = 125oC 25oC 0.01 -55oC 0.001 0.0001 0.5 1 1.5 2 2.5 3 VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 3.5 0 0.2 0.4 0.6 0.8 1 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. BSS138 Rev C(W) BSS138 Typical Characteristics 100 ID = 220mA VDS = 8V f = 1 MHz VGS = 0 V 25V 80 8 30V CAPACITANCE (pF) VGS, GATE-SOURCE VOLTAGE (V) 10 6 4 60 CISS 40 COSS 2 20 0 0 CRSS 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 0 1.8 10 Qg, GATE CHARGE (nC) Figure 7. Gate Charge Characteristics. 40 50 P(pk), PEAK TRANSIENT POWER (W) 5 100µs 1 1ms 10ms 100ms 1s RDS(ON) LIMIT 0.1 DC VGS = 10V SINGLE PULSE RθJA = 350oC/W 0.01 TA = 25oC 0.001 0.1 1 10 100 SINGLE PULSE RθJA = 350°C/W TA = 25°C 4 3 2 1 0 0.001 0.01 0.1 1 10 100 1000 t1, TIME (sec) VDS, DRAIN-SOURCE VOLTAGE (V) Figure 9. Maximum Safe Operating Area. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 30 Figure 8. Capacitance Characteristics. 10 ID, DRAIN CURRENT (A) 20 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 10. Single Pulse Maximum Power Dissipation. 1 D = 0.5 RθJA(t) = r(t) * RθJA o 0.2 0.1 RθJA = 350 C/W 0.1 0.05 P(pk) 0.02 0.01 t1 t2 TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2 0.01 SINGLE PULSE 0.001 0.0001 0.001 0.01 0.1 1 10 100 1000 t1, TIME (sec) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1a. Transient thermal response will change depending on the circuit board design. BSS138 Rev C(W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ FAST® ActiveArray™ FASTr™ Bottomless™ FPS™ Build it Now™ FRFET™ CoolFET™ GlobalOptoisolator™ CROSSVOLT™ GTO™ DOME™ HiSeC™ EcoSPARK™ I2C™ E2CMOS™ i-Lo™ EnSigna™ ImpliedDisconnect™ FACT™ IntelliMAX™ FACT Quiet Series™ Across the board. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I17